JP2817230B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for filling a contact hole.

[Conventional technology]

As one of means for miniaturizing a semiconductor device, there is a method in which a contact hole is buried and flattened using polycrystalline silicon or a high melting point metal.

The conventional technology using polycrystalline silicon is shown in FIG.
This will be described with reference to FIG.

As shown in FIG. 3A, an N ⁺ diffusion layer 2 is at least selectively formed on a P-type semiconductor substrate 1 (silicon). After depositing the silicon oxide film 3 by the vapor growth method, a contact hole is opened. Next, polycrystalline silicon is applied, and phosphorus is added by thermal diffusion to form a conductive polycrystalline silicon film 4. Next, a non-doped polycrystalline silicon film 5 is deposited.

Next, as shown in FIG. 3B, the polycrystalline silicon films 4 and 5 in the contact holes are left, and the polycrystalline silicon in the other regions is removed by an anisotropic dry etching method. Next, an Al wiring 6 is formed.

[Problems to be solved by the invention]

The conventional contact hole filling method described above etches a polycrystalline silicon film by an anisotropic dry etching method, but due to variations in the thickness of the deposited polycrystalline silicon film and variations in the etching rate of anisotropic dry etching. Depending on the location in the semiconductor substrate, there is a place where overetching occurs. In such a place, polycrystalline silicon to be buried is not left in the contact hole, a steep step occurs, and when forming a wiring layer, there is a disadvantage that the wiring is disconnected as shown in FIG. is there.

An object of the present invention is to provide a method of manufacturing a semiconductor device in which a contact hole can be filled with polycrystalline silicon with good reproducibility.

[Means for solving the problem]

In the method of manufacturing a semiconductor device according to the present invention, after forming an insulating film having a contact hole on one main surface of a semiconductor substrate, a first polycrystalline silicon film is deposited with a thickness not filling the contact hole. A step of adding phosphorus to the first polycrystalline silicon film, and a step of depositing a second polycrystalline silicon film on the first polycrystalline silicon film so as to fill the contact holes. Adding phosphorus to the second polycrystalline silicon film except for inside the contact hole; and adding the phosphorus-added first polycrystalline silicon film to the second polycrystalline silicon film other than inside the contact hole. And removing the polycrystalline silicon film.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIGS. 1A to 1C are cross-sectional views of a semiconductor chip shown in the order of main steps for explaining a first embodiment of the present invention.

First, as shown in FIG. 1A, a P-type semiconductor substrate 11 is formed.
The N ⁺ diffusion layer 12 is formed at least selectively. A silicon oxide film 13 is deposited at 1.0 μm by a vapor-phase oxide film growth method,
A contact hole having an opening diameter of μm × 1.0 μm is opened.
Next, a polycrystalline silicon film is deposited to a thickness of 200 nm, and phosphorus is added by thermal diffusion. This is for connecting the N ⁺ diffusion layer 12 and a wiring layer formed in a later step with low resistance. The conductive polycrystalline silicon film 14 thus formed only covers the above-mentioned contact hole and the surface of the underlying N ⁺ diffusion layer 12, but does not bury the contact hole.

Next, as shown in FIG. 1 (b), a non-doped polycrystalline silicon film 15 is deposited to a thickness of 800 nm to bury the contact hole, and then phosphorus is added to the polycrystalline silicon in the contact by ion implantation. Is the condition that is not added, in this case 50
Inject phosphorus at 0 keV, 1 × 10 ¹⁶ cm ⁻² . Reference numeral 17 denotes a phosphorus-doped polysilicon film, and reference numeral 18 denotes a high-concentration phosphorus-doped polysilicon film in which phosphorus is added by ion implantation to a region (14) to which phosphorus has been added by thermal diffusion.

Next, as shown in FIG. 1 (c), using a mixed solution of hydrofluoric acid and nitric acid,
4 and 15 are left, and the polycrystalline silicon 17 and 18 in other areas are removed. Next, the Al wiring layer 16 is formed.

Polycrystalline silicon with a high phosphorus concentration has a higher etching rate with respect to a mixed solution of hydrofluoric acid and nitric acid than polycrystalline silicon with a low phosphorus concentration, so that non-doped polycrystalline silicon can be reliably left in the contact hole, and A contact hole in which crystalline silicon is embedded can be manufactured stably.

A second embodiment of the present invention will be described with reference to FIGS. 2 (a) to 2 (c).

First, as shown in FIG.
Next, an N ⁺ diffusion layer 22 is formed. A 1.0 μm silicon oxide film 23 is deposited by a vapor phase oxide film growth method, and a contact hole having an opening diameter of 1.0 μm × 1.0 μm is opened. Next, 200 nm of polycrystalline silicon is deposited, and phosphorus is added by thermal diffusion. Next, a non-doped polycrystalline silicon film 25 is deposited to a thickness of 800 nm. The operation up to this point is the same as in the first embodiment. Next, phosphorus is implanted by ion implantation under the conditions of 300 keV and 1 × 10 ¹⁶ cm ⁻² . 27 is a polycrystalline silicon film into which phosphorus has passed, and 25 is a polycrystalline silicon film to which phosphorus has not been added.

Next, as shown in FIG. 2 (b), the phosphorus-added polycrystalline silicon film 27 is removed with a mixed solution of hydrofluoric acid and nitric acid. Further, by ion implantation, under the condition that phosphorus is not added into the contact, in this case, 300 keV, 1 × 10 ¹⁶ cm ⁻²
Inject phosphorus. Reference numeral 28 denotes a high-concentration phosphorus-doped polycrystalline silicon film in which phosphorus is added by ion implantation to a region to which phosphorus has been added by thermal diffusion.

Next, as shown in FIG. 2 (c), a polycrystalline silicon film in the contact hole is formed using a mixed solution of hydrofluoric acid and nitric acid.
14 and 15 are left, and the polycrystalline silicon films 27 and 28 in the other regions are left.
Is removed. Next, an Al wiring layer 26 is formed.

Polycrystalline silicon with a high phosphorus concentration utilizes the fact that the etching rate is higher for a mixed solution of hydrofluoric acid and nitric acid than polycrystalline silicon with a low phosphorus concentration. By repeating the step of removing crystalline silicon a plurality of times, a contact hole in which polycrystalline silicon is buried can be manufactured more stably.

〔The invention's effect〕

As described above, according to the present invention, after the contact hole is filled with the conductive polycrystalline silicon film and the non-doped polycrystalline silicon film, the above-mentioned non-doped polycrystalline silicon film is doped with phosphorus except for the inside of the contact hole and then etched. By doing so, polycrystalline silicon doped with phosphorus at a high concentration is compared with polycrystalline silicon doped at a low concentration of phosphorus or a polycrystalline silicon film not doped with impurities. By utilizing the fact that the etching rate is high with respect to a mixed solution with nitric acid, there is an effect that a semiconductor device having a contact hole in which polycrystalline silicon is buried can be manufactured with good controllability.

[Brief description of the drawings]

FIGS. 1A to 1C are cross-sectional views of a semiconductor chip arranged in the order of main steps for explaining a first embodiment of the present invention.
2 (a) to 2 (c) are cross-sectional views of a semiconductor chip arranged in a main process order for explaining a second embodiment of the present invention.
3 (a) and 3 (b) are cross-sectional views of a semiconductor chip arranged in the main process order for explaining a conventional method of manufacturing a semiconductor device, and FIG. 4 is a semiconductor chip for explaining a defect of the conventional example. FIG. 1,11,21 …… P-type semiconductor substrate, 2,12,22 …… N ⁺ diffusion layer,
13,23 ... silicon oxide film, 4, 14, 24 ... conductive polycrystalline silicon film, 5, 15, 25 ... non-doped polycrystalline silicon film,
6,16,26 ... Al wiring, 17,27,18,28,29 ... phosphorus-doped polycrystalline silicon film.

Claims (1)

(57) [Claims] A step of forming an insulating film having a contact hole on one main surface of the semiconductor substrate, and then applying a first polycrystalline silicon film to a thickness not filling the contact hole; Adding phosphorus to the first polycrystalline silicon film, applying a second polycrystalline silicon film on the first polycrystalline silicon film so as to fill the contact hole, The second except the inside
Adding phosphorus to the polycrystalline silicon film, and removing the phosphorus-added first polycrystalline silicon film and the phosphorus-added second polycrystalline silicon film other than inside the contact hole. A method for manufacturing a semiconductor device, comprising: