JP2804821B2 - Substrate for mounting electronic components - Google Patents

Substrate for mounting electronic components

Info

Publication number
JP2804821B2
JP2804821B2 JP2139289A JP13928990A JP2804821B2 JP 2804821 B2 JP2804821 B2 JP 2804821B2 JP 2139289 A JP2139289 A JP 2139289A JP 13928990 A JP13928990 A JP 13928990A JP 2804821 B2 JP2804821 B2 JP 2804821B2
Authority
JP
Japan
Prior art keywords
terminal
power supply
signal
insulating base
recess
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2139289A
Other languages
Japanese (ja)
Other versions
JPH0432252A (en
Inventor
一 矢津
直人 石田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP2139289A priority Critical patent/JP2804821B2/en
Publication of JPH0432252A publication Critical patent/JPH0432252A/en
Application granted granted Critical
Publication of JP2804821B2 publication Critical patent/JP2804821B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494—Connecting portions
    • H01L2224/4943—Connecting portions the connecting portions being staggered
    • H01L2224/49433—Connecting portions the connecting portions being staggered outside the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は，電子部品搭載用基板，特にその信号用端
子，電源用端子，接地用端子の配設構造に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component mounting board, and more particularly to a structure for arranging signal terminals, power supply terminals, and ground terminals thereof.

〔従来技術〕(Prior art)

第８図に示すごとく，電子部品搭載用基板９は，絶縁
基材90に半導体素子などの電子部品８を搭載するための
凹所98を有すると共に，その表面或いは内部に多数の信
号パターン91を設けている。なお，同図において92はス
ルーホール,96は導体ピンである。As shown in FIG. 8, the electronic component mounting board 9 has a recess 98 for mounting the electronic component 8 such as a semiconductor element on the insulating base material 90, and has a large number of signal patterns 91 on its surface or inside. Provided. In the figure, 92 is a through hole, and 96 is a conductor pin.

また，第８図，第10図に示すごとく，上記電子部品８
と上記信号パターン91の信号用端子910との間には，ボ
ンディングワイヤー81が接続してある。また，電子部品
と電源用端子850又は接地用端子860との間にも，ボンデ
ィングワイヤー81が接続してある。Also, as shown in FIGS.
A bonding wire 81 is connected between the terminal and the signal terminal 910 of the signal pattern 91. A bonding wire 81 is also connected between the electronic component and the power supply terminal 850 or the ground terminal 860.

そして，上記ボンディングワイヤー81の接続は，第10
図に示すごとく，電子部品８に設けられた多数の各接続
端子88と，上記多数の各信号用端子910,電源用端子850,
接地用端子860との間で行われている。そのため，電子
部品搭載用の凹所98の開口周縁には多数の信号用端子，
電源用端子，接地用端子が配列されている。The connection of the bonding wire 81 is made in the tenth
As shown in the figure, a large number of connection terminals 88 provided on the electronic component 8 and a large number of the respective signal terminals 910, power supply terminals 850,
The connection is made between the terminal 860 for grounding. Therefore, a large number of signal terminals are provided around the opening of the recess 98 for mounting electronic components.
Power supply terminals and ground terminals are arranged.

そして，上記開口周縁のこれら各端子は，第９図に示
すごとく，数十〜数百μｍの間隔を置いて密集してい
る。また，各端子において，信号用端子910は外方へ延
在する信号パターン91に配設されている。また，電源用
端子850は電源回路85に，接地用端子860は接地回路86に
それぞれ配設されている。These terminals on the periphery of the opening are densely spaced at intervals of several tens to several hundreds of μm as shown in FIG. In each terminal, the signal terminal 910 is provided on the signal pattern 91 extending outward. The power terminal 850 is provided in the power circuit 85 and the ground terminal 860 is provided in the ground circuit 86.

また，上記電源回路85は，第９図〜第11図に示すごと
く，バイアホール855を経て，絶縁基材90内に設けた内
部電源回路856に連通している。この電源回路856は，前
記導体ピン96を通じて電源に接続されている。一方，上
記接地回路86も，電源回路85と同様に，第９図に示すご
とくバイアホール855を経て，絶縁基材90内に設けた内
部接地回路（図示略）に連通し，アースに接続されてい
る。The power supply circuit 85 communicates with the internal power supply circuit 856 provided in the insulating base material 90 via the via hole 855 as shown in FIGS. 9 to 11. The power supply circuit 856 is connected to a power supply through the conductor pins 96. On the other hand, similarly to the power supply circuit 85, the ground circuit 86 communicates with an internal ground circuit (not shown) provided in the insulating base material 90 via a via hole 855 as shown in FIG. ing.

〔解決しようとする課題〕[Problem to be solved]

ところで，近年，接地用端子の高機能化に伴って，演
算処理速度の高速化が必要となり，特に電子部品への信
号の入出力に使用されるディジタル信号（ON−OFF）の
クロック周波数も，数十MHzから数百MHzへと高周波域に
拡大している。By the way, in recent years, as the function of the grounding terminal has become more sophisticated, it has become necessary to increase the arithmetic processing speed. In particular, the clock frequency of the digital signal (ON-OFF) used for input / output of signals to electronic components has also been increasing. The frequency is expanding from tens of MHz to hundreds of MHz.

しかし，高周波域においてディジタル信号のパルス波
を効率良く入出力させるためには，回路の電気特性とし
ては，キャパシタンス（誘電率）とインダクタンス（磁
気誘導係数）とを小さくする必要がある。この中，キャ
パシタンスは，絶縁基材の材料特性で定められるが，イ
ンダクタンスは配線設計に起因することが多い。However, in order to efficiently input and output a pulse wave of a digital signal in a high frequency range, it is necessary to reduce capacitance (permittivity) and inductance (magnetic induction coefficient) as electrical characteristics of the circuit. Among these, the capacitance is determined by the material characteristics of the insulating base material, but the inductance often results from the wiring design.

特に，電源回路，接地回路は，低インダクタンス回路
が必要であり，その回路パターンは出来るだけ太くする
ことが望まれる。In particular, the power supply circuit and the ground circuit require a low inductance circuit, and it is desired that the circuit pattern be as thick as possible.

そのため，従来の電子部品搭載用基板９においては，
絶縁基材90内における前記内部電源回路856,内部接地回
路を幅広く形成しておき，絶縁基材90の表面の電源用端
子850,接地用端子860は信号用端子910の間に幅狭く設け
ていた。そして，内部電源回路856と電源用端子850間は
上記バイアホールの855で，また内部接地回路と接地用
端子860間は上記バイアホール865で連通させている。Therefore, in the conventional electronic component mounting board 9,
The internal power supply circuit 856 and the internal grounding circuit in the insulating base material 90 are formed widely, and the power supply terminal 850 and the grounding terminal 860 on the surface of the insulating base material 90 are narrowly provided between the signal terminals 910. Was. The via hole 855 connects the internal power supply circuit 856 and the power supply terminal 850, and the via hole 865 connects the internal ground circuit and the grounding terminal 860.

しかしながら，近年は，上記のごとく，電子部品の高
機能により，信号用端子910,電源用端子850,接地用端子
860の数が著しく増大している。そのため，これらを電
子部品搭載用の凹所98の周囲に配線するに当たり，その
設計自由度が著しく制限されてきている。However, in recent years, as described above, due to the high performance of electronic components, signal terminals 910, power supply terminals 850, and ground terminals
The number of 860 has increased significantly. Therefore, when these are wired around the recess 98 for mounting electronic components, the degree of freedom in design is significantly restricted.

また，そのため，上記バイアホール855,865を穿設す
る場所が，極めて少なくなり，その解決対策が強く望ま
れている。即ち，上記開口周縁に高密度配線をすること
ができる方策が切望されている。Therefore, the number of places where the via holes 855 and 865 are to be formed is extremely small, and a solution for the problem is strongly desired. In other words, there is a long-felt need for a measure capable of providing high-density wiring on the periphery of the opening.

本発明はかかる従来の問題点に鑑み，電子部品の高機
能化に対応でき，電子部品搭載用の凹所の開口周縁に高
密度配線ができる電子部品搭載用基板を提供しようとす
るものである。SUMMARY OF THE INVENTION The present invention has been made in view of the above-described conventional problems, and has as its object to provide an electronic component mounting board that can respond to the enhancement of the functions of electronic components and that can perform high-density wiring on the periphery of the opening of the recess for mounting electronic components. .

〔課題の解決手段〕[Solutions to solve the problem]

本発明は，多数の信号パターンを設けた絶縁基材に電
子部品搭載用の凹所を形成してなる電子部品搭載用基板
において，上記凹所の側壁には絶縁基材の外部へ導通さ
せた導体層を設け，また該導体層にはで電源用端子又は
接地用端子を配設してなり，一方，上記凹所の開口周縁
には上記信号パターンに配設した多数の信号用端子を並
列して配置し，かつ該信号用端子の間にはこれと並列し
て上記電源用端子又は接地用端子を配置してなることを
特徴とする電子部品搭載用基板にある。これを第１発明
という。The present invention provides an electronic component mounting substrate in which an electronic component mounting recess is formed in an insulating substrate provided with a large number of signal patterns, and a side wall of the recess is electrically connected to the outside of the insulating substrate. A conductor layer is provided, and a power supply terminal or a ground terminal is provided on the conductor layer. On the other hand, a large number of signal terminals arranged in the signal pattern are arranged in parallel around the opening of the recess. Wherein the power supply terminal or the ground terminal is disposed between the signal terminals in parallel with the signal terminals. This is called a first invention.

該第１発明において最も注目すべきことは，上記凹所
の側壁に外部へ導通させた導体層を設け，該導体層に電
源用端子又は接地用端子を配設したこと，及び凹所の開
口周縁には多数の信号用端子の間にこれと並列して上記
電源用端子，接地用端子を配置したことにある。The most remarkable point of the first invention is that a conductor layer which is electrically connected to the outside is provided on the side wall of the recess, and a power supply terminal or a ground terminal is provided on the conductor layer. On the periphery, the power supply terminal and the grounding terminal are arranged between a large number of signal terminals in parallel with the signal terminals.

そして，上記導体層には電源用端子又は接地用端子の
いずれか一方を設ける。そして，例えば，導体層に電源
用端子を設けた場合には，接地用端子は例えば従来と同
様に設ける。Then, one of a power supply terminal and a ground terminal is provided on the conductor layer. For example, when the power supply terminal is provided on the conductor layer, the ground terminal is provided, for example, in the same manner as in the related art.

また，これら導体層，電源用端子，接地用端子は，例
えば凹所及びその開口周縁に金属メッキを施すことによ
り一体的に設ける。また，導体層は少なくとも上記凹所
の側壁に設けるが，電子部品を接着搭載する底面に設け
ることもできる。The conductor layer, the power supply terminal, and the ground terminal are provided integrally by, for example, applying metal plating to the recess and the periphery of the opening. Further, the conductor layer is provided at least on the side wall of the recess, but may be provided on the bottom surface on which the electronic component is bonded and mounted.

また，導体層を絶縁基材の外部へ導通させる手段とし
ては，絶縁基材内に，スルーホール等の外部へ通する，
幅広の金属層を設ける方法がある。また，凹所下部に設
けた金属放熱板に導体層を直接形成し，両者の間で直接
に電気的導通を図る方法もある。Means for conducting the conductive layer to the outside of the insulating base material include passing through the insulating base material through a through hole or the like.
There is a method of providing a wide metal layer. There is also a method in which a conductor layer is directly formed on a metal radiator plate provided below the recess, and electrical conduction is directly established between the two.

また，上記信号用端子は絶縁基材に設けた信号パター
ンが凹所の開口周縁に向かっている先端部分である。一
方，電源用端子又は接地用端子は，凹所側壁に設けた導
体層の一部分が，凹所の開口周縁へ少し伸びた形状を有
する。そして，信号用端子と電源用端子又は接地用端子
は，凹所開口周縁において，いわば相互乗り入れた状態
に配置されている（第１図参照）。Further, the signal terminal is a leading end portion where the signal pattern provided on the insulating base material is directed toward the periphery of the opening of the recess. On the other hand, the power supply terminal or the ground terminal has a shape in which a part of the conductor layer provided on the side wall of the recess slightly extends to the periphery of the opening of the recess. The signal terminal and the power supply terminal or the grounding terminal are arranged in a so-called mutual manner at the periphery of the opening of the recess (see FIG. 1).

また，本発明においては，第１絶縁基材と第２絶縁基
材を積層して，一方に電源用端子を他方に接地用端子を
形成した積層型の電子部品搭載用基板を構成することも
できる（第４図〜第６図参照）。Further, in the present invention, the first insulating base material and the second insulating base material may be laminated to form a laminated electronic component mounting substrate having a power supply terminal formed on one side and a grounding terminal formed on the other side. (See FIGS. 4 to 6).

即ち，このものは，それぞれに多数の信号パターンを
設けた第１絶縁基材と第２絶縁基材とを積層すると共に
該第１絶縁基材に電子部品搭載用の凹所を設けてなる積
層型電子部品搭載用基板であって，上記凹所の側壁には
第１絶縁基材の外部へ導通させた導体層を設け，また該
導体層には電源用端子又は接地用端子を配設してなり，
一方上記凹所の開口周縁には上記信号パターンに配設し
た多数の信号用端子を並列して配置し，また該信号用端
子の間にはこれと並列して上記電源用端子又は接地用端
子を配置してなる。更に，上記第２絶縁基材には，上記
第１絶縁基材上の上記電源用端子，接地用端子，信号用
端子よりも外周に開口する開口部を設けてなり，また該
開口部の第２側壁には第２絶縁基材の外部へ導通させた
第２導体層を設け，また該第２導体層には接地用端子又
は電源用端子を配設してなり，一方，上記開口部の開口
周縁には信号パターンに配設した多数の信号用端子を並
列して配置し，また該信号用端子の間にはこれと並列し
て上記第２導体層に配設した接地用端子又は電源用端子
を配置したことを特徴とする。That is, this is a laminated structure in which a first insulating base provided with a large number of signal patterns and a second insulating base are provided, and a recess for mounting electronic components is provided in the first insulating base. A conductive layer which is provided on the side wall of the recess and is electrically connected to the outside of the first insulating base material, and a power supply terminal or a ground terminal is disposed on the conductive layer. Become
On the other hand, a large number of signal terminals arranged in the signal pattern are arranged in parallel on the periphery of the opening of the recess, and the power supply terminal or the ground terminal is arranged in parallel between the signal terminals. Is arranged. Further, the second insulating base is provided with an opening which is opened on the outer periphery of the power supply terminal, the grounding terminal, and the signal terminal on the first insulating base. The second side wall is provided with a second conductor layer electrically connected to the outside of the second insulating base material, and the second conductor layer is provided with a ground terminal or a power supply terminal. A large number of signal terminals arranged in a signal pattern are arranged in parallel at the periphery of the opening, and a ground terminal or a power supply arranged in parallel with the second conductor layer between the signal terminals. Terminal is disposed.

この積層型基板において最も注目すべきことは，第１
絶縁基材と第２絶縁基材を積層し，第１絶縁基材に設け
た電子部品搭載用の凹所及びその開口周縁には，前記第
１発明と同様に第１導体層及び相互乗り入れした信号用
端子と電源用端子（又は接地用端子）を設けること，ま
た第２絶縁基材の開口部及びその開口周縁には第２導体
層及び相互乗り入れした信号用端子と接地用端子（又は
電源用端子）を設けることである。The most remarkable thing about this laminated substrate is the first
The insulating base material and the second insulating base material are laminated, and the first conductor layer and the recesses for mounting electronic components provided on the first insulating base material and the opening periphery thereof are laid in the same manner as in the first invention. A signal terminal and a power terminal (or a ground terminal) are provided, and a second conductor layer and a signal terminal and a ground terminal (or a power Terminal).

そして，上記電源用端子は，第１絶縁基材側又は第２
絶縁基材側のいずれか一方に設け，該電源用端子を設け
なかった側に接地用端子を設ける。The power supply terminal is connected to the first insulating base material side or the second insulating base material side.
A grounding terminal is provided on one side of the insulating base material side and the power supply terminal is not provided.

また，上記第１導体層，第２導体層，電源用端子，接
地用端子の形状などは，上記第１発明と同様である。The shapes of the first conductor layer, the second conductor layer, the power supply terminal, and the ground terminal are the same as those of the first invention.

〔作用及び効果〕[Action and effect]

上記第１発明において，電源用端子又は接地用端子
は，電子部品の接続端子にボンディングワイヤーにより
接続する。そして，該電源用端子又は接地用端子は，凹
所側壁の導体層を通じて，絶縁基材外部の電源又はアー
スと接続される。また，信号用端子についても電子部品
の接続端子とボンディングワイヤーにより接続する。該
信号用端子は，信号パターンに導通している。In the first invention, the power supply terminal or the ground terminal is connected to the connection terminal of the electronic component by a bonding wire. The power supply terminal or the ground terminal is connected to a power supply or ground outside the insulating base material through the conductor layer on the side wall of the recess. Also, the signal terminal is connected to the connection terminal of the electronic component by a bonding wire. The signal terminal is electrically connected to the signal pattern.

そして，上記導体層は凹所の側壁に設けられ，その導
通面積が大きいので，電源回路又は接地回路を大きくす
ることができ，電源回路又は接地回路を低インダクタン
ス回路とすることができる。Since the conductive layer is provided on the side wall of the recess and has a large conduction area, the power supply circuit or the ground circuit can be enlarged, and the power supply circuit or the ground circuit can be a low inductance circuit.

また，電源用端子，接地用端子の配設に当たっては，
従来のごとく，バイアホールを穿設しない。そのため，
上記凹所の開口周縁にバイアホールを設ける必要がな
い。それ故，該開口周縁のスペースに余裕が生じ，従来
に比してより多くの信号用端子，電源用端子，接地用端
子を配置することができる。それ故，高密度配線が可能
となる。即ち，バイアホールは直径約0.3mm必要である
のに対し，各回路の線幅，端子幅は0.1mm以下である。
それ故，バイアホールの省略は大きなスペースを生むこ
とになる。When arranging the power supply terminal and the grounding terminal,
No via hole is formed as in the past. for that reason,
There is no need to provide a via hole around the opening of the recess. Therefore, there is a margin in the space around the opening, and more signal terminals, power supply terminals, and ground terminals can be arranged as compared with the related art. Therefore, high-density wiring becomes possible. That is, the via hole requires a diameter of about 0.3 mm, while the line width and terminal width of each circuit are 0.1 mm or less.
Therefore, omitting via holes creates a large space.

更に，信号用端子，電源用端子又は接地用端子は，並
列配置してあるので，電子部品の接続端子と上記各端子
間はほぼ同じとすることができ，ボンディングワイヤー
の接続が容易である。Further, since the signal terminal, the power supply terminal, and the ground terminal are arranged in parallel, the connection terminal of the electronic component and each of the above terminals can be substantially the same, and the connection of the bonding wire is easy.

したがって，第１発明によれば，電子部品の高機能化
に対応でき，電子部品搭載用の凹所の開口周縁に高密度
配線ができる電子部品搭載用基板を提供することができ
る。Therefore, according to the first invention, it is possible to provide an electronic component mounting board which can cope with higher functions of the electronic component and can perform high-density wiring on the periphery of the opening of the electronic component mounting recess.

また，上記第２発明においては，第１絶縁基材と第２
絶縁基材のそれぞれの凹所，開口部に導体層を設け，上
記第１発明と同様に各開口周縁に信号用端子と電源用端
子，信号用端子と接地用端子を並列配置している。In the second invention, the first insulating base material and the second
A conductor layer is provided in each of the recesses and openings of the insulating base material, and a signal terminal and a power supply terminal, and a signal terminal and a ground terminal are arranged in parallel at the periphery of each opening as in the first invention.

それ故，上記第１発明と同様と効果を得ることができ
る。また，該第２発明においては，一方の開口周縁に信
号用端子と電源用端子，他方の開口周縁に信号用端子と
接地用端子を二層に設けているので，凹所内の電子部品
に対して各端子を数多く配置することができる。それ
故，第１発明に比して配線数を約２倍とすることがで
き，より一層電子部品の高機能化に対応することができ
る。Therefore, effects similar to those of the first aspect can be obtained. In the second invention, the signal terminal and the power supply terminal are provided on one edge of the opening, and the signal terminal and the ground terminal are provided on the other edge of the opening in two layers. Many terminals can be arranged. Therefore, the number of wirings can be approximately doubled as compared with the first invention, and it is possible to further cope with higher performance of electronic components.

〔実施例〕〔Example〕

第１実施例 第１発明の実施例にかかる電子部品搭載用基板につ
き，第１図〜第３図を用いて説明する。First Embodiment An electronic component mounting board according to an embodiment of the first invention will be described with reference to FIGS.

本例の電子部品搭載用基板は，多数の信号パターン４
を設けた絶縁基材60に電子部品搭載用の凹所68を形成
し，該凹所68の側壁には絶縁基材60の外部へ導通させた
導体層１を設け，該導体層１には電源用端子30を配設し
てなる。そして，上記凹所68の開口周縁には，上記信号
パターン４に配設した信号用端子40を並列して配置し，
かつ該信号用端子40の間にはこれと並列して上記電源用
端子30を配置している。The electronic component mounting board of this example has a large number of signal patterns 4.
A recess 68 for mounting electronic components is formed in the insulating base 60 provided with the conductive layer 1 provided on the side wall of the recess 68 so as to conduct to the outside of the insulating base 60. A power supply terminal 30 is provided. The signal terminals 40 arranged in the signal pattern 4 are arranged in parallel on the periphery of the opening of the recess 68,
The power supply terminal 30 is arranged between the signal terminals 40 in parallel with the signal terminal.

上記導体層１は，第２図，第３図に示すごとく，凹所
68の側壁に形成し側壁導体層10と，その底面に形成した
底面導体層11とよりなる。そして，側壁導体層10は，絶
縁基材60の内部に設けた内部電源回路12に接続されてい
る。該電源回路12は，外部電源に接続されている。上記
導体層１及び電源用端子30は，銅メッキにより同時形成
してある。As shown in FIGS. 2 and 3, the conductor layer 1 has a recess.
It comprises a side wall conductor layer 10 formed on 68 side walls and a bottom surface conductor layer 11 formed on the bottom surface thereof. The side wall conductor layer 10 is connected to the internal power supply circuit 12 provided inside the insulating base material 60. The power supply circuit 12 is connected to an external power supply. The conductor layer 1 and the power supply terminal 30 are simultaneously formed by copper plating.

そして，凹所の68の開口周縁には，第１図，第３図に
示すごとく，該凹所68に向けて，信号パターン４の信号
用端子40が多数，並列配置されている。一方，多数の該
信号用端子40の間には，導体層１側から伸びた電源用端
子30が，信号用端子40と並列して配置されている。As shown in FIGS. 1 and 3, a large number of signal terminals 40 of the signal pattern 4 are arranged in parallel at the periphery of the opening of the recess 68 toward the recess 68 as shown in FIGS. On the other hand, between the signal terminals 40, the power terminals 30 extending from the conductor layer 1 side are arranged in parallel with the signal terminals 40.

また，第１図，第３図に示すごとく，上記信号用端子
40の間には，接地用端子35が配置してあり，該接地用端
子35は絶縁基材上に設けた接地回路350に導通してい
る。なお，この場合，できるだけ配線路長さを短くする
ため，接地回路は最内周のピンへ接続することが好まし
い。As shown in FIG. 1 and FIG.
Ground terminals 35 are arranged between the terminals 40, and the ground terminals 35 are electrically connected to a ground circuit 350 provided on an insulating base material. In this case, it is preferable to connect the ground circuit to the innermost pin in order to make the length of the wiring path as short as possible.

次に，上記のごとく構成した電子部品搭載用基板に
は，第２図に示すごとく，その凹所68内に電子部品８を
搭載する。そして，第１図に示すごとく，該電子部品８
の接続端子88と，上記電源用端子30,信号用端子4,接地
用端子35との間に，ボンディングワイヤー５を接続す
る。Next, as shown in FIG. 2, the electronic component 8 is mounted in the recess 68 on the electronic component mounting board configured as described above. Then, as shown in FIG.
The bonding wire 5 is connected between the connection terminal 88 and the power supply terminal 30, the signal terminal 4, and the ground terminal 35.

次に，作用効果につき説明する。 Next, the function and effect will be described.

本例の電子部品搭載用基板においては，電源用端子30
を接続した導体層１が，凹所68の側壁及び底面に設けて
あるので，電源回路を大きく取ることができる。それ
故，該電源回路を低インダクタンス回路とすることがで
き，電子部品の高機能化に対応できる。In the electronic component mounting board of this example, the power supply terminals 30
Are provided on the side walls and the bottom surface of the recess 68, so that the power supply circuit can be made large. Therefore, the power supply circuit can be a low-inductance circuit, and it is possible to cope with higher functions of electronic components.

また，電源用端子30,接地用端子35の配設に当たって
は，従来のごとくバイアホールを設けていない。それ
故，開口周縁のスペースに余裕が生じ，より多くの信号
用端子4,電源用端子30,接地用端子35を配置でき，高密
度配線が可能となる。In arranging the power supply terminal 30 and the grounding terminal 35, no via hole is provided as in the related art. Therefore, there is room in the space around the opening, and more signal terminals 4, power supply terminals 30, and grounding terminals 35 can be arranged, and high-density wiring is possible.

また，信号用端子４と電源用端子30,接地用端子35
は，並列配置してあるので，これら各端子と電子部品８
の接続端子88との間におけるボンディングワイヤー５の
接続が容易である。Also, the signal terminal 4 and the power supply terminal 30 and the grounding terminal 35
Are arranged in parallel, so that each of these terminals and electronic components 8
The connection of the bonding wire 5 to the connection terminal 88 is easy.

なお，上記電源用端子30と接地用端子35とはその位置
を逆にすることもできる。即ち，電源用端子30を接地用
端子，接地用端子35を電源用端子として使用することも
できる。The positions of the power supply terminal 30 and the grounding terminal 35 can be reversed. That is, the power supply terminal 30 can be used as a ground terminal and the ground terminal 35 can be used as a power supply terminal.

第２実施例 第２発明の実施例にかかる電子部品搭載用基板につ
き，第４図〜第６図を用いて説明する。Second Embodiment An electronic component mounting board according to an embodiment of the second invention will be described with reference to FIGS.

本例の電子部品搭載用基板は，それぞれ多数の信号パ
ターン４を設けた第１絶縁基材60と第２絶縁基材62とを
積層すると共に，該第１絶縁基材60に第１実施例と同様
に電子部品搭載用の凹所68を設けてなう積層型の電子部
品搭載用基板である。The electronic component mounting board of this embodiment has a first insulating base 60 provided with a large number of signal patterns 4 and a second insulating base 62, and the first insulating base 60 is provided on the first insulating base 60. This is a laminated electronic component mounting substrate provided with an electronic component mounting recess 68 in the same manner as described above.

上記凹所86の側壁には，第１実施例と同様に外部へ導
通させた導体層１を設け，該導体層１には電源用端子３
を配設してなる。一方，上記凹所68の開口周縁には，上
記信号パターン４に配設した多数の信号用端子40を並列
して配置し，また該信号用端子40の間にはこれと並列し
て上記電源用端子30を配置している。On the side wall of the recess 86, a conductor layer 1 which is electrically connected to the outside is provided as in the first embodiment.
It is arranged. On the other hand, on the periphery of the opening of the recess 68, a number of signal terminals 40 arranged in the signal pattern 4 are arranged in parallel, and between the signal terminals 40, the power Terminals 30 are arranged.

更に，上記第２絶縁基材62には，第１絶縁基材60上の
上記電源用端子30,信号用端子40よりも外周に開口する
開口部69（第５図，第６図）を設ける。また，該開口部
69の第２側壁には第２絶縁基材62の外部へ導通させた第
２導体層２を設ける。また，該第２導体層２には，接地
用端子35を配設する。Further, the second insulating base 62 is provided with an opening 69 (FIGS. 5 and 6) which opens on the outer periphery of the power supply terminal 30 and the signal terminal 40 on the first insulating base 60. . The opening
On the second side wall of 69, a second conductor layer 2 which is conducted to the outside of the second insulating base 62 is provided. Further, a ground terminal 35 is provided on the second conductor layer 2.

一方，開口部69の開口周縁には信号パターン４に配設
した多数の信号用端子40を並配置する。また，該信号用
端子40の間にはこれと並列して，上記第２導体層２に配
設した接地用端子35を配置する。On the other hand, a large number of signal terminals 40 arranged in the signal pattern 4 are arranged side by side on the periphery of the opening 69. Further, between the signal terminals 40, a ground terminal 35 disposed on the second conductor layer 2 is arranged in parallel with the signal terminals.

また，上記第２導体層２の側壁導体層20は，内部接地
回路22と接続する。また，該内部接地回路22と，該縁基
材60上面の信号パターン４との間には，プリプレグ絶縁
基材66が介設されている。The side wall conductor layer 20 of the second conductor layer 2 is connected to the internal ground circuit 22. Further, a prepreg insulating base material 66 is provided between the internal ground circuit 22 and the signal pattern 4 on the upper surface of the edge base material 60.

次に，上記積層型の電子部品搭載用基板においては，
第４図，第５図に示すごとく，その凹所68内に，電子部
品８を搭載する。そして，該電子部品８の接続端子88
と，凹所68の開口周縁上の電源用端子30,信号用端子49
との間にボンディングワイヤー51を接続する。また，接
続端子88と開口部69の開口周縁上の接地用端子35,信号
用端子40との間にもボンディングワイヤー52を接続す
る。その他は，第１実施例と同様である。Next, in the above-mentioned multilayer electronic component mounting substrate,
As shown in FIGS. 4 and 5, the electronic component 8 is mounted in the recess 68. The connection terminal 88 of the electronic component 8
And the power supply terminal 30 and the signal terminal 49 on the periphery of the opening of the recess 68.
And a bonding wire 51 is connected between them. The bonding wire 52 is also connected between the connection terminal 88 and the ground terminal 35 and the signal terminal 40 on the periphery of the opening 69. Others are the same as the first embodiment.

本例によれば，第１実施例と同様の効果を得ることが
できる。According to this embodiment, the same effect as that of the first embodiment can be obtained.

また，本例の積層型の電子部品搭載用基板において
は，凹所68の開口周縁，開口部69の開口周縁に，それぞ
れ電源用端子30と信号用端子40,接地用端子35と信号用
端子40を並列配置しているので，第１実施例に比して，
より高密度の配線を行うことができる。In the laminated electronic component mounting board of this example, the power supply terminal 30 and the signal terminal 40, the ground terminal 35 and the signal terminal are provided around the opening edge of the recess 68 and the opening edge of the opening 69, respectively. Since 40 are arranged in parallel, compared to the first embodiment,
Higher density wiring can be performed.

また，電源用端子30と接地用端子35を，導体層1,第２
導体層２にそれぞれ配設しているので，電源回路，接地
回路を共に低インダクタンスとすることができる。な
お，電源用端子30と接地用端子35とは，その用途（電源
用，接地用）を逆にして用いることもできる。The power supply terminal 30 and the grounding terminal 35 are connected to the conductor layer 1 and the second
Since the power supply circuit and the ground circuit are provided on the conductor layer 2, both the power circuit and the ground circuit can have low inductance. In addition, the power supply terminal 30 and the grounding terminal 35 can be used with their uses (for power supply and grounding) reversed.

第３実施例 本例は，第２実施例において，凹所68の下部に金属製
の放熱板18を設けたものである。Third Embodiment This embodiment is different from the second embodiment in that a metal radiator plate 18 is provided below the recess 68.

そして，該放熱板18の上面には，導体層１の底面導体
層11を設ける。また，放熱板18の下面及び絶縁基材60の
下面には，金属メッキ層181を設ける。該金属メッキ層1
81は，電源回路として用いる。そのため，電源用端子30
は導体層1,放熱板18,金属メッキ層181を通じて外部電源
に接続されている。その他は，第２実施例と同様であ
る。Then, on the upper surface of the heat sink 18, a bottom conductor layer 11 of the conductor layer 1 is provided. Further, a metal plating layer 181 is provided on the lower surface of the heat sink 18 and the lower surface of the insulating base material 60. The metal plating layer 1
81 is used as a power supply circuit. Therefore, the power supply terminal 30
Is connected to an external power supply through the conductor layer 1, the heat sink 18, and the metal plating layer 181. Others are the same as the second embodiment.

本例によれば，第２実施例と同様の効果を得ることが
できる。According to this embodiment, the same effects as in the second embodiment can be obtained.

また，放熱板18を設けたので，電子部品８の放熱を促
進させることができる。Further, since the heat radiating plate 18 is provided, heat radiation of the electronic component 8 can be promoted.

【図面の簡単な説明】[Brief description of the drawings]

第１図〜第３図は第１実施例の電子部品搭載用基板の要
部を示し，第１図はその平面図，第２図は側面断面図，
第３図は斜視図，第４図〜第６図は第２実施例の積層型
電子部品搭載用基板の要部を示し，第４図はその平面
図，第５図は側面断面図，第６図は斜視図，第７図は第
３実施例の積層型電子部品搭載用基板の要部断面図，第
８図〜第11図は従来の電子部品搭載用基板を示し，第８
図はその側面図，第９図及び第10図は要部平面図，第11
図は第10図のＹ−Ｙ線矢視断面図である。 １……導体層， ２……第２導体層， 30……電源用端子， 35……接地用端子， ４……信号パターン， 40……信号用端子， 5,51,52……ボンディングワイヤー， 60……絶縁基材， 62……第２絶縁基材， ８……電子部品， 88……接続端子，1 to 3 show the essential parts of the electronic component mounting board of the first embodiment, FIG. 1 is a plan view thereof, FIG.
3 is a perspective view, FIGS. 4 to 6 show the essential parts of the multilayer electronic component mounting board of the second embodiment, FIG. 4 is a plan view thereof, FIG. 6 is a perspective view, FIG. 7 is a cross-sectional view of a principal part of the multilayer electronic component mounting board of the third embodiment, and FIGS. 8 to 11 show a conventional electronic component mounting board.
The figure is a side view, FIGS. 9 and 10 are plan views of essential parts, and FIG.
The figure is a sectional view taken along the line YY in FIG. 1 ... conductor layer, 2 ... second conductor layer, 30 ... power supply terminal, 35 ... ground terminal, 4 ... signal pattern, 40 ... signal terminal, 5, 51, 52 ... bonding wire , 60 ... insulating base material, 62 ... second insulating base material, 8 ... electronic components, 88 ... connection terminal,

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6，ＤＢ名) H01L 23/12──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 6 , DB name) H01L 23/12

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】多数の信号パターンを設けた絶縁基材に電
子部品搭載用の凹所を形成してなる電子部品搭載用基板
において， 上記凹所の側壁には絶縁基材の外部へ導通させた導体層
を設け，また該導体層には電源用端子又は接地用端子を
配設してなり， 一方，上記凹所の開口周縁には上記信号パターンに配設
した多数の信号用端子を並列して配置し，かつ該信号用
端子の間にはこれと並列して上気電源用端子又は接地用
端子を配置してなることを特徴とする電子部品搭載用基
板。1. An electronic component mounting substrate comprising a plurality of signal patterns provided on an insulating substrate and having electronic component mounting recesses formed thereon, wherein a side wall of the recess is electrically connected to the outside of the insulating substrate. A power supply terminal or a grounding terminal is provided on the conductor layer. On the other hand, a large number of signal terminals provided in the signal pattern are arranged in parallel around the opening of the recess. An electronic component mounting board characterized in that an upper power supply terminal or a ground terminal is arranged in parallel with the signal terminals between the signal terminals. 【請求項２】それぞれに多数の信号パターンを設けた第
１絶縁基材と第２絶縁基材とを積層すると共に該第１絶
縁基材に電子部品搭載用の凹所を設けてなる積層型電子
部品搭載用基板であって， 上記凹所の側壁には第１絶縁基材の外部へ導通させた導
体層を設け，また該導体層には電源用端子又は接地用端
子を配設してなり，一方上記凹所の開口周縁には上記信
号パターンに配設した多数の信号用端子を並列して配置
し，また該信号用端子の間にはこれと並列して上記電源
用端子又は接地用端子を配置してなり， 更に，上記第２絶縁基材には，上記第１絶縁基材上の上
記電源用端子，接地用端子，信号用端子よりも外周に開
口する開口部を設けてなり，また該開口部の第２側壁に
は第２絶縁基材の外部へ導通させた第２導体層を設け，
また該第２導体層には接地用端子又は電源用端子を配設
してなり， 一方，上記開口部の開口周縁には信号パターンを配設し
た多数の信号用端子を並列して配置し，また該信号用端
子の間にはこれと並列して上記第２導体層に配設した接
地用端子又は電源用端子を配置したことを特徴とする電
子部品搭載用基板。2. A lamination type wherein a first insulating base material provided with a large number of signal patterns and a second insulating base material are laminated, and a recess for mounting electronic components is provided in the first insulating base material. An electronic component mounting board, comprising: a conductive layer provided to the outside of the first insulating base material on a side wall of the recess; and a power supply terminal or a ground terminal provided on the conductive layer. On the other hand, a large number of signal terminals arranged in the signal pattern are arranged in parallel around the opening of the recess, and the power terminal or ground is arranged in parallel with the signal terminals between the signal terminals. And an opening that opens more outward than the power supply terminal, the grounding terminal, and the signal terminal on the first insulating base material. A second conductor layer is provided on the second side wall of the opening so as to conduct to the outside of the second insulating base material;
A grounding terminal or a power supply terminal is disposed on the second conductor layer. On the other hand, a large number of signal terminals on which signal patterns are disposed are arranged in parallel on the periphery of the opening. An electronic component mounting board, wherein a ground terminal or a power terminal disposed on the second conductor layer is disposed in parallel with the signal terminal between the signal terminals.
JP2139289A 1990-05-29 1990-05-29 Substrate for mounting electronic components Expired - Lifetime JP2804821B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2139289A JP2804821B2 (en) 1990-05-29 1990-05-29 Substrate for mounting electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2139289A JP2804821B2 (en) 1990-05-29 1990-05-29 Substrate for mounting electronic components

Publications (2)

Publication Number Publication Date
JPH0432252A JPH0432252A (en) 1992-02-04
JP2804821B2 true JP2804821B2 (en) 1998-09-30

Family

ID=15241818

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2139289A Expired - Lifetime JP2804821B2 (en) 1990-05-29 1990-05-29 Substrate for mounting electronic components

Country Status (1)

Country Link
JP (1) JP2804821B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5672909A (en) * 1995-02-07 1997-09-30 Amkor Electronics, Inc. Interdigitated wirebond programmable fixed voltage planes
JP3382482B2 (en) * 1996-12-17 2003-03-04 新光電気工業株式会社 Method of manufacturing circuit board for semiconductor package

Also Published As

Publication number Publication date
JPH0432252A (en) 1992-02-04

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