JP2792627B2 - Digital signal recording / reproducing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a digital signal recording / reproducing apparatus, and more particularly to a digital signal recording / reproducing apparatus which records a digital signal while sequentially forming a large number of parallel tracks on a recording medium, and performs recording from the recording medium. The present invention relates to a digital signal recording / reproducing apparatus for reproducing a digital signal obtained by the above-mentioned method. 2. Description of the Related Art Hereinafter, in this specification, a digital video tape recorder (DVTR) will be described as an example of this type of apparatus. In general, for a device such as a DVTR that records a large amount of digital data on a recording medium, recording and reproduction are performed for each data group (sync block) in which a predetermined amount of information (video) data is added with a predetermined sync (synchronization) data. I do. This causes data loss and data playback timing shift due to recording or playback system jitter or dropout during data playback. However, by detecting periodically recorded sync data, data loss or the like occurs. The purpose is to keep the occurrence to a minimum. However, data reproduced through the recording / reproducing system causes a data error due to a dropout or the like, and accordingly, erroneous detection of erroneously detecting sync data and loss of synchronization where sync data cannot be detected often occur. When such a synchronization loss occurs, serious deterioration occurs in the reproduction information (image). Therefore, the timing at which the sync data is generated is predicted in advance, the configuration is such that the sync data can be detected only for a period of several data to be reproduced, and the configuration is designed to avoid erroneous detection. Has performed so-called synchronization protection processing such as compensating timing in synchronization with the previous sync data. Thus, a stable reproduced image can be obtained without any problem during normal reproduction. [Problems to be Solved by the Invention] However, in the case of the conventional apparatus as described above, when the reproduction head traces in the direction intersecting the track, for example,
When performing special reproduction such as high-speed search reproduction or slow motion reproduction in DVTR, a reproduction signal is obtained only intermittently, and continuity of sync data is lost. As a result, it becomes difficult to perform the above-described synchronization protection processing, and it becomes impossible to read data during the special reproduction as described above, and it is impossible to obtain good reproduced data. SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to provide a digital signal recording / reproducing apparatus capable of synchronizing protection and reproducing a digital signal even when a reproducing head traces in a direction crossing a track. The purpose is. [Means for Solving the Problems] Under such a purpose, according to the present invention, a digital signal is recorded while sequentially forming a large number of tracks in parallel on a recording medium, and recorded from the recording medium. In an apparatus for reproducing digital signals, means for adding sync data for each sync block including a predetermined amount of digital data, and aligning the sync data in at least the plurality of tracks in the track width direction to record the sync data on the recording medium Recording means for recording, reproducing means for reproducing the digital signal from the recording medium, gating means for gating an output of the reproducing means in accordance with a window pulse for gating at a predetermined period for a predetermined period, and an output of the gating means Means for separating the sync data from the data, and digitally using the sync data separated by the separation means. A normal reproduction mode for reproducing the digital signal at the same speed as at the time of recording, and a special reproduction mode for reproducing the digital signal at a different speed from that at the time of recording. In any case, the restoration means restores the digital signal using the sync data separated from the output of the gate means. [Operation] With the above configuration, even when the reproduction head traces in the direction intersecting the track, since the sync data reproduced at the time of the track jump is continuous, synchronization by the gate using the window pulse is used. Protection becomes possible. As a result, digital signals can be reproduced. [Embodiment] Hereinafter, a DVTR as an embodiment of the present invention will be described. FIG. 1 is a diagram showing a schematic configuration of a VTR of this embodiment,
The description will be made in the following order. It is assumed that a luminance signal (Y) and a color difference signal (I, Q) of a video signal conforming to the NTSC signal are input to the terminal 1 in parallel, and Y is 4fsc (fsc is a color subcarrier frequency), I, Q Is sampled at a quarter of the frequency, and in this output data, the data is thinned out so that the sampling points do not line up in the vertical direction between adjacent lines due to interlace scanning. That is, analog-digital (A /
D) The converter 2 performs so-called subsampling. At this time, the number of sample points of Y per one horizontal scanning period (1H) (3.
58M ÷ 15.75K) × 4/2, which is 455. Actually, only the effective screen is converted into data, and the number is 372 per 1H. Also I, Q
Is about 1/4 of 96. The output data of the A / D converter 2 is supplied to the memory 3 and the ECC (error correction code) adding circuit 4 adds the ECC. Here, the video data block as a unit to which the ECC is added has a data amount corresponding to an image of an area obtained by dividing one screen (one field) into 4 × 3 as shown by the hatched portion in FIG. That is, if the number of effective horizontal scanning lines is 240,
Y at 60 vertical x 124 horizontal (= 372/3) sample points and 60 vertical
× Includes I and Q data at 32 (= 96/3) sample points. This is arranged on the memory 3 as shown in the lower diagram of FIG.
Code C1 and code C2 are added as shown in the figure, and (192 × 6
4) Obtain data blocks. Here, the numbers in the figure represent the number of bytes, and the data at each sample point is assumed to be composed of 8 bits (1 byte). Reference numeral 5 denotes a circuit for adding 3 bytes of data (X) including 1-byte sync data (Sync), additional data of each sync block, and a redundant code for the additional data for each of the 384-byte data. In addition, a 392-byte sync block is obtained. FIG. 3 shows video data Vd
FIG. 3 is a diagram showing one sink block including the following. The data to which the sync data and the data X have been added by the circuit 5 are subjected to, for example, 8-8 mapping coding to remove the DC component in the modulation circuit 6 and then converted to serial data by the parallel-serial (P / S) converter 7. Is converted. The serialized data is supplied as a digital signal to a recording / reproducing unit 9 via a recording amplifier 8, and is recorded on a magnetic tape (not shown) by a rotating head (not shown). FIG. 4 is a diagram showing a recording pattern on a magnetic tape by the DVTR of this embodiment. As shown, in the DVTR of this embodiment, + azimuth tracks and -azimuth tracks are alternately arranged, and between the tracks of the same azimuth, the sync blocks are arranged so as to be aligned in the track width direction. . That is, in the VTR of this embodiment, by appropriately setting the data amount of the sync block, the rotation speed of the rotary head, the track pitch, the tracing direction of the rotary head, and the like, the sync data is aligned in the track width direction as shown in FIG. It is configured to do. In FIG. 4, SB0-0, SB1-0, SB
0-1, SB1-1, SB0-2, SB0-3, etc. indicate recording areas of the sync block, respectively, and the hatching indicates a portion where data is not recorded. In FIG. 1, a signal reproduced from the recording / reproducing unit 9 is amplified by a reproducing amplifier 10 to a level convenient for signal processing. A clock reproducing circuit 11 extracts a clock component included in data from an output of the reproducing amplifier 10 by using a method such as a PLL. The data shaping circuit 12 is a clock reproducing circuit 11
Using a clock of a constant frequency synchronized with the extracted reproduction signal, the signal which is distorted in the recording / reproduction system output from the reproduction amplifier 10 is synchronized and shaped into a data sequence with proper timing. The shaped data sequence is supplied to the synchronization detection circuit 13 and detects the above-mentioned 8-bit sync pattern included in the data sequence. That is, the sync pattern and the data string output by the data shaping circuit 12 are compared for each bit, and if all bits match, it is regarded as sync data and a sync pulse is output. However, in this method, if the same specific bit pattern as this sync pattern appears in the reproduced data by mistake, it may be mistakenly regarded as the sync pattern. This state is shown in FIG. SY in Fig. 5
-1 indicates an output of the synchronization detection circuit 13, and a pulse indicated by X in the figure is a pulse associated with the erroneous detection. If the timing of each part of the apparatus is determined by a pulse accompanying such an erroneous detection, all reproduced data thereafter will be erroneous data. Therefore, based on the clock extracted by the clock reproducing circuit 11, a window pulse (window signal) indicating a period of several to several tens of clocks before and after the sync data in a cycle in which the sync data is to be reproduced is created. The pulse obtained from the synchronization detection circuit 13 within the period indicated by the pulse is gated by the AND gate 16, and the output of the AND gate 16 is used as a true synchronization pulse, thereby preventing errors in reproduced data due to erroneous detection of sync data. it can. This window pulse (indicated by W-1 in FIG. 5) is a timing signal generating circuit.
It is generated by the window signal generation circuit 15 using the pulse generated in 14 and obtained in synchronization with the reproduction of the sync data. If the detection timing of the window pulse and the sync data is shifted or if the sync data to be reproduced is missing, it is determined that the sync pulse has not been detected within the window pulse period. Circuit 17 detects. The loss detecting circuit 17 counts up the counter 18 every time a synchronization loss is detected. The count value M of the counter 8 indicates the number of times of continuous synchronization loss, and the count value M is supplied to the window signal generating circuit 15 to determine the pulse width of the window pulse. That is, the pulse width of the window pulse is configured to increase as the count value M of the counter 18 increases. FIG. 5 shows SY-2 in which sync data is missing (dotted line is a missing portion), W-2 is a window pulse, and M is the count value of the counter 18. The counter 18 is reset by the synchronizing pulse gated by the AND gate 16, and the count value M is always 0 in a steady state. At the time of normal reproduction, the count value M of the counter 18 is 0 during most of the period and becomes 1 only when a data error occurs in the sync data by chance. Therefore, no synchronization disorder occurs, and the data string output from the data shaping circuit 12 is converted into a serial-parallel (S / P) conversion circuit 20 by the timing pulse from the timing signal generating circuit 14.
After the data is converted into parallel data, the data is demodulated by a demodulation circuit 20 that performs a process reverse to that of the modulation circuit 6, and then supplied to a memory 21.
The data stored in the memory 21 is subjected to error correction by an ECC decoding circuit 22, and then is subjected to digital-analog (D / A)
The signal is converted back to the original analog signal via the converter 23 and
Output. On the other hand, at the time of special reproduction, for example, at the time of high-speed reproduction, the tape is conveyed at several times the speed at the time of recording by a tape drive system (not shown), so that the envelope waveform of the reproduction signal is shown in FIG.
It becomes as shown with. The dotted line Th in FIG. 6 indicates the lowest possible level of data detection. Therefore, during high-speed reproduction, a period during which data cannot be reproduced intermittently occurs. In this period, naturally, sync data cannot be detected. In the DVTR of the above-described embodiment, the recording position of the sync data is aligned in the track width direction between adjacent azimuth tracks, and the width of the window pulse is expanded in response to the lack of synchronization. Even if the positional accuracy is slightly degraded, a synchronization pulse can be reliably obtained from the sync data immediately after the track jump. Therefore, as long as the envelope has reached a level sufficient for data detection, recorded data can be restored, and the image quality at the time of high-speed reproduction can be improved as compared with the related art. FIG. 7 is a diagram showing another example of the recording pattern on the recording medium. In this example, it is set so that the sync data is aligned in the track width direction for all the tracks. It goes without saying that the same effect as in the above-described embodiment can be obtained in a DVTR that performs recording in a recording pattern as shown in FIG. In this specification, a DVTR is taken as an example, and high-speed reproduction is taken as an example of reproduction with a track jump. However, the scope of the present invention is not limited to this. For example, in a digital audio recorder, additional information may be added. The same effect can be obtained when only the tape is reproduced by running the tape at a high speed. [Effects of the Invention] As described above, according to the present invention, even when the reproducing head traces in the direction intersecting the track, the digital signal recording that can more reliably and satisfactorily reproduce the digital signal. A playback device can be obtained.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram showing a schematic configuration of a DVTR as one embodiment of the present invention, FIG. 2 is a diagram for explaining video data to be recorded, and FIG. 3 is a diagram showing a video sync block. FIG. 4 is a diagram showing a recording pattern by the DVTR shown in FIG. 1, FIG. 5 is a timing chart showing the operation of the DVTR shown in FIG. 1, and FIG. 6 is a diagram showing a high-speed reproduction of the DVTR shown in FIG. FIG. 7 is a diagram showing another example of a recording pattern. In the figure, 5 is a sync data addition circuit, 9 is a recording / reproducing unit, 13 is a synchronization detection circuit, 14 is a timing signal generation circuit, 15 is a window signal generation circuit, 16 is an AND gate, 17 is a synchronization loss detection circuit, and 18 is a counter. It is.

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Akio Aoki 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Shin Shingokoriyama 3-30-2, Shimomaruko, Ota-ku, Tokyo (56) References JP-A-56-23081 (JP, A) JP-A-62-289968 (JP, A) JP-A-60-247867 (JP, A) (58) Fields investigated (Int .Cl. ⁶ , DB name) G11B 20/12 101

Claims (1)

(57) [Claims] An apparatus for recording a digital signal while sequentially forming a number of tracks in parallel on a recording medium and reproducing the digital signal recorded from the recording medium, comprising: a sync data for each sync block including a predetermined amount of digital data; Recording means for aligning the sync data in at least the plurality of tracks in the track width direction and recording the sync data on the recording medium; and reproducing means for reproducing the digital signal from the recording medium. Gate means for gating the output of the reproducing means in accordance with a window pulse for gating at a predetermined period for a predetermined period; means for separating the sync data from the output of the gate means; and using the sync data separated by the separating means. Restoring means for restoring the digital signal by using In any of the normal reproduction mode for reproducing the digital signal and the special reproduction mode for reproducing the digital signal at a speed different from that at the time of recording, the restoration means is separated from the output of the gate means. A digital signal recording / reproducing apparatus for restoring the digital signal using the sync data. 2. The plurality of tracks have a first magnetization direction, and the recording unit performs recording while further forming a track in a magnetization direction different from the first magnetization direction between the tracks in the first magnetization direction. Claims (1) characterized in that:
A digital signal recording / reproducing apparatus according to the above item.