JP2584784B2 - Digital signal recording device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal recording apparatus, and more particularly to an apparatus for recording a digital video signal and a digital audio signal on the same recording medium.

[Conventional technology]

2. Description of the Related Art Conventionally, in a digital video tape recorder, a recording area (video area) of a digital video signal and a recording area (audio area) of a digital audio signal are separately provided on a recording track. Processing and recording / reproduction are performed by a processing circuit.

[Problems to be solved by the invention]

However, in the conventional digital video tape recorder (VTR) as described above, audio data and video data must be processed by separate signal processing systems. In addition, since the audio area is small, one track due to a long-term dropout or the like occurs. There is a risk that all audio data for the minute will be invalid.

In view of the above-mentioned problems, the present invention can record a digital video signal and a digital audio signal so that an audio signal can be properly reproduced even when a reproduced signal is lost for a relatively long period due to dropout or the like. It is an object of the present invention to provide a digital signal recording device.

[Means for solving the problem]

To this end, a digital signal recording apparatus according to the present invention is an apparatus for recording a digital video signal and a digital audio signal on the same recording medium, comprising a predetermined number of audio data, error detection data and sync data. The audio sync block including the data is dispersed and recorded in the video sync block including a predetermined number of video data, error detection data and sync data, and the total number of audio sync blocks and the total number of video sync blocks are recorded. And the number of error detection data in the video sync block is smaller than the number of error detection data in the audio sync block.

(Operation)

With the above-described configuration, even when a playback signal is lost for a considerably long time, a plurality of audio sync blocks are not lost at once, and an error detection which is sufficiently provided compared to video data is achieved. Audio data can be restored using the data.

〔Example〕

Hereinafter, a digital VTR as an embodiment of the present invention will be described.

The digital VTR of the present embodiment uses NTSC as a video signal.
It is assumed that a television signal conforming to the signal is handled.

FIG. 7 is a diagram showing a schematic configuration of the VTR of the present embodiment,
The description will be made in the following order. It is assumed that a luminance signal (Y) and a color difference signal (I, Q) of a video signal conforming to the NTSC signal are input to the terminal 1 in parallel, where Y is 4f _sc (f _sc is a color subcarrier frequency) and I is , Q are sampled at a quarter of that frequency, and in this output data, data is thinned out so that the sampling points do not line up in the vertical direction between adjacent lines due to interlace scanning. That is, the analog-to-digital (A / D) converter 2 performs so-called subsampling.

At this time, the number of sample points of Y per one horizontal scanning period (1H) (3.
58M ÷ 15.75K) × 4/2, which is 455. Actually, only the effective screen is converted into data, and the number is 372 per 1H. Also I, Q
Is about 1/4 of 96. The output data of the A / D converter 2 is supplied to the memory 3 and the ECC (error correction code) adding circuit 4 adds the ECC.

Here, the video data block, which is a unit to which ECC is added, is one screen (field) as shown by the shaded area in FIG.
Is the data amount corresponding to the image of the area divided into 4 × 3. That is, if the number of effective horizontal scanning lines is 240,
0 × 124 (= 372/3) Y at sample points and vertical 60 ×
Includes I and Q data at 32 (= 96/3) horizontal sample points. This is arranged on the memory 3 as shown in the lower diagram of FIG.
Code C1 and code C2 are added as shown in the figure, and (192 × 6
4) Obtain data blocks. Here, the numbers in the figure represent the number of bytes, and the data at each sample point is assumed to be composed of 8 bits (1 byte).

On the other hand, a 4-channel (CH) audio signal is input from a terminal 5, sampled at a frequency of 48 KHz by an A / D converter 6, and supplied to a memory 7. At this time, the sampling point per field of the video signal is (48K / 60 × 4
=) 3200 pieces. The 3,200 sample points are divided into four, and constitute an audio data block as a unit to which ECC is added. However, as will be described later, in order to make the audio data and the video data have the same size sync data block data, 18 other data are added and (9 × 92) data are shown in FIG. 5 in the memory. The ECC codes C1 and C2 are added by an ECC adding circuit 8 as shown in FIG.

Here, in the VTR of this embodiment, one field is divided into four tracks and recorded. Therefore, for one track, three video data blocks and one audio data block are recorded. These are read from the memory 3 and the memory 7 in units of 384 bytes.

As shown in FIG. 4, a video signal is read out using two vertical lines of the block in FIG. 3 as one unit, and an audio signal is read out using four vertical lines as one unit as shown in FIG.

The switch 9 is supplied with a timing signal having a period required to form one track as one cycle from the track switching timing generator 10, and 384 bytes of data are transmitted from the memory 3 (32 × 3) times in each cycle. Are read from the memory 7 three times.

Reference numeral 10 denotes a circuit for adding 3 bytes of data (X) including 1-byte sync data (Sync), a sync block number, and a redundant code for this number to each of the 384-byte data. Obtain a sink block consisting of FIG. 4 is a diagram showing a video sync block including video data Vd, and FIG. 6 is a diagram showing an audio sync block including audio data Ad. As a result, recording data consisting of three audio sync blocks and 96 video sync blocks per track is obtained.

11 is a sync block replacement circuit for dispersing audio sync blocks in these sync blocks.
3 consecutively input audio sync blocks
Spread over 96 video sync blocks. This is shown in FIG. A-1, A-2, A-3, V-1-1, V-1-12 ... V
−32−2, V−32−3, etc. are sync blocks, respectively.
2-1, A-2, V-13-3, V-13-1 ... V-23-2, A-3, V-24
-1... V−32−2 and V−32−3 in this order.
The specific configuration of the replacement circuit 11 will be described later.

The data output from the circuit 11 is supplied to a recording / reproducing unit 13 via a digital converter 12, and is recorded on a magnetic tape. FIG. 2 shows the arrangement of audio sync blocks and video sync blocks on tracks on a magnetic tape. Audio sync blocks A-1, A as shown
-2 and A-3 are respectively arranged at positions where the track is divided into three equal parts.

Here, a specific example of the sync block replacement circuit 11 will be described.

FIG. 8 is a diagram showing a specific example of the sync block switching circuit 11.

In the figure, terminal 101 receives data containing audio sync blocks continuously as described above. The input signal is written to the memory 1 (104) and the memory 2 (106) every one track in the switch (102).

The operation of the switch (102) is controlled by the timing signal shown in FIG. 1 input to the timing signal input terminal (108), and the memory 1 (104) and the memory 2 (106) are switched every track. Switch. Writing to the memory 1 (104) and the memory 2 (106) is performed by the address generator 1 also controlled by the track timing signal.
(103), and the address is specified by W _1, W ₂ signal produced by the address generator 2 (105), is distributed voice signal data in the image signal data.

When reading data from the memory, R ₁ and R ₂ from the address generator 1 (103) and the address generator 2 (105) are read.
The read address is specified by the signal, and the memory 1
(104), data from the memory 2 (106) are read out in the order shown in FIG.

 Next, the operation at the time of reproduction will be described.

The signal reproduced from the recording / reproducing unit is a digital demodulator 21
After being demodulated by the sync detector 22, it is input to the sync detector 22, the data detector 24, and the block number detector 23.
nc is detected, each data is restored in the data detection circuit 24 by the clock generated in response to the Sync, and the block number detector 23 detects the sync block number in the data X described above.

In the sync block switching circuit 25, the reverse process to that of the circuit 11 is performed, and three audio sync blocks and 96 video sync blocks are continuously output. In this process, the timing from the circuit 10 described above is used, and is confirmed by the sync block number. The switch 26 supplies video data to the memory 27 and supplies audio data to the memory 28.The data supplied to the memories 27 and 28 are subjected to error correction by the ECC decoding circuits 29 and 30, respectively. The signal is returned to the original analog signal via the digital-analog converters 31 and 32 and output from the terminals 33 and 34.

In the VTR configured as described above, there is a very high possibility that two of the three sync blocks of the audio data can be restored, and the audio data and the ECC are appropriately exchanged in the memory 7. If it is, the error can be corrected with considerable establishment. Even if the error correction is not complete, two of the three data can be reliably restored, so that interpolation can be easily performed, and even if a long-term dropout occurs, deterioration during reproduction of the audio signal can be minimized. .

〔The invention's effect〕

As described above, according to the present invention, in an apparatus for digitally recording a video signal and an audio signal, even when a reproduced signal is lost for a long period of time, the audio signal can be reliably reproduced during reproduction. A record format that can be restored to the original was presented.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining the recording order of sync blocks, FIG. 2 is a diagram showing a recording pattern on a recording medium, FIG. 3 is a diagram for explaining video data to be recorded, and FIG. FIG. 5 is a diagram showing the structure of a sync block, FIG. 5 is a diagram for explaining audio data to be recorded, FIG. 6 is a diagram showing the structure of an audio sync block, and FIG. 7 is a digital VTR as an embodiment of the present invention. FIG. 8 is a diagram showing a specific example of a sync block switching circuit in FIG. In the figure, A-1, A-2, A-3 are audio sync blocks, V-1-1 to V-32-3 are video sync blocks, 10 is a sync addition circuit, 11 is a sync block switching circuit, 13
Denotes a recording / reproducing unit, 22 denotes a sync detection circuit, and 24 denotes a data detection circuit.

 ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-63-275282 (JP, A) JP-A-62-140590 (JP, A) JP-A-64-43875 (JP, A)

Claims (1)

(57) [Claims] 1. An apparatus for recording a digital video signal and a digital audio signal on the same recording medium, comprising: an audio sync block including a predetermined number of audio data, error detection data and sync data; And recording the data in a video sync block including error detection data and sync data, and making the total number of data of the audio sync block equal to the total number of data of the video sync block. A digital signal recording apparatus, wherein the number of error detection data in the video sync block is smaller than the number of error detection data.