JP2789580B2 - Signal processing device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal processing apparatus capable of transmitting an image in a secret mode for use in a pay TV or the like. 2. Description of the Related Art Conventionally, in order to prevent wiretapping of image information, an image of one scanning line is cut by a dashed line x as shown in FIG. 6, and a waveform like B is replaced with B '. That is, when the waveform of one scanning line of the Y portion of A is B, this is cut by x, and Z _{1 to} X are changed to B ′.
Rearrange X-Z ₂ to the left side in the figure of B ',
For each horizontal scanning line image, the image is scrambled by changing X and sent, and the position information of X is sent separately. X is 1
If it is constant within a field and changes from field to field,
Even in the field, it may change every scanning line. Problems to be Solved by the Invention However, when X is changed in one field, it is necessary to send data on X for each line, and the amount of data increases. In addition, there is a problem that if X is fixed for one field, eavesdropping becomes easy. The present invention has been made in view of the above problems, and has as its object to provide a signal processing device that has a small amount of data and is difficult to eavesdrop on with a simple configuration. Means for Solving the Problems In order to achieve the above object, the present invention includes a storage unit having a storage capacity equal to or more than an image of at least one scanning line on the reception side, and a transmission side having a fixed time for each horizontal scanning line. Means for increasing or decreasing the amount of image and equivalently changing the image conversion point for each horizontal scanning line and transmitting the image. According to the present invention, with the above-described configuration, the amount of an image to be sent in one horizontal scanning line is increased or decreased by ΔT from one horizontal scanning line, so that the display screen becomes oblique. Because the field changes, confidentiality increases. Embodiment FIGS. 1 and 2 show examples of a transmission screen according to an embodiment of the present invention, and FIGS. 3 and 4 show timings of writing and reading image signals to and from a memory. In FIG. 1, when a normal screen is Z, as an example of the present invention, at the time of transmission and reception in FIG. 3, the screen Z is A, C, and C in FIG.
E is transmitted as shown in FIG. 4, and at the time of transmission / reception in FIG. 4, Z is transmitted as B, D, F, and when the beginning of the top 21H is delayed from the beginning of scanning, A, C, E become as shown in FIG. as _{shown, A X, C X, E} X becomes, B,
D and F become B _X , D _X and F _X. In the case of FIG. 2, the delay amount is half the width of the image component of one scanning line. FIG. 5 is a block diagram of a signal processing device according to an embodiment of the present invention that performs the above-described image processing. Figure 1 and 2 share the same construction in the line memory, wherein the 4 _sc (about 14
MHz) to enable writing and reading (if high speed is not possible, the signal may be converted from serial to parallel and handled). 5 is a tuner / VIF circuit of the television receiver, 6 is a detection circuit (DET), 7 is an A / D converter, 8A and 8B are AND gates, 8C
Is an OR gate, 8D is an inverter, and 9 is a D / A converter. 1
0 is a sync separation circuit, 11 is a line counter that counts the number of horizontal scanning lines output from the sync separation circuit 10 with reference to a vertical sync signal, 12 is a reproduction circuit that reproduces the color subcarrier _sc , and 13 is
a multiplying circuit for multiplying _sc four times, 14 is a gate pulse generating circuit that becomes high only at the 19th hour on which control information is superimposed, 15 is a sampling circuit for extracting the 19H control signal, and 4 is a extracted control signal. from the delay amount t _X of the start point of the 21H-th, the decrease amount ΔT per 1H sampling, a memory data processing circuit for transmitting to the write and read control unit (hereinafter referred to as control unit) 3 (hereinafter referred to as processing circuitry), in FIG. The circuits other than the control unit 3 and the processing circuit 4 have the same functions as the circuits used in the digital television or the teletext receiver. The processing circuit 4 can be easily constituted by a hard logic such as a latch memory and a gate. The control unit 3 can easily fulfill its function if it has a microcomputer inside. Hard logic such as a gate array can be easily formed. Next, regarding the signal processing device configured as described above,
The operation will be described with reference to FIGS. First, the image component of one horizontal scanning line is set to 51.6 μs,
The portion where the signal processing of the present invention is performed is designated as 240H from 21H to 260H. In the description of the present embodiment, the fields from 1 to 262H are described, but the fields starting from 263H are the same. In the case of FIGS. 1A and 1B, the increase / decrease amount ΔT per 1 H
Is 51.6 / 240 = 0.215μs, C, D, E, F, ΔT is 51.6 / 120 =
0.43 μs. Hereinafter, the case of A, C, and E will be considered together with FIG. 1 and FIG. First, considering the case of ΔT = 0.43, every H,
It is assumed that 0.43 μs of extra image is sent from 51.6 μs.First, 51.6 μs of the 21H on 20H and an image of 0.43 μs on the left end of the 22H are sent and received.
1.6 μs is written to the line memory 1 (I). During this time, a pulse for setting the line memory 1 in the write state and an address signal for determining the write position are transmitted from the control unit 3 to the control unit 3.
The information is transmitted to the line memory 1. Here, considering the relationship with the sampling clock 4 _sc , Indivisible. If ΔT = 3t, ΔT × 240 ≒ 50.285
μs. So, in practice, The width of the image signal of one screen is processed by ΔT × 240 ≒ 50.29 μs. Represented as 50.29 = T. FIG. 1C,
For D and E, n = 3, and for B, D and F, n = 6. Therefore, the third
In the figure, at 20H, ΔT at the beginning of 22H is sent. At 21H, T-ΔT at 22H and 2ΔT at 23H are sent. The same applies hereinafter. Considering the reading, the 21H signal written to the line memory 1 at 20H is read from the line memory 1 at 21H, and the control unit 3 reads a pulse from the line memory 1 to the line memory 1;
A read address is provided. The read address should always start from the left end of the screen, that is, the address “φ” in the memory. When memory is serialized, 720 bits (240 x 3,120 x
6), and the address may be 10 bits. On the other hand, in writing at 20H, 720 bits of the 21H signal are written to the line memory 1 and 3 bits of the 22H are written to the line memory 2 (II), so that the write address of the line memory 2 is immediately "3". It has become. Therefore, when writing the 22H to the line memory 2 at 21H, the address starts from "4" as it is, and when the address reaches 720, the writing to the line memory 2 is stopped, and the line memory 1 is set to the write state. Then, the leftmost 6 bits of the 23H are written to the line memory 1. Similarly, in the 22H, the 7th bit to the 720th bit of the 23H are written to the line memory 1 and the 9th bit of the 24H is written to the line memory 2. That is, every time the write address reaches 720, the memory to be written is alternately switched between the line memories 1 and 2, and the address counter is not switched in H units but always switched at "720". Write) address may be returned to “φ”. Next, reading will be considered. In the reading, the image of the 21st transmitted is read out from the line memory 1, and the image of the 22nd transmitted at the 22nd transmitted is read out from the line memory 2. Hereinafter, the line memories to be simply read are alternately switched between 1 and 2, and the read addresses may be exactly the same. From the 22H, after exceeding 720, write / read is performed simultaneously by switching the write memory. That is, the address processing for reading and writing is extremely simple.
Considering the bottom of the screen, when n = 3, the 3rd bit of 259H and the 720th bit of 260H are sent to 258H transmitted and the 258Hth is read from the line memory 2 and at the same time, the 260Hth is written to the line memory 2 . As described above, images of 239H to 240H up to 258H can be sent. If n = 6, it can be sent for 138H for 120H, so 1139
H is set to no signal, and sending 161H at 140H is the same as sending 21H at 20H. At this time, the transmitted image is
Becomes In advance, the beginning of the 21st image Shift becomes as shown in Fig. 2 A _x or C _x. Either can be received and played back in the manner described above. For transmission, two field memories may be provided and read out alternately. Incidentally, in the reading at the 260H, three bits are generally written at the sending 259H, so that it is received and written with a delay of 3 bits and read. Next, consider the case of FIGS. 1B and 1D. In Fig. 4, 1H
The width is reduced by 3t (or 6t) and transmitted. That is, 20
In H, 21H is shortened by the rightmost 3 bits (50.29−0.209
5) Write 717 bits of 21H to the feed line memory 1 in μs and send each H50.29 (= 720 bits) at the beginning of 21H 21H
Is written to the line memory 1, and then the 720th × 720 = 714 bits of the 22H image are written to the line memory 2. This is repeated below. Write address is 72
Until the address reaches 0, the address to be written remains unchanged
Every time it reaches 20, the write memory is alternately switched from the line memory 1 to the line memory 2 and from the line memory 2 to the line memory 1. Considering reading, 217 bits are read from the line memory 1 to 21H at the sending 21H, and the rightmost 3 bits are writing and immediate reading. These three bits may be output as they are without passing through the line memory 1 as long as the timing is adjusted. Hereinafter, the read memory is alternately switched.
Considering the lowermost row, at the end of the transmission 259H, the leftmost 3 bits of the 260H are sent and written to the line memory 2, and at the 260H of the transmission, the 717 bits of the 260H are sent and the line memory 2 is sent.
Write to In the reading at the 260H, the three bits have already been written at the sending 259H, so that it is received and written with a delay of three bits and read while writing. The above is the case of n = 3, but when n = 6, an image of 120H is sent between 121H from 20H to 140H, so if the same processing as that shown in FIG. Can not. That is, it is displayed with a gap of 1H. To prevent this, a memory III for 1H is provided separately, and the output of the OR gate and 8C is transmitted to the D / A converter 9 via the memory III until the 140Hth, and from the 141Hth, without passing through the line memory III. OR gate 8C to D directly
/ A converter 9 in this case, 21H is read out at 22H of the feed, and in FIG.
Read the signal at 141H and read the signal at 141H at feed 142H.
If the signal after 1H is processed without using the memory III, the whole signal is displayed shifted down by 1H. The combination of C and D in FIG.
E and F. In F, as described above, since the upper half is shorter by one line, the memory III is unnecessary. In the case of E, the memory III may be used. If each of A to F is changed for each field, confidentiality is enhanced. Effects of the Invention As described above, according to the present invention, the following excellent effects can be obtained. (1) Setting of memory addresses is simple. (2) The confidentiality can be kept high with a simple configuration. (3) The memory can be reduced and the cost can be reduced.

BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1 and 2 are screen views showing a signal processing state of a signal processing device according to an embodiment of the present invention, and FIGS. 3 and 4 are diagrams for writing the same image signal into a memory. FIG. 5 is a block diagram showing the configuration of the signal processing device.
FIG. 6 is a state diagram showing an example of a screen of a conventional signal processing device. 1, 2 line memory, 3 read / write address control unit, 4 memory / data processing circuit, 5 tuner / VIF circuit, 6 detection circuit, 7 A / D converter, 8
A, 8B …… AND gate, 8C …… OR gate, 8D …… Inverter,
9 D / A converter, 10 Synchronization separation circuit, 11 Line counter, 12 Reproduction circuit, 13 Multiplication circuit, 14
... gate pulse generation circuit, 15 ... sampling circuit.

Claims (1)

(57) [Claims] In a system for transmitting and receiving a signal of one screen constituted by a large number of horizontal scanning lines, the length of an image transmitted by one scanning line is ΔT longer than the length to be displayed without changing the transmission order of the scanning lines. The first scanning line of the display screen is provided with the entire first image and the portion ΔT from the left in the image of the second scanning line, and the n-th scanning line is ΔT × from the left end in the image of the n-th scanning line
ΔT from the part excluding (n−1) and the (n + 1) th left
× n means for sending by carrying a portion, and a receiving side comprising a storage means having a storage capacity not less than the image of at least one scanning line, and reading out the signal from the storage means with a delay of ΔT or more from the transmission. Signal processing device. 2. In a system for transmitting and receiving a signal of one screen constituted by a large number of horizontal scanning lines, the length of an image to be transmitted by one scanning line is shortened by ΔT from the length to be displayed, and the first image on the display screen is displayed. A portion excluding ΔT from the right of the image of the first scanning line is put on the scanning line, and the remaining ΔT portion of the image of the first scanning line and the second portion are placed on the second scanning line. In the image of the scanning line, the image excluding the portion of ΔT × 2 from the right is placed and sent.
1) means for carrying the remaining ΔT × (n-1) portion of the image of the scanning line and an image obtained by removing the portion of ΔT × n from the right of the n-th scanning line; A storage unit having a storage capacity equal to or more than an image of at least one scanning line,
A signal processing apparatus for reading a signal from the storage means with a delay of at least one horizontal scanning line from the transmission. 3. In a system for transmitting and receiving a signal of one screen constituted by a large number of horizontal scanning lines, the length of an image transmitted by one scanning line is ΔT longer than the length to be displayed without changing the transmission order of the scanning lines. The first scanning line of the display screen is provided with the entire first image and the portion ΔT from the left in the image of the second scanning line, and the n-th scanning line is ΔT × from the left end in the image of the n-th scanning line
ΔT from the part excluding (n−1) and the (n + 1) th left
× n on the receiving side, and a storage unit having a storage capacity of at least one scan line image. The signal is read from the storage unit with a delay of ΔT or more from the transmission, and ΔT , Two or more values are prepared, the value of ΔT is changed at random, information about the change is transmitted and received separately from the image, and the screen is reproduced. 4. In a system for transmitting and receiving a signal of one screen constituted by a large number of horizontal scanning lines, the length of an image to be transmitted by one scanning line is shortened by ΔT from the length to be displayed, and the first image on the display screen is displayed. A portion excluding ΔT from the right of the image of the first scanning line is put on the scanning line, and the remaining ΔT portion of the image of the first scanning line and the second portion are placed on the second scanning line. In the image of the scanning line, the image excluding the portion of ΔT × 2 from the right is placed and sent.
1) means for carrying the remaining ΔT × (n-1) portion of the image of the scanning line and an image obtained by removing the portion of ΔT × n from the right of the n-th scanning line; Storage means having a storage capacity not less than the image of at least one scanning line, and reading out the signal from the storage means at least one horizontal scanning line later than the transmission and preparing two or more types of ΔT values; A signal processing device which randomly changes the value of, transmits and receives information on the change separately from the image, and reproduces the screen. 5. In a system for transmitting and receiving a signal of one screen constituted by a number of horizontal scanning lines, the length of an image to be transmitted by one scanning line is ΔT longer than a length to be displayed, without changing the transmission order in the scanning line. The first scanning line of the display screen is provided with the entire first image and the portion ΔT from the left in the image of the second scanning line, and the n-th scanning line is ΔT × from the left end in the image of the n-th scanning line
ΔT from the part excluding (n−1) and the (n + 1) th left
× n means for sending by carrying a portion, and a storage means having a storage capacity of at least one scanning line image on the receiving side, and reading out the signal from the storage means with a delay of ΔT or more from the transmission, The length of the image to be sent by one horizontal scanning line is made longer by ΔT than the length to be displayed, and only the first horizontal scanning line of the image to be displayed has a non-signal portion by ΔT from the beginning of the video signal portion of the horizontal scanning line. A signal processing device for transmitting an image of a first horizontal scanning line from a position delayed by ΔT. 6. In a system for transmitting and receiving a signal of one screen constituted by a large number of horizontal scanning lines, the length of an image to be transmitted by one scanning line is shortened by ΔT from the length to be displayed, and the first image on the display screen is displayed. A portion excluding ΔT from the right of the image of the first scanning line is put on the scanning line, and the remaining ΔT portion of the image of the first scanning line and the second portion are placed on the second scanning line. In the image of the scanning line, the image excluding the portion of ΔT × 2 from the right is placed and sent.
1) means for carrying the remaining ΔT × (n-1) portion of the image of the scanning line and an image obtained by removing the portion of ΔT × n from the right of the n-th scanning line; Storage means having a storage capacity not less than the image of at least one scanning line, read out the signal from the storage means at least one horizontal scanning line later than the transmission, and reduce the length of the image sent by one horizontal scanning line. It is longer than the length to be displayed by ΔT, and only the first horizontal scanning line of the image to be displayed is provided with a no-signal portion by ΔT from the beginning of the video signal portion of the horizontal scanning line, and the first horizontal scanning line is delayed from the position by ΔT. A signal processing device for transmitting an image of a scanning line.