JPH07336604A - Full picture element reading ccd solid-state image pickup element and its signal read method - Google Patents

Abstract

PURPOSE:To read all the picture elements in 1/60sec without increasing number of horizontal registers and bit arrangement density in a full picture element reading solid-state CCD image pickup element and to reduce signals on a non- interlace system monitor without a frame memory. CONSTITUTION:The method is provided with a full picture element reading CCD image area 1 and a horizontal register 5 in which one bit corresponds to each vertical line of the CCD image area 1, and signal charges of all horizontal lines are read in 1/60sec by reading signal charges in the order of lines for each horizontal line through the horizontal register 5 from the CCD image area 1. A horizontal drive frequency of the horizontal register 5 is selected to be a frequency 2f twice the horizontal drive frequency (f) at which the signal is outputted on an interlace system monitor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an all pixel readout type CC.
The present invention relates to a D solid-state image sensor and a signal reading method thereof.

[0002]

2. Description of the Related Art A non-interlaced, all-pixel readout type CCD solid-state image pickup device generally has a structure as shown in FIG. In the figure, 1 is an all-pixel readout type C
In the CD image area, a large number of pixels 2, 2, ... Are arranged in a matrix in the horizontal and vertical directions. .. are vertical registers for vertical transfer of a three-phase drive system, which are driven by three-phase drive pulses of φ1, φ2, and φ3. 4, 4, ... are the vertical registers 3,
3, ... are transfer electrodes. Reference numerals 5a and 5b are horizontal registers arranged in parallel with each other, and are driven by two-phase horizontal transfer pulses, and the vertical registers 3, 3, ...
・ Horizontal transfer of the signal charge transferred by. The number of bits forming the horizontal registers 5a and 5b is the same as the number of vertical pixel columns of the all-pixel readout type CCD image area 1, and the arrangement pitch of the bits is the same as that of the vertical pixel columns.

A transfer gate 6 is provided between the two horizontal registers 5a and 5b, and transfers the signal charges transferred from the all-pixel readout CCD image area 1 to the horizontal register 5a to the horizontal register 5b. .
Then, the signals from the all-pixel read-out type CCD image area 1 are shared by the two horizontal registers 5a and 5b and transferred simultaneously.

Specifically, the odd line is set to one horizontal register 5a and the even line is set to the other horizontal register 5b.
Reading is performed in the blanking period which occurs only once in the normal 1H (63.56 μsec) period, and the signal charges of the two lines are transferred at the same time. Regarding such type of solid-state image pickup device, JP-A-63-274272, JP-A-57-18274, and JP-A-5-734 are disclosed.
Various technical proposals have been made according to the publication No. 3 and the like. The reason why two horizontal registers are provided in this way is that if one horizontal register is used to cope with an increase in the number of pixels, the electrode pitch is too fine and processing is difficult.

[0005]

By the way, in the conventional solid-state image pickup device shown in FIG. 5, since horizontal transfer is performed in two channels, there is a slight variation in characteristics between the channels, and the variation causes a signal to vary. There is a problem in that the output signal needs to be corrected. This problem cannot be overlooked because the correction requires a complicated correction circuit. Further, in such a solid-state image pickup device, the transfer gate 6 must be provided between the two horizontal registers 5a and 5b, so that there is a problem that the structure of the horizontal transfer unit becomes extremely complicated. In order to distribute the signals by using and to perform the horizontal transfer using the two horizontal registers 5a and 5b, it is necessary to perform complicated control, and it is extremely necessary to properly control the timing of the control signals. It also has the problem of being difficult.

Moreover, the use of the two horizontal registers 5a and 5b does not lead to the expansion of the dynamic range. If the dynamic range is to be increased, the two horizontal registers 5a and 5b
Both must increase the amount of charge they handle. This leads to an increase in the area occupied by the horizontal transfer section, which is not preferable. Further, such a solid-state image sensor has 60
Since all lines are read out in one second, a frame memory is indispensable even when reproducing on a non-interlaced monitor. This is because the odd line and the even line are simultaneously output by the two horizontal registers 5a and 5b, so that a memory for storing at least one line is always required.

On the other hand, it may be possible to use only one horizontal register having a doubled bit arrangement density. That is, the signal charges of two horizontal lines, that is, even and odd lines are fetched into one horizontal line and are simultaneously transferred horizontally for each 1H. But if you do this
Since signals for two horizontal lines are alternately output for each bit, there is a problem that signal processing becomes complicated,
Moreover, the formation of horizontal registers is very difficult, at least with current lithographic techniques.

The present invention has been made in order to solve such a problem, and in an all-pixel readout type CCD solid-state image pickup device, 1 / without increasing the number of horizontal registers and increasing the bit arrangement density. It is an object of the present invention to be able to read all pixels in 60 seconds and to reproduce an image without using a frame memory for a non-interlaced monitor.

[0009]

In the all-pixel-reading CCD solid-state image pickup device according to the first aspect, one bit corresponds to the all-pixel-reading CCD image area and each vertical line of the all-pixel-reading CCD image area. It is characterized in that it is provided with one horizontal register thus configured.

According to a second aspect of the present invention, there is provided a signal reading method according to the first aspect.
In the signal reading method of the all-pixel-reading CCD solid-state image pickup device, the all-pixel-reading CCD is read in 1/60 seconds by reading signal charges from the all-pixel-reading CCD image area line by line through a horizontal register for each horizontal line. It is characterized in that the signal charges of all pixels in the image area are read out. According to a third aspect of the present invention, in the signal readout method of the all-pixel readout CCD solid-state image sensor and the signal readout method thereof according to the third aspect, the horizontal drive frequency when the horizontal drive frequency of the horizontal register is output to an interlaced monitor. The frequency is twice as high as that of

[0011]

According to the all-pixel read-out type CCD solid-state image pickup device of the present invention, the horizontal register has the same number of bits and the same pitch as the pixels of each horizontal line of the all-pixel read-out type CCD image area. Since it is a single piece, it is not necessary to increase the number of horizontal registers and it is not necessary to increase the bit arrangement density.

According to the signal readout method of the second aspect, the signal charge is transferred from the all-pixel readout CCD image area to 1
Since each horizontal line is read out in order through the horizontal register through the horizontal register, signals can be read out from all pixels in the all pixel readout type CCD image area by appropriately increasing the horizontal drive frequency. Further, since the signal charges are read line by line for each horizontal line, a signal can be sent to the non-interlaced monitor without passing through a memory to reproduce an image, and a frame memory is not required when the image is reproduced on the non-interlaced monitor. . According to the signal reading method of claim 3, since the horizontal drive frequency of the horizontal register is set to twice the horizontal drive frequency in the case of outputting to the interlaced monitor, 1/60
The signal charges of all the pixels in the above-mentioned all-pixel readout type CCD image area can be read every second, and the image can be reproduced as it is on the non-interlaced monitor.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An all-pixel readout type CCD solid-state image sensor of the present invention and a signal readout method thereof will be described in detail below with reference to the illustrated embodiments. FIG. 1A shows an all-pixel readout type C of the present invention.
The block diagram which shows one Example of a CD solid-state image sensor, (B)
FIG. 3 is a schematic time chart diagram showing the characteristics of the reading method. This all-pixel-reading CCD solid-state image sensor is different from the all-pixel-reading CCD solid-state image sensor shown in FIG.
Structurally, the number of horizontal registers 5 is one, and therefore there is no transfer gate 6, but the other points are common. Of course, the number of bits and the arrangement pitch of the horizontal register 5 are exactly the same as those of the conventional horizontal registers 5a and 5b, and the image area 1
The number of vertical pixel columns and the arrangement pitch are the same.

However, the signal reading method is significantly different from the conventional one. That is, in this signal reading method,
As shown in FIG. 1B, a normal 1H (63.56 μs
Two blanking periods are created in the period ec), and signal charges for two horizontal lines are output in the normal 1H period, which is a major feature.

First, FIG. 2 is a time chart for showing in detail the horizontal synchronizing timing in the signal reading method of the present embodiment. As shown in FIG.
Two blanking periods are formed within the period (63.56 μsec), and in the first blanking period A, the optical black signal (post OPB) after the even line is first output, and then the VH transfer of the odd line ( That is, the signal charge is transferred from the vertical register to the horizontal register, and then the previous dummy and the previous optical black signal (the previous OP
After outputting B), VH transfer of the odd line is performed, and thereafter, the valid signal of the odd line is output. Next, in period B, the optical black signal (after OPB) after the odd line is output, then the VH transfer of the even line is performed, the previous dummy and the previous optical black signal are output, and then the even number Create a valid signal for the line. That is, in each 1 / 2H period, signals are output in the order of the dummy, the front optical black signal, the effective image signal, and the rear optical black signal. The clock in FIG. 2 has a frequency 2f (28.6 MHz) which is twice the normal horizontal drive frequency f (14.3 MHz). Therefore, the period A + the period B = 1H (63.56 μsec).

As described above, VH transfer and output of one horizontal line are performed within a half of the normal 1H period, and the horizontal register 5 is set to a frequency of twice the normal horizontal drive frequency f. Since it is driven by the horizontal driving frequency 2f, it is a normal 1H
It is possible to output signals of two horizontal lines during a period, and further, it is possible to output signals of all lines during one field period as shown in FIG. Then, signals can be output in the order of horizontal lines, and two lines are not output simultaneously by two horizontal registers as in the conventional case shown in FIG. 5, so a frame can be displayed on a non-interlaced monitor. It can be played back without using a memory. Specifically, when the period C of the new blanking signal NEWBLK is matched with the blanking period of the non-interlaced monitor, the output OU from the solid-state image sensor 1
T can be reproduced as an image on the monitor without using a memory. Therefore, this solid-state image sensor is very suitable as a non-interlaced solid-state image sensor.

4A and 4B are schematic configuration diagrams showing another example of a reproducing circuit for reproducing the image of the output of the solid-state image pickup device, FIG. 4A being a non-interlaced reproducing circuit, and FIG.
Is an interlaced reproduction circuit.

First, the non-interlaced reproducing circuit shown in FIG. 4A will be described. 7 is the whole solid-state image sensor of the present invention, 8 is a signal processing circuit for sampling the signal output from the horizontal register 5 of the solid-state image sensor 7, removing noise components, etc. 9 is a non-interlace monitor circuit 10 is high definition CR for non-interlace
The monitor circuit 9 and the CRT 10 have a horizontal driving frequency f of 2 in the ordinary television format.
It operates at double frequency 2f.

In this non-interlaced reproducing circuit, if the blanking period of the CRT 10 and the period C of the new blanking signal NEWBLK are synchronized, the output of 7 of the solid-state image pickup device is not required to be stored in a CR.
Images can be reproduced at T10.

Next, the interlaced reproducing circuit shown in FIG. 4B will be described. The solid-state image sensor 7 is suitable for non-interlace, but an interlaced CRT
In some cases, it is necessary to enable reproduction, and in that case, a reproducing circuit (13) having a frame memory (12) as shown in FIG. 4B is used. In the drawing, 11 is an interlace monitor circuit, 12 is a memory for storing signals for two fields, and 13 is an interlace CRT.

In this interlaced reproduction circuit,
1 signal from all lines (525 lines) from the solid-state image sensor 1
All the data is captured in the field period, thinned out, and reproduced on the interlaced CRT 13 by interlacing. Thus, the present invention is suitable for reproduction by an interlace monitor, but interlace reproduction is also possible by using a memory.

[0022]

According to the all-pixel read-out type CCD solid-state image pickup device of the first aspect, one bit corresponds to the all-pixel read-out type CCD image area and each vertical line of the all-pixel read-out type CCD image area. It is characterized by having one horizontal register. Therefore, according to the all-pixel readout type CCD solid-state image pickup device of claim 1, the horizontal register has the same number of bits as the number of pixels of each horizontal line of the all-pixel readout type CCD image area and the same pitch, and one horizontal register is provided. Therefore, it is not necessary to increase the number of horizontal registers and it is not necessary to increase the bit arrangement density.

According to a second aspect of the present invention, there is provided an all-pixel readout type CCD solid-state image pickup device, wherein the signal readout method is the all-pixel readout type CCD.
1/60 by reading the signal charge from the image area line by line through the horizontal register for each horizontal line
It is characterized in that the signal charges of all the pixels in the all-pixel readout type CCD image area are read every second. Therefore, according to the signal read-out method of the second aspect, the signal charge is transferred from the all-pixel read-out type CCD image area to 1
Since each horizontal line is read out in order through the horizontal register through the horizontal register, signals can be read out from all pixels in the all pixel readout type CCD image area by appropriately increasing the horizontal drive frequency. Since the signal charges are read out line by line for each horizontal line, it is possible to send a signal to a non-interlaced monitor without passing through a memory for image reproduction, and a frame memory is required when reproducing to a non-interlaced monitor. No longer.

According to a third aspect of the present invention, there is provided a method for reading out signals from a CCD solid-state image pickup device of the all-pixel readout type, wherein the horizontal drive frequency of the horizontal register is twice the horizontal drive frequency when outputting to the interlaced monitor. To do. Therefore, according to the signal reading method of claim 3, since the horizontal driving frequency of the horizontal register is set to twice the horizontal driving frequency when outputting to the interlaced monitor, the all-pixel reading type is set to 1/60 seconds. CC
The signal charges of all the pixels in the D image area can be read out, that is, the signal readout according to claim 2 can be performed.

[Brief description of drawings]

1A and 1B show an embodiment of the present invention, FIG. 1A is a configuration diagram of an all-pixel readout type CCD solid-state imaging device, and FIG. 1B is a characteristic of a readout method. It is a schematic time chart.

FIG. 2 is a time chart showing horizontal synchronization timing for explaining the signal reading method of the embodiment of FIG.

FIG. 3 is a time chart showing vertical synchronization timing for explaining the signal reading method of the embodiment of FIG.

4A and 4B are schematic configuration diagrams showing examples of different reproducing circuits to which the present invention is applied. FIG. 4A is a non-interlaced reproducing circuit, and FIG. 4B is an interlaced reproducing circuit.

FIG. 5 is a configuration diagram of a conventional example of a CCD solid-state image sensor of all-pixel readout type.

[Explanation of symbols]

 1 All pixel readout type CCD image area 2 Pixel 3 Vertical register 5 Horizontal register

Claims (3)

[Claims] 1. An all-pixel readout type CCD image area in which pixels are arranged in a matrix in the horizontal and vertical directions, and 1 bit corresponds to each vertical line of the all-pixel readout type CCD image area. All-pixel read-out type CC, which is provided with one horizontal register
D solid-state image sensor 2. The signal charges of all pixels of the all-pixel readout type CCD image area are read in 1/60 seconds by reading the signal charges from the all-pixel readout type CCD image area line by line through a horizontal register for each horizontal line. A method for reading out signals from an all-pixel readout type CCD solid-state imaging device according to claim 1, wherein 3. The signal of the all-pixel readout CCD solid-state image pickup device according to claim 2, wherein the horizontal drive frequency of the horizontal register is twice the horizontal drive frequency when outputting to the interlaced monitor. Read method