JP2775744B2 - Digital audible sound generator - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an audible sound generator for a digital PBX,
In particular, the present invention relates to a digital audible sound generator that uses the same data area as a call processing control program of a digital PBX.

[Prior Art] A conventional digital audible sound generating device has an independent memory IC storing audible sound in a digital pattern and a timing of sequentially reading a digital pattern from the memory IC to create a serial digital audible sound signal. And a generating unit.

By the way, the conventional digital PBX requires a memory IC for storing a call processing control program.
The content of the IC differs for each customer request. Therefore, even when the digital audible sound generator is incorporated in the digital PBX, it is economically possible to integrate the memory IC of the digital PBX together with the logic circuit of the timing generator of the digital audible sound generator. Disadvantageous.

Therefore, the conventional digital audible sound generator requires a dedicated memory IC in addition to the timing generator.

[Problem to be Solved] The conventional digital audible sound generator described above is a memory IC
And a timing-generating IC, which has to be used in a two-chip configuration.

The present invention has been made in view of the above problems,
It is an object of the present invention to provide a digital audible sound generator capable of realizing miniaturization and cost reduction.

[Means for Solving the Problems] To achieve the above object, a digital audible sound generating device of the present invention is a digital audible sound generating device that uses the same data area as a call processing control program of a digital PBX. A memory containing a processing control program and a digital audible sound pattern, a timing generator for outputting a stop request signal when outputting an audible sound, and a stop confirmation signal when a stop request signal from the timing generator is input. A call processing control processor of the digital PBX to be output, and a switching signal is output when a stop confirmation signal is input from the call processing control processor, and a digital audible sound pattern contained in the memory is read from the memory. The configuration is provided with a bus arbitration unit for performing the operation.

That is, with such a configuration, the memory IC can share the call processing control processor. Therefore, the digital audible sound generator itself has the same effect as that of the digital audible sound generator, which is constituted by only one chip of the timing generation IC.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a digital audible sound generator according to one embodiment of the present invention.

In the figure, 1 is a call processing control processor, 2 is a memory IC, 3 and 4 are buffers, 5 is an inverter, 6 is a group of counters, 7 is a selector, 8 is a timing generator, 9 is a latch register, and 10 is a parallel series. The conversion register 11 is a bus arbitration unit.

Here, the address bus of the call processing control processor 1 is:
It is connected to the address line of the memory IC 2 via the address buffer 3. The data line of this memory IC2 is
Data line and latch register 9 of call processing control processor 1
It is connected to the.

On the other hand, the counter group 6 receives a timing signal from the timing generation section 8 and outputs it to the selector 7.
The output line of the selector 7 is connected to the address line of the memory IC via the address buffer 4.

In the above configuration, when the processor 1 performs a call process, an address is designated to the memory IC2, and data of the memory IC2 is input via the data line.

However, when outputting an audible sound, the timing generation section 8 outputs a stop request signal to the processor 1 and the bus arbitration section 11. Then, the processor 1 that has received the request,
Outputs stop confirmation signal. Then, the stop confirmation signal from the processor 1 is input to the bus arbitration unit 11 and the bus arbitration unit 11
Outputs a switching signal to switch between the processor side bus and the selector side bus.

As a result, the address signal output from the selector 7 is input to the memory IC2, and the digital pattern of the audible sound is read. Then, the data is latched by the latch register 9.

The parallel / serial conversion register 10 converts the parallel audible sound signal latched by the latch register 9 into a serial signal.

As described above, in the present embodiment, the memory IC 2 is shared by the call processing control processor 1 and the audible sound generation unit, and the audible sound generation unit is constituted by one chip, but the same effect can be obtained.

Next, the operation of the above-described audible sound generator will be described in detail.

First, the same number of counter groups 6 as the number of audible sounds are prepared, and a clock signal is input from the timing generator 8. Then, an address is generated to read the digital pattern of each audible sound used in the memory IC2.

On the other hand, the selector 7 gives these addresses to the memory IC2 in a time-division manner. The clock signal provided from the timing generator 8 to the counter group 6 is provided only once in the sampling period T. Therefore, the state of each counter 6 changes only once during the time T.
Therefore, the number of accesses to the memory IC2 may be the same as the number of audible sounds. The data read each time is held in the latch 9 and output as a serial signal via the parallel-serial conversion register 10.

As described above, the timing generator 8 accesses the memory IC2 to read the digital pattern, but the call processing control processor 1 also accesses the memory IC2 to perform call processing. Therefore, it is necessary to arbitrate the right to use the memory IC2.

Therefore, the right to use the memory IC2 is assigned by the bus arbitration unit 11. In general, the processor has the right to use, but only when there is a memory use request from the audible sound generation unit, the use right is transferred to the audible sound generation unit.

FIG. 2 is a timing chart showing the operation of the digital audible sound generator shown in FIG.

In the figure, the above situation is shown in a time chart.

Now, at time T _a, from the timing generator, the memory use request signal is generated n times during a period T, is input to the bus arbitration unit 11. At the same time, it is input to the processor 1 as a stop request signal. Then, the processor 1 receives this and outputs a processor stop confirmation signal to the arbitration unit 11, and switches the right to use the memory IC2 by the logical output BSW of the arbitration unit 11.

Note that the processor 1 is a memory IC for t ₁ + t ₂ +... + T _n.
2 cannot be used. Therefore, the processing capacity is limited by (t ₁ + t ₂ +... + T _n ) / T as compared with the case where the memory IC2 is not shared with the audible sound generation unit. However, this is almost negligible in normal applications.

As described above, in this embodiment, the call processing control processor of the digital PBX, the call processing control program for driving the processor and the memory unit in which the digital audible sound data pattern is written, It has a timing generator for reading a pattern and generating a digital audible signal, and a bus arbitrator for arbitrating a bus of the memory shared by the processor and the timing generator.

Note that the present invention is not limited to the above embodiment,
It includes various modifications within the scope of the gist. For example, in the above-described embodiment, the output of the digital pattern is converted from parallel to serial. However, when the unit that generates the audible sound may be a parallel signal, this conversion is unnecessary.

[Effects of the Invention] As described above, the present invention accommodates a digital audible sound data pattern and a call processing program of a digital PBX in the same memory IC, arbitrates the access right, and reads out data in a time-division manner. Accordingly, there is an effect that it is possible to provide a digital audible sound generating device which realizes a reduction in size and cost of the device due to the system configuration.

[Brief description of the drawings]

FIG. 1 is a block diagram of a digital audible sound generator according to one embodiment of the present invention, and FIG. 2 is a timing chart showing the operation of the digital audible sound generator shown in FIG. 2: Memory IC 6: Counter group 7: Selector 8: Timing generator 11: Bus arbitrator

Claims (1)

(57) [Claims] 1. A digital audible sound generator using the same data area as a call processing control program of a digital PBX, a memory containing the call processing control program and a digital audible sound pattern, and outputting an audible sound. A timing generation unit that outputs a stop request signal when performing a call processing control processor of the digital PBX that outputs a stop confirmation signal when a stop request signal is input from the timing generation unit; A digital audible sound generating device comprising: a bus arbitration unit that outputs a switching signal when a stop confirmation signal is input and reads a digital audible sound pattern stored in the memory from the memory.