JP2771170B2 - Variable damping device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a variable damping device.

FIG. 6 is a circuit diagram of a conventional microwave variable attenuator. This conventional microwave variable attenuator includes a variable attenuator circuit 2 using a common-gate, dual-gate field-effect transistor (hereinafter, a field-effect transistor is referred to as an FET) DF.
02, an input matching circuit 201, and an output matching circuit 203.

In FIG. 6, an input matching circuit 201 and an output matching circuit 2
02 includes microwave lines 21 to 23 and microwave lines 26 to 28, respectively, for impedance matching between the input miro wave line 10 and the variable attenuator 202, and for the output microwave line 18 with the variable attenuator circuit 202. And impedance matching between.

In the variable attenuation circuit 202, the second gate of the double-gate FET DF is connected to the microwave line 24 and the bias voltage application terminal.
The terminal 15 is connected to the variable voltage source 200 that variably outputs the bias voltage Vc via the terminal 15, and the terminal 15 is connected to the ground via the microwave line 25 and the high-frequency bypass capacitor Co. Here, the bias voltage Vc
And the bias voltage is changed to the bias voltage application terminal 15.
And applying the voltage to the second gate of the double-gate FET DF via the microwave line 24, thereby controlling the channel current between the source and the drain of the double-gate FET DF. The ratio between the voltage applied to the gate and the drain current, that is, the amplification factor changes. Therefore, the variable attenuating circuit 202 attenuates the microwave signal input from the input microwave line 10 to the first gate of the double-gate FET DF via the input matching circuit 201 with an attenuation amount corresponding to the bias voltage Vc. After that, the output microwave line 18 from the drain of the double gate FET DF via the output matching circuit 203
Output to

[Problems to be Solved by the Invention] However, in the above-described conventional microwave variable attenuator, since the microwave lines 21 to 28 need to have a length depending on the wavelength of the signal to be attenuated, the microwave variable attenuator is required. There is a problem that the device becomes relatively large. In addition, there is a problem that the use of these distributed constant circuits cannot essentially increase the bandwidth.

Further, when the attenuation is controlled using the double gate FET DF, the input impedance of the first gate and the output impedance of the drain of the double gate FET DF change. Is relatively large, and the microwave variable attenuator is connected to the input / output line 1
There is a problem that impedance matching cannot always be performed with respect to 0 and 18.

SUMMARY OF THE INVENTION The present invention solves the above problems and provides a variable attenuator that can be downsized as compared with the conventional device and that can perform good impedance matching for input and output lines regardless of the bias voltage. To provide.

[Means for Solving the Problems] A variable attenuation device according to the present invention comprises a first field-effect transistor having a common source, and a second field-effect transistor having a source connected to a drain of the first field-effect transistor. A signal input to the gate of the first field-effect transistor and a signal output from the drain of the second field-effect transistor by changing a bias voltage applied to the gate of the second field-effect transistor. A variable attenuator for changing an amount of attenuation that is a ratio of a signal to a third field effect transistor having a source connected to the input line and a drain connected to the gate of the first field effect transistor; Drain ground whose gate is connected to the drain of the second field effect transistor and whose source is connected to the output line And a fourth field-effect transistor.

In the variable attenuation device, preferably, a current feedback element is connected between a gate and a drain of the first field effect transistor.

[Operation] With the configuration described above, after the third field-effect transistor impedance-converts the signal input to the source via the input line and outputs the signal to the gate of the first field-effect transistor, The cascode-connected first and second field-effect transistors determine a signal input to the gate of the first field-effect transistor by a bias voltage applied to the gate of the second field-effect transistor. The signal is attenuated by a predetermined amount of attenuation and output from the drain of the second field effect transistor to the gate of the fourth field effect transistor. Next, the fourth field-effect transistor impedance-converts a signal output from the drain of the second field-effect transistor and outputs the signal to an output line.

Here, by changing the bias voltage applied to the gate of the second field-effect transistor, the attenuation between the input line and the output line changes. At this time, even if the impedance of the gate of the first field-effect transistor and the impedance of the sign of the second field-effect transistor change, the impedance conversion of the third field-effect transistor and the impedance of the fourth field-effect transistor respectively change. By the action and the irreversibility, the impedance matching can be favorably performed on the input line and the output line.

In addition to the above configuration, by connecting a current feedback element between the gate and the drain of the first field-effect transistor, nonlinear distortion in the first field-effect transistor can be significantly improved.

Embodiment 1 First Embodiment FIG. 1 is a circuit diagram of a microwave variable attenuator according to a first embodiment of the present invention. In FIG. 1, the same components as those in FIG. 6 are the same. Signs are attached.

The microwave variable attenuator of the first embodiment uses the FET 11 for the input matching circuit 201 and the F
It is characterized by using ET17.

In FIG. 1, an input microwave line 10 having a characteristic impedance Z ₀ is connected to a source of a common-gate FET ₁₁ used as an input matching circuit 201 and having a transconductance gm ₁ , and the drain of the FET 11 has a resistance R ₁ And connected to the ground via the gain adjusting resistor 12 of the first embodiment, and to the first gate of the common-source dual-gate FET 13. The double-gate FET 13 has a transconductance gm ₂ controlled by the bias voltage Vc applied to the second gate from the variable voltage source 200 via the bias voltage application terminal 15. The second gate of the double-gate FET 13 is connected to the ground via a high-frequency bypass capacitor 14.
Here, the variable voltage source 200 outputs a variable bias voltage Vc.

Further, the drain of the twin gate FET13 is connected to ground via a gain control resistor 16 of the resistance value R _2,
Transconductance gm ₃ used as output matching circuit 203
Is connected to the gate of the grounded FET 17 having
Furthermore, it connected to the output microwave transmission line 18 the source of the FET17 having a characteristic impedance Z _0.

With the above configuration, the microwave signal input to the input microwave line 10 is
After being subjected to impedance conversion in the FET 11 of the variable attenuation circuit 202, it is input to the FET 13 of the variable attenuation circuit 202. The variable attenuation circuit 202
The bias voltage V input from the variable voltage source 200 to the second gate of the double-gate FET 13 via the bias voltage input terminal 15
After the input microwave signal is attenuated by the attenuation amount corresponding to c, the signal is output to the output microwave line 18 via the FET 17 which is the output matching circuit 203 for performing impedance conversion processing. Therefore, the bias voltage Vc
, The attenuation of the microwave variable attenuator can be changed.

In the microwave variable attenuator of FIG.
The double-gate FETs 13 and 17 are respectively composed of transconductances gm ₁ , gm ₂ and gm ₃ and gate-source capacitances Ygs ₁ and Yg
Considering that it is an ideal FET that can be described by s ₂ and Ygs ₃ ,
The S parameter of the circuit of FIG.

here, It is.

Further, the FETs 11 and F are set so that gm ₁ Z ₀ = gm ₃ Z ₀ = 1.
When the gate width of the ET 17 is determined, gm ₁ ≫Ygs ₁ and gm ₃ ≫Ygs ₃ are generally satisfied in the microwave band. here,
A≫B means that A is much larger than B.

S ₁₁ = S ₁₂ = S ₂₂ = 0 (5) S ₂₁ = −2 [gm ₂ R ₂ ] · [gm ₁ R ₁ ] (6) where the transconductance gm ₂ is as described above.
Since it changes with the bias voltage Vc, it becomes a function of the bias voltage Vc.

Therefore, from equation (5), since the input reflection coefficient S ₁₁ and the output reflection coefficient S ₂₂ becomes zero, the input microwave line 1
0 and the variable attenuating circuit 202, and between the variable attenuating circuit 202 and the output microwave line 18, impedance matching can be achieved. Therefore, the impedance at the first gate and the drain of the double gate FET 13 as in the conventional example can be improved. There is an advantage that the influence of the change does not appear in the input microwave line 10 and the output microwave line 18. Also, the forward transfer coefficient
Since the S ₂₁ can be expressed as equation (6), can be advantageously adjusted attenuation of the variable attenuation circuit 202 by changing the resistance value R ₁ of the bias voltage Vc or resistance 23. Further, from the above equation (5), the reverse transfer coefficient S ₁₂
Is zero, so that it has excellent reverse isolation characteristics.

Further, since the microwave variable attenuator does not include the conventional microwave lines 21 to 28 shown in FIG.
It does not require the size depending on the wavelength of the signal, and
In addition, there is an advantage that the microwave signal attenuating device including the resistor 12 can be downsized as compared with the conventional example. In particular, for example, by realizing the device with a monolithic circuit, the microwave variable attenuator can be significantly reduced in size as compared with a conventional example.

Second Embodiment FIG. 2 is a circuit diagram of a microwave variable attenuator according to a second embodiment of the present invention. In FIG. 2, the same components as those in FIG. ing.

The microwave variable attenuator of this second embodiment is
The difference from the microwave variable attenuator of the first embodiment shown in the figure is that, instead of the double gate FET 13, an FET 19 in which two FETs 19a and 19b are cascode-connected is used. Less than,
The above difference will be described in detail.

The drain of FET11 is connected to the gate of FET19a grounded source having a transconductance gm _4. The drain of the FET19a is connected to the source of FET19b grounded-gate having a transconductance gm _5. The gate of the FET 19b is
Connected to bias voltage application terminal 15. Also, the FET 19b
Is connected to the gate of FET17.

In the microwave variable attenuator configured as described above, by changing the bias voltage Vc applied to the gate of the FET 19b from the variable voltage source 200 via the bias voltage applying terminal 15, the drain current of the FET 19b changes. As a result, the operation bias of the FET 19a changes. Therefore, the mutual conductances gm ₄ and gm _{5 of the} FETs 19a and 19b
Change according to the bias voltage Vc.

The S parameter of the microwave signal attenuator of the second embodiment is as shown in the following equation.

S ₁₁ = S ₁₂ = S ₂₂ = 0 (7) S ₂₁ = −2 gm ₄ R ₂ gm ₁ R ₁ (8) Here, as described above, the transconductance gm ₄ changes with the bias voltage Vc. Therefore, the mylo wave variable attenuator of the second embodiment has the same functions and effects as those of the above-described first embodiment from the above equations (7) and (8).

Third Embodiment FIG. 3 is a circuit diagram of a microwave variable attenuator according to a third embodiment of the present invention. In FIG. 3, the same components as those in FIG. 1 and FIG. Signs are attached.

Microwave variable attenuator according to the third embodiment differs from the second embodiment of FIG. 2, is that of connecting the voltage feedback resistor 29 of resistance R ₃ between the gate and source of FET19a .

The S parameter of the microwave variable attenuator configured as described above is given by the following equation.

Here, Ygs ₅ is the gate-source capacitance of the FET 19b, and the mutual conductances gm ₄ and gm ₅ of the FETs 19a and 19b are functions of the bias voltage Vc as described above.

When the amplification factor of the cascode-connected FET 19 is relatively large and the attenuation of the variable attenuation circuit is relatively small, the following equation is established.

gm ₄ ≫1 / R ₃ … (11) gm ₅ ≫1 / R ₃ … (12) gm ₅ ≫Ygs ₅ … (13) gm ₄ ≒ gm ₅ … (14) where A ≒ B is A Is approximately equal to

Therefore, forward transmission coefficient S ₂₁ of the above formula (10) when the above (11) to equation (14) is established is given by the following equation.

Accordingly, the current feedback resistor 29 is a negative feedback circuit formed in FET19a, gain gm ₄ in the above (15) by changing the ratio of the resistance values R ₂ and R ₃ of the resistor 16, 29 R ₂
, The frequency characteristic of the device can be flattened, and the attenuation of the microwave variable attenuator can be constant over a wide band.

When the amplification factor of the double gate FET 19 is relatively small and the attenuation of the variable attenuation circuit is relatively large, the following equation is established.

1 / gm ₄ ≫R ₃ … (16) 1 / gm ₅ ≫R ₃ … (17) Therefore, when the above equations (16) and (17) are satisfied,
Forward transmission coefficient S ₂₁ of the formula (10) is given by the following equation.

S ₂₁ = 2 gm ₅ R ₂ gm ₁ R ₁ (18) At this time, the FET 19b is in a pinch-off state and almost no drain current flows in the FET 19b, so that no potential difference occurs between the drain and the source of the FET 19a. Therefore,
Compared to the case where the drain current of the FET 19b is sufficiently flowing, the linearity of the drain current with respect to the change in the gate voltage of the FET 19a is significantly deteriorated. Here, by inserting a current feedback resistor 29 in parallel between the gate and drain of the FET 19a, which causes distortion due to the nonlinearity of the FET 19b, as shown in FIG. 3, the nonlinearity of the FET 19a is maximized.
Nonlinear distortion in the FET 19a can be greatly improved.

As described above, the configuration as shown in FIG. 3 makes it possible to flatten the frequency characteristics of the device when the attenuation of the device is small as compared with the first and second embodiments. In addition, the current feedback resistor 29 inserted in parallel between the gate and the source of the common source FET 19a, which causes nonlinear distortion of the FET 19a when the attenuation of the device is large, allows the FET 19a Nonlinear distortion can be greatly improved. Therefore, the microwave variable attenuator according to the third embodiment can be significantly reduced in size as compared with the conventional example as in the first and second embodiments, and the frequency characteristics can be flattened over a wide band. And nonlinear distortion can be improved.

Fourth Embodiment FIG. 4A is a plan view of a microwave monolithic integrated circuit (hereinafter, referred to as MMIc) of a microwave variable attenuator having input / output coplanar lines 301 and 302 according to a fourth embodiment of the present invention. , FIG. 4 (B) is A- of FIG. 4 (A).
FIG. 4 (C) is a longitudinal sectional view taken along line BB ′ of FIG. 4 (A). 4, the same or similar components as those in FIGS. 1 to 3 are denoted by the same reference numerals.

In the MMIC of the fourth embodiment, the FETs 11, 19a, 19b, and 17 in the microwave variable attenuator of the second embodiment shown in FIG. 2 are configured by metal-semiconductor FETs (hereinafter, MESFETs). FET11 drain bias voltage application terminal 61
And a bias voltage application terminal 60 of the gate of the FET 19a, and FE
T19b drain voltage application terminal 62 and FET 17
And a drain bias voltage application terminal 63.

4 (A), 4 (B) and 4 (C), the upper surface of the semiconductor substrate 40 is located substantially at the center of the left side of the semiconductor substrate 40 in the drawing, and over the entire surface where the MESFET 11 is formed. The operation layer 90 is formed by implanting impurity ions. ME
The gate 30 of the SFET 11 is formed integrally with the ground conductor 41 at a substantially central position of the operation layer 90. Further, a source 10a and a drain 31 are formed at predetermined intervals from the gate 30 with the gate 30 interposed therebetween. As a result, a grounded MESFET 11 having the gate 30, the source 10a, and the drain 31 is formed.

Further, on the semiconductor substrate 40, on the right side of the MESFET 11 in the figure, a source-grounded MESFET 19a having a source 36, a gate 37, a drain 38a and an operation layer 91, and a source 3
8b, a grounded MESFET 19b having an operating layer 92 having a gate 80 and a drain 81, and a grounded MESFET 4 having an operating layer 93 having a source 18a, a gate 46 and a drain 54a.
8 are formed side by side.

Ground conductors 41 are formed on the upper and lower sides of the figure on the semiconductor substrate 40,
A ground conductor 42 is formed on the semiconductor substrate 40 on the upper side of the figure at a predetermined distance from the ground conductor 41. Further, the ground conductors 41 and 42 are provided between the ground conductors 41 and 42 on the left side of the drawing on the semiconductor substrate 40.
And a strip-shaped conductor 10 is formed at predetermined intervals, and the input coplanar line 301 is formed by the conductor 10 and the ground conductors 41 and 42.
Is configured. Further, a strip-shaped conductor 18 is formed between the ground conductors 41 and 42 on the right side of the figure on the semiconductor substrate 40 at predetermined intervals from the ground conductors 41 and 42, respectively, and the conductor 18 and the ground conductors 41 and 42 are formed. Constitutes an output coplanar line 302.

Further, a conductor 52 is formed on the ground conductor 41 via an insulator layer (not shown) made of a dielectric material on the left side of the figure, and the conductor 52, the insulator layer and the ground conductor 41 are used for high-frequency bypass. A metal-insulator-metal capacitor (hereinafter, a metal-insulator-metal capacitor is referred to as an MIM capacitor) 103 is configured. Similarly, a high-frequency bypass MIM capacitor 104 composed of a conductor 53, an insulator layer, and a ground conductor 41 is formed substantially in the center of the ground conductor 41 in FIG. , A high-frequency bypass MIM capacitor 105 including the insulator layer and the ground conductor 41 is formed. Further, similarly, a high-frequency bypass MIM capacitor 100 composed of a conductor 50, an insulator layer and a ground conductor 42 is provided on the ground conductor 42 on the left side of the drawing.
Is formed, and a high-frequency bypass MIM capacitor 101 including a conductor 51, an insulator layer, and the ground conductor 42 is formed on the right side of the ground conductor 42 in the drawing. Here, the conductors 50 to 54 are respectively connected to conductors 55 to 59 formed on the semiconductor substrate 40, and the conductors 55 to 59 are connected to bypass voltage application terminals 60, 56, 61, 62 and 63, respectively. You. The bias voltage application terminals 60, 56, 61, 62 and 63 are, for example,
As shown in the embodiment, the bias voltage application terminals 60, 56, 61, 62 and 63 are connected to a variable voltage source, respectively.
The bias voltage of the gate of the ESFET 19a, the bias voltage of the drain of the MESFET 11, the bias voltage of the drain of the MESFET 19b, and the bias voltage of the drain of the MESFET 17 are applied.

From the conductor 50a on the semiconductor substrate 40 connected to the conductor 50,
Impurity ions are previously implanted in the semiconductor substrate 40 up to the conductor 70 formed between the MESFETs 11 and 19a on the semiconductor substrate 40, thereby applying a bias voltage connected between the conductor 50a and the conductor 70. A resistor 35 is formed. Similarly, a bias setting resistor 45 connected between a conductor 42b on the semiconductor substrate 40 connected to the ground conductor 42 and a conductor 71 formed between the MESFET 19b17 on the semiconductor substrate 40.
Is formed, and further, the semiconductor substrate 40 connected to the conductor 52
A gain adjustment resistor 12 connected between the upper conductor 52a and the conductor 70 is formed, and the semiconductor substrate 40 connected to the conductor 53 is formed.
A gain adjusting resistor 16 connected between the upper conductor 53a and the conductor 71 is formed.

Further, similarly to the above, the coupling M composed of the conductor 31a, the insulator layer 94 and the conductor 70 connected to the drain 31 of the MESFET 11.
An IM capacitor 33 is formed, and a coupling MIM capacitor 43 including a conductor 81a, an insulator layer 96, and a conductor 71 connected to the drain 81 of the MESFET 19b is formed.

In the MESFET 11, the source 10a of the MESFET 11 is connected to the conductor 10, and the gate 30 of the MESFET 11 is connected to the ground conductor 41. The drain 31 of the MESFET 11 is connected to the gate 37 of the MESFET 19a via the coupling MIM capacitor 33, and is connected to the bias voltage application terminal 61 via the resistor 12, the conductor 52a and the conductor 57.

In the MESFET 19a, the source 36 of the MESFET 19a is a ground conductor.
The gate 37 of the MESFET 19a is connected to the conductor 7
0, the resistor 35, the conductor 50a, the conductor 50, and the conductor 55 are connected to the bias voltage application terminal 60. The drain 38a of the MESFET 19a is connected to the source 38b of the MESFET 19b.

In the MESFET 19b, the gate 80 of the MESFET 19b is connected to the conductor 51.
a, terminal 1 for bias voltage application via conductor 51 and conductor 56
5, the drain 81 of the MESFET 19b is connected to the gate 46 of the MESFET 17 via the coupling MIM capacitor 43, and via the resistor 16, the conductor 53b, the conductor 53 and the conductor 58,
Connected to bias voltage application terminal 62.

In the MESFET 17, the source 18a of the MESFET 17 is connected to the conductor 18, and the gate 46 of the MESFET 17 is connected to the ground conductor 42 via the conductor 71, the resistor 45, and the end 42b of the ground conductor 42. M
The drain 54a of the ESFET 17 is connected to the bias voltage application terminal 63 via the conductor 54 and the conductor 59.

With the above configuration, the FETs 11, 19a, 19b and 17 in the configuration of the second embodiment shown in FIG.
Input / output microwave lines 10 and 18 formed of C MESFET
Are formed by the coplanar paths 301 and 302, respectively, and in addition to the configuration of the second embodiment, the coupling MIM capacitors 33 and 43 and the high-frequency bypass MIM capacitors 100, 101 and 1 are added.
03, 104, 105, bias voltage application terminals 15, 60 to 63, bias voltage application resistor 35, and bias setting resistor 45 are formed. Accordingly, the high frequency equivalent circuit in the microwave band of the MMIC of the microwave variable attenuator according to the fourth embodiment configured as described above is as shown in FIG. 2, and the MMIC of the fourth embodiment is Has the same functions and effects as those of the second embodiment.

In the fourth embodiment described above, a current feedback resistor may be connected between the gate 37 and the source 36 of the MESFET 19a, as in the third embodiment. This makes it possible to improve nonlinear distortion in the MESFET 19a as in the third embodiment.

In the above fourth embodiment, the gain adjustment resistors 12, 16
And an inductance may be inserted in series. Thereby, there is an advantage that the frequency characteristic of the attenuation can be flattened over a wide band, and a decrease in gain at a higher frequency can be compensated.

In the above fourth embodiment, MESFETs 11, 19a, 19b and
17, but not limited to this, other types of FETs
May be used. Although a coplanar line is used as the input / output microwave line, the present invention is not limited to this, and other types of microwave lines such as a microstrip line and a slot line may be used.

Experimental Example In this embodiment, the MMIC of the microwave variable attenuator of the fourth embodiment shown in FIG. 4 was used, and variable voltage sources were connected to the bias voltage application terminals 15 and 60 to 63 of the MMIC, respectively. Then, after adjusting the bias voltage applied to the terminals 60 to 63 so that the MESFETs 11, 19a, 19b, and 17 are in the optimal bias state in which each of the MESFETs operates linearly, the frequency ranges from 0.01 GHz to 8 GHz and the terminal By changing the bias voltage Vc applied to 15 from 0 V to -1.2 V, the frequency characteristics of the gain between the input and output coplanar lines 301 and 302 of the MMIC of the above device, the frequency characteristics of the input reflection coefficient S ₁₁ in the input coplanar line 301, and was measured frequency characteristics of the output reflection coefficient S ₂₂ of the output coplanar line 302.

FIG. 5 (A) is an MM of the microwave variable attenuator of FIG.
FIG. 4 is a diagram illustrating a frequency characteristic of a gain between input and output of the IC. Fifth
In FIG. 9A, when the bias voltage Vc is changed from 0 V to -1.0 V, a substantially flat gain or attenuation frequency characteristic is obtained from 1 GHz to 7 GHz. When the bias voltage Vc is set to exceed -0.6 V, the MMIC of the device becomes an amplifying device, while the bias voltage Vc is set to-
When the voltage is set to 0.6 V or less, the device MMIC becomes an attenuation device.

FIG. 5 (B) is an MM of the microwave variable attenuator of FIG.
Is a diagram showing the frequency characteristic of the input reflection coefficient S ₁₁ of the IC, FIG. 5 (C) is a graph showing the frequency characteristic of the output reflection coefficient S ₂₂ of the MMIC microwave variable attenuator of FIG. 4. 5 (B) and 5 (C), the bias voltage Vc is changed from 0V to-
Input / output reflection coefficient even when changed to 1.2V
This shows that S ₁₁ and S ₂₂ hardly change from the frequency of 1 GHz to 7 GHz. In addition, the input / output reflection coefficients S ₁₁ , S
₂₂ is -10 from 1 GHz to 8 GHz
dB or less, which results in a cascoded FE
The influence of the impedance change at the gate of the FET 19a and the drain of the FET 19B at T19 is caused by the input / output coplanar lines 301,
It hardly appears in 302, input coplanar line 301 and FET1
1 between the input matching circuits 201 and the output matching circuit 203 of the FET 17
This shows that the impedance is well matched between the output coplanar line 302 and the output coplanar line 302.

Other Embodiments In the above embodiments, an FET is used as an impedance conversion element, and an element for attenuating a signal by a predetermined amount of attenuation corresponding to a bias voltage. However, the invention is not limited to this. An active element having an impedance conversion function such as a bipolar transistor and a vacuum tube, and a function of attenuating with a variable attenuation may be used.

In the above embodiment, the resistor 12 is used as a gain adjusting element.
And 16 are used, but the invention is not limited to this, and other active elements or passive elements may be used.

In the above embodiments, the microwave variable attenuator and the MMIC of the device are described. However, the present invention is not limited to this, and the present invention can be used not only in the microwave band but also in other frequency bands.

[Effects of the Invention] As described above in detail, according to the present invention, since active elements are used for input / output matching circuits, the input / output lines can be extended over a wide band due to the impedance conversion action and irreversibility of the active elements. A variable attenuator capable of favorably matching impedance can be realized.

Further, since each of the active elements can be formed integrally with, for example, an integrated circuit, there is an advantage that the size can be significantly reduced as compared with the conventional example.

Further, as described above, the connection of the voltage feedback element has an advantage that nonlinear distortion in the first field-effect transistor can be greatly improved.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a microwave variable attenuator according to a first embodiment of the present invention, FIG. 2 is a circuit diagram of a microwave variable attenuator according to a second embodiment of the present invention, and FIG. FIG. 4A is a circuit diagram of a microwave variable attenuator according to a third embodiment of the present invention. FIG. 4A is a microwave variable attenuator using a coplanar line as an input / output line according to a fourth embodiment of the present invention. MM
FIG. 4 (B) is a longitudinal sectional view taken along line AA ′ of FIG. 4 (A), and FIG. 4 (C) is a longitudinal sectional view taken along line BB ′ of FIG. 4 (A). FIG. 5 (A) is a diagram showing the frequency characteristics of the gain of the microwave variable attenuator of FIG. 4, and FIG. 5 (B) is the input reflection coefficient S ₁₁ of the microwave variable attenuator of FIG. shows the frequency characteristic, FIG. 5 (C) is a diagram showing a frequency characteristic of the output reflection coefficient S ₂₂ of the microwave variable attenuator of FIG. 4, FIG. 6 is a conventional example microwave variable attenuator of It is a circuit diagram. 11, 19a, 19b, 17 ... field effect transistor (FET), 13 ... double gate field effect transistor (double gate FET), 29 ... resistance.

────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Tsuneo Tokuma Mitsuruya, Seika-cho, Soraku-gun, Kyoto 5th place, Sanpani, 5th place, ATIR Optical Co., Ltd. (56) References: Shokai 60-139326 (JP, U) (58) Field surveyed (Int. Cl. ⁶ , DB name) H03H 11/24, 11/46 H03G 3/10

Claims (2)

(57) [Claims] A first field-effect transistor having a common source, and a second field-effect transistor having a source connected to a drain of the first field-effect transistor;
By changing the bias voltage applied to the gate of the second field-effect transistor, the signal input to the gate of the first field-effect transistor and the signal output from the drain of the second field-effect transistor are changed. A variable attenuator for changing an amount of attenuation, which is a ratio, wherein a source is connected to the input line and a drain is connected to the gate of the first field effect transistor; A fourth field-effect transistor having a grounded drain connected to the drain of the second field-effect transistor and having a source connected to the output line. 2. The variable attenuator according to claim 1, wherein a current feedback element is connected between a gate and a drain of said first field effect transistor.