JP2758161B2 - Method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to a method for manufacturing a semiconductor device using an amorphous semiconductor layer, and more particularly to a method for controlling characteristics of an amorphous semiconductor layer. About. (Prior Art) A device using an amorphous semiconductor layer such as amorphous silicon (a-Si) has attracted attention for a semiconductor device requiring a large area, such as a liquid crystal driving circuit. Conventionally, conduction type control of a-Si layer
This has been performed by doping impurities simultaneously with the formation of the a-Si layer. For example, p-type hydrogenated a-
In order to form a Si (a-Si: H) layer, diborane (B ₂ H ₆ ) containing boron (B) together with monosilane (SiH ₄ ) and hydrogen (H ₂ ) as raw material gases is formed in a film forming apparatus. Gas is introduced and decomposed by high frequency power or microwave power.
The ions and radicals generated here reach the glass substrate, and a p-type a-Si: H layer containing boron is obtained. In such a conduction type control, the a-S
Since the entire surface of the i: H layer is p-type, if a p-type layer is required in a required area, it is necessary to selectively etch the deposited layer. Therefore, in order to obtain an element by combining a-Si: H layers of different conductivity types, it is necessary to repeat film formation and etching. As a result, the surface of the substrate on which the elements are formed has large irregularities, and the disconnection of the strain line is likely to occur. In addition, since the interlayer insulating film is also formed on a surface having large irregularities, insulation failure is likely to occur. The same applies not only to the control of the conductivity type of the a-Si: H layer, but also to different types of semiconductor layers such as a-SiC.
The same can be said when a SiN layer, which is a layer or an insulating layer, is combined with an a-Si: H layer. (Problems to be Solved by the Invention) As described above, in the conventional device formation using an amorphous semiconductor layer whose characteristics are controlled simultaneously with film formation,
There have been problems in reliability, such as increased surface irregularities and complicated processes. An object of the present invention is to provide a method for manufacturing a semiconductor device using an amorphous semiconductor layer which solves such a problem. [Structure of the Invention] (Means for Solving the Problems) In a method for manufacturing a semiconductor device according to the present invention, a substrate on which an amorphous semiconductor layer containing amorphous silicon as a main component is formed is mounted in a container. Then, a raw material gas containing a property controlling substance and hydrogen is introduced into the container, decomposed by externally applied energy, and the generated element ions are accelerated by an electric field and introduced into the amorphous semiconductor layer. A method of manufacturing a semiconductor device for controlling characteristics of the amorphous semiconductor layer, wherein the characteristic control substance includes nitrogen ions for controlling the resistivity of the amorphous semiconductor layer when the source gas is decomposed. Is used. (Function) According to the method of the present invention, the characteristic can be controlled for an arbitrary region of the amorphous semiconductor layer on the substrate by using a mask when introducing an element that causes a change in the characteristics of the amorphous semiconductor layer. . Therefore, no selective etching is required,
High-resistance regions can be formed separately in the same plane. As a result, the element surface can be kept flat, and poor insulation and disconnection of wiring due to the provision of large unevenness can be prevented. Further, according to the present invention, since the generated element ions are accelerated by the electric field, the element ions for controlling the characteristics are sufficiently introduced into the amorphous semiconductor layer. Further, according to the present invention, since hydrogen is contained in the source gas, defects such as dangling bonds of silicon in the amorphous semiconductor are repaired by the hydrogen. Therefore, according to the present invention, characteristic control can be effectively performed. Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows the configuration of an impurity doping apparatus used in one embodiment. This apparatus can be used in common with an a-Si film forming apparatus. The vacuum vessel 1 is connected to an exhaust system 4 including a vacuum pump via an exhaust port 2 and a throttle valve 3. A sample stage 6 is provided in the vacuum vessel 1, and a sample 5
Is placed. Sample 5 in this embodiment is a substrate on which an a-Si: H layer has already been formed. A heater 7 is provided in the sample table 6 so that the substrate temperature is maintained at a predetermined value. The impurity source gas 8 is guided from the gas inlet 9 into the vacuum vessel 1, where it is decomposed at the waveguide end 11 by the microwave power supplied from the microwave power supply 10, and mainly the radical species of the impurity element and Ions are obtained. The generated impurity element ions are accelerated by a voltage applied between the electrode 13 and the sample table 6 by the DC power supply 12, reach the sample 5, and are introduced into the a-Si: H layer. Specific experimental data will be given. Using hydrogen dilution 5000ppm of B ₂ H ₆ gas as a source gas 8, a microwave power source 10 is frequency 2.45 GHz, the maximum output 1.3 kW, DC power supply 12 is the maximum voltage 100
kV was used. Sample 5 is a glass substrate (made by HOYA, NA-40) having a thickness of 0.5 μm, on which a 5000-degree a-Si: H layer is formed. This a-Si: H layer is a high resistance layer having a specific resistance of about 10 ¹⁰ Ωcm. The substrate temperature was kept at 200 ° C., and the pressure in the vacuum vessel 1 was kept constant at 0.5 torr. FIG. 2 shows the relationship between the B ₂ H ₆ gas flow rate and the obtained specific resistance when the a-Si: H layer is doped with boron under such conditions. The accelerating voltage is 50 kV and the discharge time is 20 minutes each. As is clear from the figure, although the variation is large, the specific resistance decreases with the gas flow rate, and it can be seen that boron ions are introduced into the a-Si: H layer. However, the amount of boron that is taken into the film and becomes electrically active with respect to the gas flow rate is small, and the boron addition efficiency by this method is low. FIG. 3 is experimental data showing the location dependence of the boron ion addition amount. This data, B ₂ H ₆ gas flow rate 30 SCCM,
This is a case where boron ions are introduced under the conditions of an acceleration voltage of 50 kV, a sample substrate temperature of 200 ° C., and a discharge time of 20 minutes. The sample stage is circular with a diameter of 20 cm. As is clear from the figure,
In the specific resistance distribution, good results were obtained with little variation within a radius of 7.5 cm from the center. 4 (a) to 4 (c) are process cross-sectional views of an embodiment in which the above-described device is applied to a specific element formation. Glass substrate 14
An n-type a-Si: H layer 15 is formed on the entire surface by a known film forming method. A mask 16 of an Al film is formed on the n-type a-Si: H layer 15 of this substrate ((a)). The substrate in this state is mounted on the apparatus shown in FIG. 1, and boron is introduced under the condition of a B ₂ H ₆ gas flow rate of 80 SCCM to form a p-type layer 17 ((b)).
The mask 16 is removed by etching, respectively n-type region and a p-type region to form the Mo electrode 18 _1, 18 _2, and a pn junction diode ((c)). FIG. 5 shows the characteristics of the pn junction diode thus obtained. From the figure, the current when the forward applied voltage is 0.75 V is 2.07 μA, and the on-resistance at this point is about 36 kΩ. This on-resistance is about four orders of magnitude higher than that of a crystalline Si pn junction diode, but the specific resistance of the n-type a-Si: H layer 15 used is
Not so bad considering the ³ Ωcm. As described above, according to this embodiment, it is possible to selectively control the conductivity type of the a-Si: H layer. Therefore, it is possible to obtain an element having a desired combination of conductivity types without requiring selective etching. In the above embodiment, the control of the conductivity type of the a-Si: H layer has been described. However, the band gap can be controlled as follows.
Using the same apparatus as in the previous embodiment, the substrate on which the a-Si: H layer is formed is mounted, and for example, CH ₄ is introduced as a source gas. This is decomposed in the same manner as in the previous embodiment, and an a-SiC: H layer can be obtained by introducing C ions into the a-Si: H layer. a-SiC: H has a larger band gap than a-Si: H. Therefore, a heterojunction can be formed by selectively changing a part of the a-Si: H layer to the a-SiC: H layer using this method. In this case, the raw material gas CH
Simultaneously with ₄ , the introduction of, for example, hydrogen-diluted B ₂ H ₆ as the impurity source gas as in the previous embodiment makes it possible to control the conductivity type simultaneously with the band gap control. In the present invention, it is also possible to control the resistivity of the a-Si: H layer, for example, to selectively form an insulating film. As a specific example, using the apparatus of the above embodiment, the substrate on which the a-Si: H layer is formed is mounted, and NH ₃ is introduced as a source gas. This NH ₃ is decomposed according to the same principle as in the previous embodiment, and N ions are introduced into the a-Si: H layer, whereby the a-Si: H layer is nitrided to be changed to the SiN layer. Since SiN is an insulator, element isolation can be achieved by selectively forming SiN in the element isolation region of the a-Si: H layer by this method. In this method, it is not necessary to remove the a-Si: H layer in the element isolation region by etching, and element isolation is performed while maintaining flatness. The present invention is not limited to the above embodiment. For example, in the embodiment, only the control of the characteristics of the a-Si: H layer has been described. However, the present invention can be applied to a case where other elements are doped with an arbitrary element by selecting conditions. Further, in the embodiment, the characteristic control is performed on a region selected in terms of area on the substrate, but the characteristic control is performed, for example, to a predetermined range of depth from the surface, and the pn, pi, ni, etc. The present invention is also effective when forming a heterojunction or when forming an insulating film on the surface. [Effects of the Invention] As described above, according to the present invention, by controlling the resistivity of the amorphous semiconductor layer in a step different from the film formation, the element surface is kept flat, and insulation failure and wiring disconnection are prevented. A highly reliable semiconductor device which is prevented can be realized.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 shows an impurity doping apparatus used in one embodiment of the present invention, and FIG. 2 shows the effect of controlling the conductivity type of an a-Si: H layer using this apparatus. FIGS. 3A and 3B are diagrams showing the location dependence of the control of the conductivity type, FIGS. 4A to 4C are diagrams showing the steps of manufacturing the pn junction diode of the embodiment, and FIG. FIG. 6 is a diagram showing characteristics of the present invention. 1 vacuum chamber 2 exhaust port 3 throttle valve 4 exhaust system 5 sample 6 sample table 7
Heater 8 Source gas 9 Gas inlet 10 Microwave power supply 11 Waveguide end 12 DC power supply 13
…… electrode, 14 …… glass substrate, 15 …… n-type a-Si: H layer,
16 ... Al mask, 17 ... p-type layer, 18 ₁ , 18 ₂ ... electrodes.

   ────────────────────────────────────────────────── ─── Continuation of front page    (56) References JP-A-57-197824 (JP, A)                 JP-A-62-29132 (JP, A)                 JP-A-62-43120 (JP, A)                 JP-A-63-194326 (JP, A)                 JP-A-61-48979 (JP, A)                 JP-A-62-130519 (JP, A)

Claims (1)

(57) [Claims] A substrate on which an amorphous semiconductor layer containing amorphous silicon as a main component is formed is mounted in a container, a material gas for controlling properties and a hydrogen-containing source gas are introduced into the container, and energy is supplied from the outside. A method for manufacturing a semiconductor device in which the generated element ions are accelerated by an electric field and introduced into the amorphous semiconductor layer to control characteristics of the amorphous semiconductor layer, wherein the characteristic control substance is A method for producing a semiconductor device, wherein nitrogen gas is generated to control the resistivity of the amorphous semiconductor layer when the source gas is decomposed. 2. 2. The method according to claim 1, wherein the amorphous semiconductor layer is formed over the entire surface of the substrate, and the element ions are selectively introduced by providing a mask on the amorphous semiconductor layer. 3. 2. The method according to claim 1, wherein the external energy is microwave power.