JP2751261B2 - Semiconductor substrate bonding method - Google Patents
Semiconductor substrate bonding methodInfo
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- JP2751261B2 JP2751261B2 JP63290983A JP29098388A JP2751261B2 JP 2751261 B2 JP2751261 B2 JP 2751261B2 JP 63290983 A JP63290983 A JP 63290983A JP 29098388 A JP29098388 A JP 29098388A JP 2751261 B2 JP2751261 B2 JP 2751261B2
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- bonding
- semiconductor substrate
- substrate
- substrates
- semiconductor
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Description
【発明の詳細な説明】 以下の順序に従って本発明を説明する。DETAILED DESCRIPTION OF THE INVENTION The present invention will be described in the following order.
A.産業上の利用分野 B.発明の概要 C.従来技術［第２図］ D.発明が解決しようとする問題点 E.問題点を解決するための手段 F.作用 G.実施例［第１図］ H.発明の効果 （A.産業上の利用分野） 本発明は半導体基体の張り合わせ方法、特に少なくと
も片方が半導体基体である二枚の基板どうしを張り合わ
せる半導体基体の張り合わせ方法に関する。A. Industrial application fields B. Summary of the invention C. Prior art [Fig. 2] D. Problems to be solved by the invention E. Means to solve the problems F. Function G. Example [No. FIG. 1] H. Effects of the Invention (A. Industrial Application Field) The present invention relates to a method of bonding semiconductor substrates, and more particularly to a method of bonding two semiconductor substrates, at least one of which is a semiconductor substrate.
（B.発明の概要） 本発明は、上記の半導体基体の張り合わせ方法におい
て、 基板の境界面に気泡が混入しないようにするため、 二枚の基板の少なくとも一方を、これの少なくとも一
方の主面に膜を形成することにより片方の主面が凸状球
面になるように変形させ、該基板に他方の基板を張り合
わせるものである。(B. Summary of the Invention) In the present invention, in the above-mentioned method for bonding semiconductor substrates, at least one of the two substrates is attached to at least one main surface thereof so as to prevent air bubbles from entering the boundary surface between the substrates. By forming a film on one of the substrates, one main surface is deformed so as to be a convex spherical surface, and the other substrate is bonded to the substrate.
（C.従来技術）［第２図］ 半導体基体どうしを張り合わせる張り合わせ技術の実
用化が進み、光センサー、パワーデバイス、SOIの大容
量RAMの製造に応用する試みが為されていることは1988
年３月号NIKKEI MICRODEVICESの82〜98頁等に紹介され
ている。この張り合わせ技術は基本的には半導体基体の
表面に親水性をもたせ二枚の半導体基体を加圧すること
なく単に接触させるだけで水素結合及びファンデルワー
ルス力により結合一体化させ、その後高温処理して２枚
の半導体基体の接合部の引張り強度を強めるものであ
る。(C. Prior art) [Fig. 2] It is 1988 that the practical application of the bonding technology for bonding semiconductor substrates to each other has been attempted and applied to the manufacture of large-capacity RAMs for optical sensors, power devices, and SOI.
March, NIKKEI MICRODEVICES, pages 82-98. In this bonding technique, the surface of the semiconductor substrate is basically made hydrophilic, and the two semiconductor substrates are simply brought into contact with each other without pressurization, and are bonded and integrated by hydrogen bonding and van der Waals force. This is to increase the tensile strength of the joint between the two semiconductor substrates.
ところで、従来、２枚の半導体基体を張り合わせた場
合において半導体基体の境界に気泡が混入するという問
題があった。これは半導体基体の反り等のために周辺部
が先に接着し後で接着した内側の部分に気泡が取り残さ
れるために生じる。By the way, conventionally, there has been a problem that when two semiconductor substrates are bonded to each other, bubbles are mixed into the boundary between the semiconductor substrates. This occurs because bubbles are left behind at the inner portion where the peripheral portion adheres first due to the warpage of the semiconductor substrate and the like, and the peripheral portion adheres later.
そこで、このような気泡の混入を防止する技術が特開
昭61-145839号公報、特開昭61-182239号公報によって提
案されている。第２図はかかる技術を説明するための断
面図であり、同図において、ａは真空チャック、ｂは該
真空チャックａの真空吸引用のエアーが通る真空吸引
孔、ｃは真空チャックａの真空吸着面で、凸状球面にさ
れている。ｄは一方の半導体基体で、真空チャックａに
真空吸着されている。ｅは該半導体基体ｄに張り合わさ
れるところの他方の半導体基体、ｇは該半導体基体ｅの
半導体基体ｄに張り合わされる面である。Therefore, a technique for preventing such air bubbles from being mixed has been proposed in JP-A-61-145839 and JP-A-61-182239. FIG. 2 is a cross-sectional view for explaining such a technique, in which a is a vacuum chuck, b is a vacuum suction hole through which air for vacuum suction of the vacuum chuck a passes, and c is the vacuum of the vacuum chuck a. The suction surface has a convex spherical surface. Reference numeral d denotes one semiconductor substrate, which is vacuum-adsorbed to the vacuum chuck a. e is the other semiconductor substrate bonded to the semiconductor substrate d, and g is the surface of the semiconductor substrate e bonded to the semiconductor substrate d.
この張り合わせは具体的には次のようにして行われ
る。先ず、真空吸着面ｃが凸状球面に形成された真空チ
ャックａにより一方の半導体基体ｄを真空吸着すること
によりその半導体基体ｄの張り合わせ面ｆが凸状球面に
なるように変形させ、そしてその張り合わせ面ｆの中央
部に他方の半導体基体ｅの張り合わせ面ｇの中央部を接
触させる。そしてその状態で真空チャックａの真空度を
徐々に弱めることにより接合部を中央部から周辺部に拡
大させるのである。これによって２枚の半導体基体ｄ、
ｅどうしがある程度の引張り力をもって接合された状態
になる。その後、その引張り力を一連の半導体製造工程
における各処理、加工に耐えられるような強さにするた
めに加熱処理を行うのである。This bonding is specifically performed as follows. First, one semiconductor substrate d is vacuum-sucked by a vacuum chuck a having a vacuum suction surface c formed into a convex spherical surface, so that the bonding surface f of the semiconductor substrate d is deformed to have a convex spherical surface. The center of the bonding surface g of the other semiconductor substrate e is brought into contact with the center of the bonding surface f. Then, in this state, the degree of vacuum of the vacuum chuck a is gradually reduced, so that the joining portion is expanded from the central portion to the peripheral portion. Thereby, two semiconductor substrates d,
e. A state where the members are joined with a certain amount of tensile force. Thereafter, heat treatment is performed to make the tensile force strong enough to withstand various processing and processing in a series of semiconductor manufacturing steps.
このような技術によれば、半導体基体ｄ、ｅが互いに
先ず中央部において接合され、その後接合領域が周辺部
に拡大するので、特に半導体基体を強制的に変形させる
ことなく張り合わせる場合に比較して気泡の混入を少な
くすることができることは確かである。According to such a technique, the semiconductor substrates d and e are first joined to each other at the center, and then the joining region expands to the peripheral portion. It is true that the inclusion of bubbles can be reduced.
（D.発明が解決しようとする問題点） しかしながら、第２図に示すような従来の張り合わせ
技術によっても気泡の混入を完全になくすことは出来な
かった。というのは、その張り合わせ技術によれば、真
空チャックａの真空度を徐々に低めてもある段階で半導
体基体ｄの周辺部が急激に真空チャックａから開放され
て半導体基体ｅに接触してしまい、接合速度が一様には
ならずある段階から急激に速くなるからである。つま
り、接合速度が一様で、接合領域が半導体基体ｄ、ｅの
中央部から徐々に拡大していく場合には気泡が半導体基
体ｄ、ｅ内に取り残される虞れはないが、急激に接合領
域が拡がるという接合速度の急激な増大があると半導体
基体内に気泡が取り残される可能性が生じてくるのであ
る。これが第２図に示す技術の第１の問題点であった。(D. Problems to be Solved by the Invention) However, even with the conventional laminating technique as shown in FIG. 2, the inclusion of air bubbles could not be completely eliminated. This is because, according to the bonding technique, even when the degree of vacuum of the vacuum chuck a is gradually lowered, the peripheral portion of the semiconductor substrate d is suddenly released from the vacuum chuck a at a certain stage and comes into contact with the semiconductor substrate e. The reason is that the joining speed does not become uniform and suddenly increases from a certain stage. That is, when the bonding speed is uniform and the bonding region gradually expands from the center of the semiconductor substrates d and e, there is no possibility that air bubbles are left in the semiconductor substrates d and e. If there is a sudden increase in the bonding speed, that is, the region is expanded, there is a possibility that bubbles may be left in the semiconductor substrate. This was the first problem of the technique shown in FIG.
また、第２図に示す張り合わせ技術には、半導体基体
ｄを真空チャックａを用いて強制的に変形させるが、変
形量を適度にコントロールすることが難しく、ややもす
れば変形量が大きくなり過ぎるという問題がある。とい
うのは、気泡の混入を防止するうえで好適な反り量は半
導体基体が３〜６インチの場合で10〜200μｍ程度であ
る。しかし、そのような小さな反りを真空チャックａに
よって制御性良く与えるのは非常に難しく、どうしても
反りが大きくなり過ぎてしまう。そして、このような反
りを半導体基体に与えながら接合するので、張り合わせ
後においても半導体基体に大きな反りが残ってしまうこ
ととなる。このように張り合わせ後においても大きな反
りが生じている半導体基体に対して引っ張り強度を強化
する熱処理を施すと大きな反り歪が残った張り合わせ半
導体基体が出来上ってしまうことになる。これは後のデ
バイス形成工程において結晶欠陥が発生したり、微細パ
ターン形成にあたって露光不良が発生したりすることの
原因となり無視できない問題となる。Further, the bonding technique shown in FIG. 2 forcibly deforms the semiconductor substrate d using the vacuum chuck a, but it is difficult to appropriately control the deformation amount, and the deformation amount becomes excessively large. is there. This is because the amount of warpage suitable for preventing air bubbles from entering is about 10 to 200 μm when the semiconductor substrate is 3 to 6 inches. However, it is very difficult to provide such a small warp with good controllability by the vacuum chuck a, and the warp will inevitably become too large. Then, since bonding is performed while giving such a warp to the semiconductor substrate, a large warp remains in the semiconductor substrate even after bonding. If a heat treatment for increasing the tensile strength is applied to a semiconductor substrate having a large warp even after bonding as described above, a bonded semiconductor substrate having a large warp distortion will be formed. This causes crystal defects to occur in a later device forming step and exposure failures in forming a fine pattern, and is a problem that cannot be ignored.
また、この技術には真空吸着面が非常に大きな曲率半
径をもったしかも高い精度で仕上げられた凸状球面であ
る特殊な真空チャックａを必要とするという問題も有す
る。In addition, this technique also has a problem that a special vacuum chuck a, which is a convex spherical surface whose vacuum suction surface has a very large radius of curvature and is finished with high precision, is required.
本発明はこのような問題点を解決すべく為されたもの
であり、基板の境界面への気泡の混入をより完全に防止
し、しかも張り合わせ後における反り歪を小さくし、且
つ特殊な治具を用いることなく気泡の混入のない張り合
わせを実現することを目的とする。The present invention has been made in order to solve such problems, and more completely prevents air bubbles from being mixed into a boundary surface of a substrate, reduces warpage after bonding, and uses a special jig. It is an object of the present invention to realize bonding without mixing of air bubbles without using.
（E.問題点を解決するための手段） 本発明半導体基体の張り合わせ方法は上記問題点を解
決するため、二枚の基板の少なくとも一方を、これの少
なくとも一方の主面に膜を形成することにより片方の主
面が凸状球面になるように変形させ、該基板の凸状球面
の主面に他方の基板を張り合わせることを特徴とする。(E. Means for Solving the Problems) In order to solve the above problems, the method for bonding a semiconductor substrate according to the present invention comprises forming at least one of two substrates and forming a film on at least one main surface thereof. Thus, one main surface is deformed to be a convex spherical surface, and the other substrate is bonded to the main surface of the convex spherical surface of the substrate.
（F.作用） 本発明半導体基体の張り合わせ方法によれば、張り合
わせ時における半導体基体は、従来におけるように真空
チャック等による外部からの力によって変形せしめられ
ているのではなく、主面に形成した膜によりバイメタル
効果で変形せしめられているので、張り合わせ途中にお
いて外部からの力から開放されて接合面積が急激に増大
するという虞れがない。即ち、半導体基体の接合領域が
最初から最後までゆっくりしたスピードで中央部から周
辺部に進むようになる。従って、外側の方が内側よりも
先に接合することにより気泡が境界面に取り残されると
いう虞れをより完全になくすことができる。(F. Function) According to the method for bonding semiconductor substrates of the present invention, the semiconductor substrate at the time of bonding is not deformed by an external force such as a vacuum chuck as in the past, but is formed on the main surface. Since the film is deformed by the bimetal effect, there is no danger that the bonding area is suddenly increased due to release from external force during bonding. That is, the bonding region of the semiconductor substrate advances from the center to the periphery at a slow speed from the beginning to the end. Therefore, it is possible to more completely eliminate the possibility that bubbles may be left at the boundary surface due to the outside joining before the inside joining.
そして、半導体基体をその主面に形成した膜によりバ
イメタル効果により反らすので、その膜の材質（熱膨張
係数）、膜厚により反り量を再現性良くコントロールす
ることができ、微小な反り量であるが気泡の混入防止に
好適な反りを確実に与えることができる。従って、反り
が大きすぎ張り合わせ後において反り歪が残るという虞
れもない。Since the semiconductor substrate is warped by the bimetal effect by the film formed on the main surface, the amount of warpage can be controlled with good reproducibility by the material (thermal expansion coefficient) and the film thickness of the film, and the amount of warpage is very small. Can reliably give a warp suitable for preventing air bubbles from being mixed. Therefore, there is no fear that the warpage is too large and warp distortion remains after bonding.
勿論、バイメタル効果により半導体基体を変形させる
ので吸着面を凸状球面に仕上げた真空チャックのような
特殊な治具は必要としない。Of course, since the semiconductor substrate is deformed by the bimetal effect, no special jig such as a vacuum chuck having a suction surface finished to a convex spherical surface is required.
（G.実施例）［第１図］ 以下、本発明半導体基体の張り合わせ方法を図示実施
例に従って詳細に説明する。(G. Example) [FIG. 1] Hereinafter, a method of bonding a semiconductor substrate according to the present invention will be described in detail with reference to illustrated examples.
第１図（Ａ）乃至（Ｆ）は本発明半導体基体の張り合
わせ方法の一つの実施例を工程順に示す断面図である。1 (A) to 1 (F) are cross-sectional views showing one embodiment of a method of bonding a semiconductor substrate according to the present invention in the order of steps.
（Ａ）先ず、同図（Ａ）に示すように互いに張り合わ
される平板なウエハ状半導体基体1a、1bを用意する。
２、２は半導体基体1a、1bの互いに張り合わされる主
面、３、３はその主面２、２と反対側の主面である。(A) First, flat wafer-like semiconductor substrates 1a and 1b to be attached to each other are prepared as shown in FIG.
Reference numerals 2 and 2 denote main surfaces of the semiconductor substrates 1a and 1b which are bonded to each other, and reference numerals 3 and 3 denote main surfaces opposite to the main surfaces 2 and 2.
（Ｂ）次に、同図（Ｂ）に示すように半導体基体1a、
1bの主面３、３（即ち、張り合わされる主面２、２との
反対側の主面）にナイトライドSiN膜４、４を形成す
る。ナイトライドSiNの熱膨張係数は3.85×10-6/degで
あり、シリコンの熱膨張係数（2.4×10-6/deg）よりも
相当に大きい。そして、CVDは例えば700〜1100℃という
非常に高い温度の下で行われる。(B) Next, as shown in FIG.
The nitride SiN films 4 and 4 are formed on the main surfaces 3 and 3 of 1b (that is, the main surfaces opposite to the main surfaces 2 and 2 to be bonded). The thermal expansion coefficient of nitride SiN is 3.85 × 10 −6 / deg, which is considerably larger than the thermal expansion coefficient of silicon (2.4 × 10 −6 / deg). The CVD is performed at a very high temperature of, for example, 700 to 1100 ° C.
各半導体基体1a、1bはCVD処理を終えたばかりの温度
が高い段階では第１図（Ｂ）に示すように平板である。Each of the semiconductor substrates 1a and 1b is a flat plate as shown in FIG. 1 (B) when the temperature is high just after the CVD process.
（Ｃ）しかし、半導体基体1a、1bは常温まで徐冷され
る過程でバイメタル効果によって同図（Ｃ）に示すよう
に張り合わせ面２、２が凸状球面になるように反る。(C) However, the semiconductor substrates 1a and 1b are warped so that the bonding surfaces 2 and 2 become convex spherical surfaces due to the bimetal effect in the process of being gradually cooled to room temperature, as shown in FIG.
次に、半導体基体1a、1bの張り合わせ面２、２を洗浄
し、そして、張り合わせ面２、２にOH基が残存するよう
に親水性処理を施す。Next, the bonding surfaces 2 and 2 of the semiconductor substrates 1a and 1b are washed and subjected to a hydrophilic treatment so that the OH groups remain on the bonding surfaces 2 and 2.
（Ｄ）次に、同図（Ｄ）に示すように半導体基体1a、
1bの張り合わせ面２、２の中央部どうしを接触させる。
すると、水素結合力及びファンデルワールス力等により
接触した部分が自己密着により接合し、しかも接合領域
が中央部から同心円状に周辺に徐々に拡大して行く。(D) Next, as shown in FIG.
The center portions of the bonding surfaces 2 and 2 of 1b are brought into contact with each other.
Then, the portions contacted by the hydrogen bonding force, Van der Waals force, and the like are joined by self-adhesion, and the joining region gradually expands concentrically from the center to the periphery.
（Ｅ）そして、最後に同図（Ｅ）に示すように半導体
基体1aと1bが主面に２、２にて互いに完全に接合され
る。その後、熱処理によりその接合力を強化して、各工
程に耐えられる強度を有するようにする。(E) And finally, as shown in FIG. 9 (E), the semiconductor substrates 1a and 1b are completely joined to each other at 2, 2 on the main surface. Thereafter, the bonding strength is increased by heat treatment so that the joint has a strength that can withstand each step.
（Ｆ）その後、同図（Ｆ）に示すようにナイトライド
膜４、４を例えばホットリン酸H3PO4により除去する。
あるいはプラズマエッチャーにより除去するようにして
も良い。(F) Thereafter, the nitride films 4 are removed by, for example, hot phosphoric acid H 3 PO 4 as shown in FIG.
Alternatively, it may be removed by a plasma etcher.
このような半導体基体の張り合わせ方法においては、
半導体基体1a、1bが真空チャック等による外部からの力
によって変形せしめられるのでなく、主面３、３に形成
したナイトライド膜４、４によるバイメタル効果で、よ
り具体的にはナイトライド膜４、４による収縮応力で変
形せしめられた状態で張り合わされるので、張り合わせ
途中で外部からの力（例えば真空チャックによる吸着
力）から急に開放されて接合面積の増大速度が急速に上
昇するという虞れはない。つまり、半導体基体1a、1bの
接合領域が最初から最後まで略同じ程度の速度で中央部
から周辺部へゆっくりと拡がって行く。従って、半導体
基体1a、1bの境界部に気泡が取り残される虞れが全くな
い。In such a method of bonding semiconductor substrates,
The semiconductor substrates 1a and 1b are not deformed by an external force such as a vacuum chuck or the like. Instead, the nitride films 4 and 4 formed on the main surfaces 3 and 3 form a bimetal effect. Since the bonding is performed in a state of being deformed by the shrinkage stress caused by 4, the bonding force is suddenly released from an external force (for example, the suction force by a vacuum chuck) during the bonding, and the increasing speed of the bonding area may increase rapidly. There is no. In other words, the bonding region of the semiconductor substrates 1a and 1b gradually spreads from the center to the periphery at substantially the same speed from the beginning to the end. Therefore, there is no possibility that air bubbles may be left at the boundary between the semiconductor substrates 1a and 1b.
そして、２枚の半導体基体1a、1bは張り合わせ前には
変形せしめられているが互いに自己密着で接合する過程
で反りが強制されるので、張り合わせによって一体化さ
れた半導体基体1a、1bは平板になる。The two semiconductor substrates 1a and 1b are deformed before bonding, but warp is forced in the process of joining together by self-adhesion, so that the semiconductor substrates 1a and 1b integrated by bonding are formed into a flat plate. Become.
尚、気泡の混入を防止するうえで半導体基体をある程
度以上反らさなければならないことは前述のとおり明ら
かであるが、その反面、反り量が大きいと張り合わせ後
の半導体基体内に大きな歪が残存するという問題があ
る。従って、バイメタル効果により半導体基体に生ぜし
める変形量は例えば10〜200μｍというようにある範囲
内にとどめることが好ましいが、それは半導体基体１の
主面に形成するナイトライド膜２の膜厚をコントロール
することにより実現することができる。というのは、ナ
イトライド膜２の膜厚を薄くすると反り量が小さくな
り、厚くすると反り量が大きくなるからである。As described above, it is apparent that the semiconductor substrate must be warped to a certain degree or more in order to prevent air bubbles from being mixed. However, if the amount of warpage is large, large strain remains in the semiconductor substrate after bonding. There is a problem of doing. Therefore, it is preferable that the amount of deformation caused in the semiconductor substrate by the bimetal effect is kept within a certain range, for example, 10 to 200 μm, but this controls the thickness of the nitride film 2 formed on the main surface of the semiconductor substrate 1. This can be achieved. This is because the smaller the thickness of the nitride film 2, the smaller the amount of warpage, and the larger the thickness, the larger the amount of warpage.
尚、ナイトライドSiNの熱膨張係数は前述のとおりシ
リコンSiの熱膨張係数に比較して相当に大きく、また、
ヤング率も非常に大きい。従って、ナイトライド膜４の
膜厚を厚くした場合にはクラック等が半導体基体に生じ
る虞れがなくはない。そこで、このような場合にはナイ
トライドSiNとシリコン半導体基体との間にシリコンよ
りも小さな値の熱膨張係数を持つシリコン酸化膜（SiO2
膜）をバッファ層として介在させるようにすると良い。
このようにバッファー層を設けた場合においてはシリコ
ン酸化膜とナイトライド膜によるストレスの合計で変形
が生じて張り合わせ面２が凸状球面になることになる。Incidentally, the thermal expansion coefficient of nitride SiN is considerably larger than the thermal expansion coefficient of silicon Si as described above,
The Young's modulus is also very large. Therefore, when the thickness of the nitride film 4 is increased, there is a possibility that cracks or the like may occur in the semiconductor substrate. Therefore, in such a case, a silicon oxide film (SiO 2) having a thermal expansion coefficient smaller than that of silicon is provided between the nitride SiN and the silicon semiconductor substrate.
Film) may be interposed as a buffer layer.
In the case where the buffer layer is provided in this manner, deformation occurs due to the total stress of the silicon oxide film and the nitride film, and the bonding surface 2 becomes a convex spherical surface.
ところで、上記実施例においては互いに張り合される
半導体基体1a、1bの双方をバイメタル効果によって変形
せしめていたが、必ずしもそのようにすることは必要で
はなく、一方の半導体基体1a（又は1b）のみを変形せし
めて張り合わせるようにしても良い。By the way, in the above embodiment, both the semiconductor substrates 1a and 1b bonded to each other are deformed by the bimetal effect, but it is not always necessary to do so, and only one of the semiconductor substrates 1a (or 1b) is deformed. May be deformed and stuck together.
また、上記実施例においては半導体基体１の主面３に
これより熱膨張係数が大きなナイトライド膜４を形成
し、半導体基体１内に収縮応力を生ぜしめることにより
張り合わせ面となる主面２が凸状球面になるように半導
体基体１を変形させていた。しかし、必ずしもそのよう
にすることは必要でなく、張り合わせ面２側にシリコン
よりも熱膨張係数が小さなSiO2膜あるいは多結晶シリコ
ン膜を形成して半導体基体１に引張り応力を生ぜしめる
ことにより張り合わせ面２が凸状球面になるようにして
も良い。Further, in the above embodiment, the nitride film 4 having a larger thermal expansion coefficient is formed on the main surface 3 of the semiconductor substrate 1, and shrinkage stress is generated in the semiconductor substrate 1 so that the main surface 2 serving as the bonding surface is formed. The semiconductor substrate 1 is deformed so as to have a convex spherical surface. However, this is not always necessary, and the bonding is performed by forming a SiO 2 film or a polycrystalline silicon film having a smaller thermal expansion coefficient than silicon on the bonding surface 2 side to generate tensile stress in the semiconductor substrate 1. The surface 2 may be a convex spherical surface.
尚、張り合わせ後半導体基体1a、1b間の引張り強度を
強くする熱処理は半導体基体１にバイメタル効果のため
に形成したSiN等の膜を除去する前に行っても良いが除
去した後に行っても良い。The heat treatment for increasing the tensile strength between the semiconductor substrates 1a and 1b after the bonding may be performed before or after the film such as SiN formed on the semiconductor substrate 1 for the bimetal effect is removed. .
このように本発明半導体基体の張り合わせ方法には種
々のバリエーションが考えられる。As described above, various variations can be considered in the method of bonding the semiconductor substrate of the present invention.
（H.発明の効果） 以上に述べたように、本発明半導体基体の張り合わせ
方法は、少なくとも片方が半導体基体である二枚の基体
のうちの少なくとも一方の基体の少なくとも一方の主面
に、該基体に収縮応力又は引張応力を生ぜしめる膜を形
成して該基体を該膜と反体側の主面が凸状球面になるよ
うに変形せしめ、該変形せしめた基体の凸状球面となっ
た主面に他方の基体の一方の主面を接触させて張り合わ
せることを特徴とするものである。(H. Effect of the Invention) As described above, the method of bonding the semiconductor substrate of the present invention includes the method of attaching the semiconductor substrate to at least one main surface of at least one of two substrates, at least one of which is a semiconductor substrate. A film that generates a contraction stress or a tensile stress is formed on the substrate, and the substrate is deformed so that the principal surface on the side opposite to the film becomes a convex spherical surface. It is characterized in that one main surface of the other substrate is brought into contact with the surface and bonded.
従って、本発明半導体基体の張り合わせ方法によれ
ば、張り合わせ時における半導体基体は従来におけるよ
うに真空チャック等による外部からの力によって変形せ
しめられているのではなく主面に形成した膜によりバイ
メタル効果で変形せしめられているので、張り合わせ途
中において外部からの力から開放されて接合面積が急激
に増大する虞れがなく、半導体基体の接合領域が最初か
ら最後までゆっくりしたスピードで中央部から周辺部に
進むようにすることができる。従って、外側の方が内側
よりも先に接合することにより気泡が境界面に取り残さ
れるという虞れをより完全になくすことができる。Therefore, according to the semiconductor substrate bonding method of the present invention, the semiconductor substrate at the time of bonding is not deformed by an external force such as a vacuum chuck as in the past, but is formed by a film formed on the main surface by the bimetal effect. Since it is deformed, there is no danger that the bonding area will be suddenly increased due to release from external force during bonding, and the bonding region of the semiconductor substrate will be moved from the center to the periphery at a slow speed from the beginning to the end. You can let it go. Therefore, it is possible to more completely eliminate the possibility that bubbles may be left at the boundary surface due to the outside joining before the inside joining.
そして、半導体基体をその主面に形成した膜によりバ
イメタル効果で反らすので、その膜の材質（熱膨張係
数）、膜厚により反り量を再現性良くコントロールする
ことができ、微小な反り量であるが気泡の混入防止に好
適な反りを確実に与えることができる。従って、反りが
大きすぎ張り合わせ後において反り歪が残るという虞れ
もない。Since the semiconductor substrate is warped by the bimetal effect by the film formed on the main surface thereof, the amount of warpage can be controlled with good reproducibility by the material (thermal expansion coefficient) and the film thickness of the film, and the amount of warpage is very small. Can reliably give a warp suitable for preventing air bubbles from being mixed. Therefore, there is no fear that the warpage is too large and warp distortion remains after bonding.
そして、バイメタル効果により半導体基体を変形させ
るのて吸着面を凸状球面に仕上げた真空チャックのよう
な特殊な治具は必要としない。In addition, a special jig such as a vacuum chuck having a suction surface finished to a convex spherical surface by deforming the semiconductor substrate by the bimetal effect is not required.
第１図（Ａ）乃至（Ｆ）は本発明半導体基体の張り合わ
せ方法の一つの実施例を示す断面図、第２図は従来例を
示す断面図である。 符号の説明 1a、1b……基板、２……張り合わされる主面、３……主
面、４……応力を生ぜしめる膜。1 (A) to 1 (F) are cross-sectional views showing one embodiment of the method of bonding semiconductor substrates of the present invention, and FIG. 2 is a cross-sectional view showing a conventional example. DESCRIPTION OF SYMBOLS 1a, 1b: substrate, 2: main surface to be bonded, 3: main surface, 4: film that generates stress.
Claims (4)
基体のうちの少なくとも一方の基体の少なくとも一方の
主面に、該基体に収縮応力又は引張応力を生ぜしめる膜
を形成して該基体を該膜と反対側の主面が凸状球面にな
るように変形せしめ、 上記変形せしめた基体の凸状球面となった主面に他方の
基体の一方の主面を接触させて張り合わせる ことを特徴とする半導体基体の張り合わせ方法A film is formed on at least one main surface of at least one of two substrates, at least one of which is a semiconductor substrate, to generate a shrinkage stress or a tensile stress on the substrate. Deforming the film so that the main surface on the opposite side to the film becomes a convex spherical surface, and contacting and bonding one main surface of the other substrate to the convex spherical main surface of the deformed substrate. Characteristic bonding method of semiconductor substrate
合わせる ことを特徴とする請求項（１）記載の半導体基体の張り
合わせ方法2. The method of laminating a semiconductor substrate according to claim 1, wherein the surface of the semiconductor substrate is bonded with a hydrophilic property.
るように変形させ、 二枚の基体の凸状球面となった主面どうしを張り合わせ
る ことを特徴とする請求項（１）記載の半導体基体の張り
合わせ方法3. The other substrate is also deformed so that one surface thereof has a convex spherical surface, and the convex spherical main surfaces of the two substrates are bonded to each other. The method for bonding semiconductor substrates according to the above)
るように変形させ、 二枚の基体の凸状球面となった主面どうしを張り合わせ
る ことを特徴とする請求項（２）記載の半導体基体の張り
合わせ方法4. The other substrate is also deformed so that one surface thereof has a convex spherical surface, and the convex spherical main surfaces of the two substrates are bonded to each other. The method for bonding semiconductor substrates according to the above)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63290983A JP2751261B2 (en) | 1988-11-16 | 1988-11-16 | Semiconductor substrate bonding method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63290983A JP2751261B2 (en) | 1988-11-16 | 1988-11-16 | Semiconductor substrate bonding method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02135722A JPH02135722A (en) | 1990-05-24 |
| JP2751261B2 true JP2751261B2 (en) | 1998-05-18 |
Family
ID=17762945
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63290983A Expired - Fee Related JP2751261B2 (en) | 1988-11-16 | 1988-11-16 | Semiconductor substrate bonding method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2751261B2 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4624131B2 (en) * | 2005-02-22 | 2011-02-02 | 三洋電機株式会社 | Nitride semiconductor device manufacturing method |
| US7601271B2 (en) * | 2005-11-28 | 2009-10-13 | S.O.I.Tec Silicon On Insulator Technologies | Process and equipment for bonding by molecular adhesion |
| JP5264018B2 (en) * | 2008-04-11 | 2013-08-14 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor substrate |
| JP2009277944A (en) * | 2008-05-15 | 2009-11-26 | Toyoda Gosei Co Ltd | Method of manufacturing junction structure, and method of manufacturing light-emitting device |
| JP5421825B2 (en) * | 2010-03-09 | 2014-02-19 | 東京エレクトロン株式会社 | Joining system, joining method, program, and computer storage medium |
| FR2962594B1 (en) * | 2010-07-07 | 2012-08-31 | Soitec Silicon On Insulator | MOLECULAR ADHESION BONDING METHOD WITH RADIAL DESALIGNMENT COMPENSATION |
| JP2013008921A (en) | 2011-06-27 | 2013-01-10 | Toshiba Corp | Semiconductor manufacturing apparatus and manufacturing method |
| WO2013161906A1 (en) * | 2012-04-27 | 2013-10-31 | 並木精密宝石株式会社 | Composite substrate manufacturing method, semiconductor element manufacturing method, composite substrate, and semiconductor element |
| JP6396756B2 (en) * | 2013-11-28 | 2018-09-26 | 京セラ株式会社 | Composite, method for producing the same, and method for producing composite substrate |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0256918A (en) * | 1988-05-24 | 1990-02-26 | Nippon Denso Co Ltd | Direct joint of semiconductor wafer |
-
1988
- 1988-11-16 JP JP63290983A patent/JP2751261B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02135722A (en) | 1990-05-24 |
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