JP2737305B2 - Digital information signal reproducing device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital information signal reproducing apparatus applied to processing of a digital VTR audio signal for storing / reproducing a digital video signal and a digital audio signal.

[Summary of the Invention]

According to the present invention, the same first digital audio signal and second digital audio signal are recorded twice in each of two adjacent tracks on the tape, and the digital information signal is reproduced from the tape by the rotary head. Head position control means for controlling the scanning position of the rotary head to coincide with the track during variable speed reproduction in which the tape runs at a speed different from the normal speed, and head position control. Detecting means for detecting that the rotary head jumps a plurality of tracks based on a drive signal to the means; and performing switching processing between the first digital audio signal and the second digital audio signal for a predetermined period during the jump by the detection. Outside of the predetermined period, the first digital Means for selecting one of the audio signal and the second digital audio signal can be prevented from deteriorating the error correction capability of the reproduced digital audio signal during variable speed reproduction.

[Conventional technology]

For example, as one of the digital VTRs for recording / reproducing a composite digital color video signal and a digital audio signal, there is a digital VTR that double-records a digital audio signal. In such a digital VTR, reproduced first audio data (referred to as a first copy) and second audio data (referred to as a second copy) are separately decoded and output, and the first copy and the second copy are output. Decrypt using both copies. That is, since the same data is duplicatedly recorded as the first copy and the second copy, non-error data is read from the first copy and the second copy by referring to the error flag obtained by decoding the inner code. The code block of the outer code is selected and the outer code is corrected for this code block. Therefore,
Error correction capability can be improved.

[Problems to be solved by the invention]

In a digital VTR, variable speed reproduction with a tape speed different from that in a normal state is enabled. During variable speed reproduction, the scanning locus of the rotary head and the inclination of the track do not match. However, when the tape speed is about several times the normal tape speed, the rotary head is displaced in the height direction by the piezoelectric element, so that the scanning trajectory of the rotary head coincides with the track. Such a tracking technique is called dynamic tracking.

At the time of variable speed reproduction, for example, double speed reproduction, the rotating head scans a track on which a signal for one field is recorded by dynamic tracking, jumps a track on which a signal for the next field is recorded, and moves to the next one field. The track on which the minute signal is recorded is scanned. When this track jump occurs, the audio data of the first copy and the audio data of the second copy are not the same.
Therefore, when the decoding using the first copy and the second copy is performed according to the error state as in the normal reproduction, an erroneous correction process is performed.

In order to avoid this erroneous correction processing, only one audio data of the first copy and the second copy is used as a reproduction output during variable speed reproduction. As a result, there is a problem that the error correction capability is reduced as compared with the time of normal reproduction.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a digital information signal reproducing apparatus capable of preventing the error correction capability from being reduced during variable speed reproduction.

[Means for solving the problem]

According to the present invention, the same first digital audio signal and second digital audio signal are recorded in duplicate on each of two adjacent tracks on the tape 43. HA ~
In a digital information signal reproducing apparatus designed to reproduce in HD, a head position for controlling the scanning positions of the rotary heads HA to HD to coincide with a track during variable speed reproduction in which the tape 43 runs at a speed different from the normal speed. Control means 56 and 57; detecting means 55 for detecting that the rotary heads HA to HD jump over a plurality of tracks based on a drive signal to the head position control means 56 and 57; Means 51 for switching between the digital audio signal and the second digital audio signal, and selecting one of the first digital audio signal and the second digital audio signal according to an error state during a period other than a predetermined period, 52,
53 and.

[Action]

In the variable speed reproduction operation, when the tape speed is relatively close to that during normal reproduction, track control is performed by head position control means 56 and 57 using, for example, piezoelectric elements. Tracks of a plurality of fields are jumped according to the ratio of the tape speed to that at the time of normal reproduction. As a result, a different period occurs between the first copy and the second copy. In this period, a switching process, for example, a cross-fade is performed, and in the period of the other data where the first copy and the second copy are the same, as in the normal reproduction, data without error is changed from the first copy and the second copy. Selected. Therefore, at the time of variable-speed reproduction, the first copy and the second copy can have the same error correction capability as that of normal reproduction during the period of the same data.

〔Example〕

Hereinafter, an embodiment in which the present invention is applied to reproduction of audio data of a digital VTR will be described with reference to the drawings.

 This description is made in the following order.

a. Recording and reproducing circuit of digital TR b. Scanner and track format c. Variable speed reproducing operation d. Data processing at variable speed reproducing e. Modification a. Recording circuit and reproducing circuit of digital VTR FIG. 1 shows an overall configuration of a recording side of a digital VTR to which the present invention can be applied. In FIG. 1, 1 is an input terminal for an analog audio signal, 2 is an input terminal for a digital audio signal, and 3 is an analog / digital interface. A buffer memory 4 is connected to the interface 3, and the buffer memory 4
The time axis of the audio data is compressed and converted into the order of the block structure. Reference numeral 5 indicates an outer code encoder, and reference numeral 6 indicates a shuffling circuit. The outer code encoder 5 encodes an outer code that is an error correction code. The shuffling circuit 6 is constituted by a memory and rearranges the order of data.

7 is an input terminal for an analog video signal, 8 is an input terminal for a digital video signal, and 9 is an analog / digital interface. The output signal of the interface 9 is supplied to the channel demultiplexer 10 and
Converted to the channel data series. The data sequence of each channel is supplied to the outer code encoder 11, and is subjected to outer code encoding processing. The output data of the encoder 11 is supplied to the intra-sector shuffling circuit 12, and the order of the data in the sector is rearranged.

The shuffling circuit 6 supplies the audio data, the video data from the intra-sector shuffling circuit 12, the synchronization signal and the ID signal from the ID generation circuit 13 to the data multiplexer 14. The output signal of the data multiplexer 14 is supplied to the inner code encoder 15. The inner code encoder 15 performs a process of encoding the inner code. An output signal of the inner code encoder 15 is supplied to the channel encoder 16 and is subjected to Miller square code coding processing. An output signal of the channel encoder 16 is taken out to an output terminal 18 via a recording amplifier 17.

The output terminal 18 is connected to a rotary head. The recording data is recorded on the magnetic tape by the rotating head.
The data reproduced from the magnetic tape is supplied to the reproducing amplifier 22 from the input terminal 21 in FIG. 2 by the rotating head. The output signal of the reproduction amplifier 22 is supplied to the channel decoder 23, where the mirror square code is decoded.

The output signal of the channel decoder 23 is supplied to the synchronization detection circuit 24, and the synchronization signal is detected. Sync detection circuit 24
Is supplied to the inner code decoder 25 to decode the inner code. An output signal of the inner code decoder 25 is supplied to a switch circuit 26, where audio data and video data are separated.

The audio data is supplied to the outer code decoder 28 after being deshuffled by the deshuffling circuit 27. The outer code is decoded by the outer code decoder 28 and stored in the memory.
Written to 29. Decoding of the outer code is, for example, erasure correction with reference to an error flag generated in decoding of the inner code. The memory 29 expands the time axis of the data.
The audio data read from the memory 29 is supplied to the error correction circuit 30, where the error data is corrected.
The output data of the error correction circuit 30 is supplied to an analog / audio interface 31, an analog audio signal is obtained at an output terminal 32, and a digital audio signal is obtained at an output terminal 33.

The video data separated by the switch circuit 26 is written to the buffer memory 34. The video data read from the buffer memory 34 is transferred to the intra-sector deshuffling circuit 35.
Is supplied to the outer code decoder 36 via the. The error-corrected data from the outer code decoder 36 is supplied to the channel multiplexer 37, and the data of two channels is converted into the data of one channel. The output signal of the channel multiplexer 37 is supplied to an error correction circuit 38, where error data is corrected. The output signal of the error correction circuit 38 is supplied to an analog / digital interface 39. An analog video signal is obtained at the output terminal 40, and a digital video signal is obtained at the output terminal 41.

b. Scanner and Track Format FIG. 3 shows an example of a digital VTR scanner.
Four head chips HA to HD are attached to the drum 42 rotating in the direction of the arrow. Head chip HA and
HB is close, head chips HC and HD are close, head chips HA and HC have 180 ° facing distance, and head chip H
B and HD have a 180 ° facing distance. Around the drum 42, a magnetic tape 43 with a winding angle slightly wider than 180 °
Is wound diagonally. A set of head chips HA and HB and a set of head chips HC and HD alternately slide on magnetic tape 43. The angle of the gap between the head chips HA and HB is made different, and similarly, the angle of the gap between the head chips HC and HD is made different, so that azimuth recording is performed. A reproduction signal in which the reproduction signals of the head chips HA and HC having the same azimuth angle are time-division multiplexed is formed. Similarly, a reproduction signal in which the reproduction signals of the head chips HB and HD are time-division multiplexed is formed.

Head chips HA and HB are provided at one end of a support plate made of two plate-like piezoelectric elements, and head chips HC and HD are provided at one end of a similar support plate. The support plate displaces the head chip in the height direction by an amount corresponding to the drive voltage.
For example, when playback is performed at a tape speed set within a tape speed range of (−1 to +3) (the sign indicates the running direction of the magnetic tape 43, and +1 means the tape speed during normal playback), A drive voltage for the piezoelectric element is generated by a microcomputer or the like according to the speed. As a result, the head chips HA to HD correctly scan the tracks formed on the magnetic tape 43.

In the case of a video signal having a field frequency of 60 Hz as in the NTSC system, one field is divided into three segments and one field is divided into three segments.
The segment is recorded as two tracks. That is, the video signal for one field is recorded on the magnetic tape 43 as three segments and six tracks.

FIGS. 4A and 4B show a track format formed on the magnetic tape 43. FIG. FIG. 4A shows a magnetic tape 43.
4B shows a track pattern viewed from the magnetic surface side of FIG.
Shows one track in the order of head scanning. A0, A1, A2, A3 indicate audio sectors, respectively.
These audio sectors A0 to A3 are arranged at the end of the track. A0 to A3 are data of the first, second, third and fourth channels. The same content of audio data is recorded twice at different ends of two tracks.
That is, the same audio data is recorded at each of the end of the previous track on the head separation side and the end of the current track on the head entry side. The first audio data recorded at the end on the head separation side is called a first copy, and the second audio data recorded on the head entry side is called a second copy. The video sector is located in the center of the track. T0 and T1 are track numbers, and S0 is a segment number.

As shown in FIG. 4B, an editing gap is provided between the audio sectors and between the audio sector and the video sector. Audio sectors A0 to A3 are 6
The video sector consists of 204 sync blocks. In FIG. 4B, T is
E indicates a track preamble, E indicates an edit gap preamble, and P indicates a post preamble.

As shown in FIG. 5, each sync block has a length of 190 bytes, and a 2-byte synchronization pattern is added at the beginning. Next, a 2-byte ID pattern is added, and the ID code and 85-byte data are encoded with an inner code to form an 8-byte Chuk code. Also, an 8-byte check code is added to the other 85-byte data to form an inner code block.

The inner code is common to audio data and video data. A Reed-Solomon code is used as the inner code and the outer code. The number of samples of audio data recorded in each audio sector is 266 samples or 267 samples. FIG. 6 shows a block configuration included in one audio sector.

In FIG. 6, numerals 0 to 266 indicate audio sample numbers, PV0 to PV3 indicate outer code check codes, and AUX0 to AUX3 indicate auxiliary words. These audio data, check code and auxiliary word are shuffled. In FIG. 6, the check code of the inner code is not shown. Although the bit length of one sample of the audio data is 20 bits, the encoding of the inner code uses one byte as one symbol. A plurality of bytes aligned in the vertical direction of the array shown in FIG. 6 constitute an outer code block. Therefore, one sector is composed of 85 outer code blocks.

c. Variable speed regeneration operation The variable speed regeneration operation will be described with reference to FIG. The above track format is shown in FIG. 7A.
In FIG. 7A, reference numerals A to D mean tracks to be scanned by the head chips HA to HD. At the time of variable-speed playback, for example, at 2 × speed playback, three segments (six tracks) in which the field F1 is recorded by the dynamic tracking control are similar to the head chips HA to HD as in normal playback.
Reproduced by. When playback of field F1 ends,
Six tracks on which the signal of the next field F2 is recorded are skipped, and the track on which the signal of the next field F3 is recorded is reproduced. Therefore, as shown in FIG. 7B, at the time of double-speed playback, the field F1 is followed by the field F1.
F3 playback data is obtained. In FIG. 7B, S0, S1, S2
Indicates the first, second, and third segments of each field.

Paying attention to before and after the track jump, as shown in FIG. 7A, the first copy DA1 is recorded at the end of the track in the field F1 on the head separation side, and the first copy DA1 is recorded on the end of the track of the next feed F2 on the head entry side. Two copies DA1 'are recorded. The first copy DA1 and the second copy DA1 'are the same audio data. However, since the field F2 is not reproduced, the first copy is performed as shown in FIG. 7C.
The second copy DA2 of the skipped field F2 is reproduced as the second copy paired with DA1. Naturally, the second copy D
A2 is data different from the first copy DA1.

Therefore, in this embodiment, the cross-fade processing is performed at the joint of the fields where the first copy and the second copy have different data, and the normal copy is performed while the first copy and the second copy have the same data. A decoding process similar to that at the time of reproduction is performed.

d. Data Processing During Variable Speed Playback FIG. 8 shows an audio data processing circuit applicable during variable speed playback. 27A and 27B show deshuffling circuits, respectively. One deshuffling circuit 27A
Is supplied with reproduction data in which the reproduction outputs of the head chips HA and HC are alternately positioned, and the other deshuffling circuit
The reproduction data in which the reproduction outputs of the head chips HB and HD are alternately located is supplied to 27B. Output signals of these deshuffling circuits 27A and 27B are supplied to the outer code decoder 28A via the selector 51. The output signals of the deshuffling circuits 27A and 27B are
Supplied to 8C respectively.

The selector 51 selects the non-error data in the first copy and the second copy with reference to the error flag generated by the inner code decoder, and forms a code block of the outer code. The outer code decoder 28A decodes the output data of the selector 51. The decoded output of outer code decoder 28A is memory 2
It is supplied to the error correction circuit 30A via 9A. The output signal of the error correction circuit 30A is supplied to the selector 52.

The data decoded by the decoders 28B and 28C are stored in the memory
The signal is supplied to the crossfader 53 via 29B and 29C and error correction circuits 30B and 30C. The output signal of the crossfader 53 is supplied to the selector 52. The signal selected by the selector 52 is supplied to the analog / digital interface 31 (see FIG. 2). A control signal is supplied from a control signal generation circuit 54 to the selector 52 and the crossfader 53.
The control signal generation circuit 54 receives a detection pulse Pd from the detection circuit 55.
Is supplied.

A drive signal Sd for dynamic tracking is supplied from the controller 57 to the support plate 56 of the head.
The detection circuit 55 detects a track jump from the drive signal Sd. FIG. 9 shows a track jump detection operation. At the time of double speed reproduction shown in FIG.
For HA and HC support plates, saw-like drive signal
Sd is supplied. The field F1 is reproduced, and then a track jump occurs to shift to the reproduction of the field F3. At the time of this track jump, the level of the drive signal Sd changes rapidly, and the detection pulse Pd is formed from this change. In order to accurately detect a track jump, the detection pulse Pd is output only when the change in the drive signal Sd is equal to or higher than a predetermined level.
Is generated. The start timing of the crossfader is determined from the detection pulse Pd, and a control signal for the selector 52 is formed.

As shown in FIG. 10, first and second copies of reproduced audio data are obtained from error correction circuits 30B and 30C. FIG. 10 shows only the audio data of the first channel (decoded output of audio sector A0) for simplicity, wherein a0, a1, and a2 are the reproduction data of each segment of field F1, and b0, b1, and b2 are the reproduced data of field F2. reproduced data of each segment, c0, c1, c2 each segment of the reproduced data in the field F3, d0, d1, d2 each segment of the reproduced data in the field F4, each segment of e _0, e _1, e ₂ fields F5 Means reproduced data.

At the time of double speed reproduction, the field F1 is reproduced by dynamic tracking, then the track of the field F2 is jumped, and the field F3 is reproduced. Field F2
The audio data b0 of the segment S0 is obtained as a first copy. However, due to the track jump, the second copy is audio data c0 of segment S0 of field F3. When the track jumps from the field F3 to the field F5, the audio data of the first copy of the segment S0 of the field F5 becomes the data d0 of the field F4.

The crossfader 53 operates during a period in which the audio data of the first copy and the audio data of the second copy are different from each other. Each sample of the audio data of the first copy is multiplied by a gradually decreasing coefficient. Each sample of audio data is multiplied by a gradually increasing coefficient.

The selector 52 selects the output of the error correction circuit 30A during a period when the data of the first copy and the data of the second copy are the same,
The outputs of the crossfader 53 are selected in different periods, that is, in the operation period of the crossfader 53.

e. Modification The switching process of the period in which the track jump occurs is not limited to the cross-fade, but may be a process of generating an average value of the data of the first copy and the second copy, and either the first copy or the second copy. Output and muting or concealing at discontinuous points can be used. However, the cross-fade processing has an advantage that the sound is smoothly propagated at the switching point of the field.

〔The invention's effect〕

The present invention can prevent an erroneous correction process of performing decoding using different data during variable speed reproduction. Further, according to the present invention, when the first copy and the second copy have the same data, the error-free data is selected from both data.
An error correction capability similar to that of normal reproduction can be obtained.

[Brief description of the drawings]

FIG. 1 shows a digital VT to which the present invention can be applied.
FIG. 2 is a block diagram on the reproducing side of an example of a digital VTR to which the present invention can be applied, FIG. 3 is a plan view showing the configuration of the scanner, and FIG.
FIG. 5 is a schematic diagram showing a format of a digital VTR on a tape, FIG. 5 is a schematic diagram showing a configuration of a sync block, FIG. 6 is a schematic diagram showing a block arrangement of audio data,
FIG. 7 is a schematic diagram used for explaining a variable speed reproduction operation, FIG. 8 is a block diagram showing a configuration of a main part of one embodiment of the present invention,
9 and 10 are schematic diagrams used for explaining the operation at the time of variable speed reproduction. Explanation of main symbols in the drawings 21: Input terminal of reproduction data, 27, 27A, 27B: Deshuffling circuit, 28, 28A, 28B, 28C: Outer code decoder, 51, 52: Selector, 55: Track jump detection Circuit, 56: Support plate for displacing the head.

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁶ Identification code FI G11B 20/18 572 G11B 20/18 572G

Claims (1)

(57) [Claims] An identical first digital audio signal and a same second digital audio signal are recorded on each of two tracks adjacent to each other on a tape. A head position control means for controlling the scanning position of the rotary head and the track to coincide with each other during variable speed reproduction in which the tape runs at a speed different from the normal speed. Detecting means for detecting that the rotary head jumps the plurality of tracks based on a drive signal to the head position control means; and detecting the first digital audio signal and the first digital audio signal for a predetermined period during the jump by the detection. A switching process with the second digital audio signal is performed, Outside, the digital information signal reproducing apparatus characterized by comprising a means for selecting one of said first digital audio signal and the second digital audio signal in response to an error condition.