JP2734029B2 - Series-parallel AD converter - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a serial-parallel A / D converter, and more particularly, to an arrangement of an equal current addition type D / A converter constituting a serial-parallel A / D converter and a wiring method.

[Conventional technology]

FIG. 4 is a block diagram showing an example of a serial-parallel AD converter. The principle of operation is that the first parallel AD converter 1 performs AD conversion to m bits to determine the upper bits. At the same time DA
An analog output corresponding to the AD conversion value is obtained by the converter 2. Next, the difference between the input signal and the analog output is AD-converted into n bits by the second parallel AD converter 5 to obtain lower bits. The sample hold 4 holds the analog input signal until the second AD converter takes in the data. The feature of this method is that an m + n-1 bit AD converter can be obtained using an m-bit AD converter and an n-bit AD converter.
A converter can be realized. On the other hand, the sample-and-hold circuit and the DA converter are required to have an accuracy of m + n-1 bits. There are various methods for configuring the DA converter. As an example, the input of the current output circuit shown in FIG. 5 is connected to the 2 ^m comparator outputs constituting the first AD converter, and the current output terminals I ₀ , ▲ There is an equal current addition type DA converter in which ▼ is connected to each other. The accuracy of this DA converter is determined by the variation of the output current of the current output circuit. Variations in the output current the variation of the output current value of the constant current circuit consisting of transistors Q ₃ and resistor R1 are dominant. As the bias circuit providing a base potential V _B of the transistor Q ₃ are shown in FIG. 6, an output circuit consisting of amplifier 1 for inputting a reference voltage V _REF through a reference resistor R _{REF +,} the amplifier 1 output V _B base is connected to the current detection transistors Q _a and the voltage a resistor R _a - composed of the current conversion circuit. As shown in FIG. 3 (a), such an equal current addition type DA changer is arranged in a comparator block CO constituting a first AD converter.
One of the current output circuits shown in FIG. 5 is incorporated in each of the blocks MP1 to COMP32, the comparator blocks are arranged in parallel, and the common wiring such as the bias wiring 3 and the ground wiring 2 is arranged on the block. It is connected to a predetermined terminal of the block 1 of the bias circuit shown in FIG. Transistor Q _n as also in the block shown in FIG. 3 (b)
And the resistance R _n, R _n 'and the transistor Q _n of the base and the bias lines 3 and connecting the wiring 4 and the through hole 9 and the transistor Q emitter to a resistor R _n lines of _n 4' and the resistor R _n resistance constitute a constant current circuit shown in the FIG. 5 by the through-hole 9 '''lines 4 to be connected to and the resistor R _n lines connecting the 4' and the ground line 2 "R _n. FIG. 3A shows a case where the first AD converter has 5 bits.

[Problems to be solved by the invention]

The equal current addition type DA converter that constitutes the conventional serial-parallel type AD converter described above has a large number of comparator blocks arranged in parallel, so that the common wiring of the current output circuit arranged on the comparator block also becomes long. . For example, if the height of the comparator block is 80 μm, the common wiring length is about 2.6 mm. Of the common wires, especially the ground wire, a large current flows by adding the current of the constant current circuit constituting the current output circuit. Therefore, when the wiring length increases, the ground potential increases as the distance from the bias source increases due to the wiring resistance. Since the output current increases, the output current of the current output circuit decreases as the distance from the bias source increases. As a result, since the amount of change in the output current when the digital input of the DA converter changes by 1 LSB is not constant, a differential error occurs. Further, since there is monotonicity, there is a disadvantage that the accuracy is reduced due to integration as an integral error. The emitter potential of the constant current transistor of the current output circuit is set to 0.5 to 1 V, and the current value is 50 to 100 μm in consideration of power consumption.
Since A is selected, the emitter resistance value is 5 to 10 KΩ.
On the other hand, since the converter block has a height of about 80 μm, when the emitter resistor is arranged in such a block, the resistance length is limited in the conventional example. In order to prevent the output current deviation of each current output circuit and prevent the DA conversion accuracy from lowering, it is necessary to increase the width and length of the emitter resistor of the constant current circuit to improve the relative resistance accuracy. In the conventional example, since the resistance length is limited, it is necessary to arrange several resistors in series while avoiding the wiring in the block or arrange them several times repeatedly and arrange the resistors.The former has the disadvantage that the block area increases. The latter has the disadvantage that the resistance accuracy is reduced. In addition, since the emitter resistance of each constant current transistor is separated in block units, differential errors of the DA converter caused by a shift in resistance width due to the position on the substrate and a decrease in the relative resistance accuracy due to a change in the concentration of the resistance layer are avoided. There are drawbacks that cannot be achieved. Further, with _respect to the current I _REF flowing through the current detection transistor disposed in the bias circuit, the output current of the current output circuit decreases as the distance from the bias circuit decreases due to the influence of the wiring resistance of the ground wiring. , The reference voltage V _REF , the reference resistance R _REF and the current I
There is a disadvantage that a deviation occurs with respect to the full-scale voltage of the DA converter designed in advance with _REF . When a reference voltage is supplied from outside, the full-scale voltage can be set to the design value by adjusting this potential.However, this requires the provision of a reference voltage supply terminal and the output terminal of a DA converter, which also requires adjustment. Become. As described above, the serial-parallel AD converter can realize a high-precision AD converter with a small number of elements, but has a built-in AD converter.
Since the final accuracy is required for the DA converter, the accuracy requirement is severe and the conventional technology has the above-mentioned problems.

[Means for solving the problem]

The equal current addition type DA converter according to the present invention includes a means for arranging a plurality of blocks including a current output circuit in parallel, and dividing at least a ground wiring of a common bias circuit for determining an output current of the current output circuit into a plurality of the block rows. And means for providing a current detection circuit of the common bias circuit at the center of each of the divided common bias wirings,
Means for arranging the emitter resistance of the constant current transistor that determines the output current of the current output circuit over a plurality of blocks including the block in which the constant current transistor is arranged; , Means for arranging the emitter resistance of a constant current circuit constituting the current detection circuit over the current output circuit arranged in contact with the current detection circuit, and means for arranging the emitter resistance of the emitter resistance. Means for arranging a part adjacent to a part of the emitter resistor of the constant current circuit constituting the current output circuit.

〔Example〕

Next, the present invention will be described with reference to the drawings. First
FIG. 1A is a plan view showing an arrangement of an equal current addition type DA converter according to one embodiment of the present invention. FIG. 1B is a plan view inside the comparator block, and FIG. 1C is a plan view inside the block of the current detection unit. Comparator blocks COMP1 to COMP3 including the current output circuit shown in FIG.
2 is divided into two parts, and the comparator block COM
P1~COMP16 constant current source transistor to a bias V _B of the current output circuit by the bias line 3A and the ground line 2A in
Is added. In addition, comparator blocks COMP17 to COMP
32 bias V _B is applied to the same constant current source transistor by bias line 3B and a ground line 2B to. The bias wires 3A and 3B and the ground wires 2A and 2B are connected at a bias circuit block 1 located in the middle of the comparator block row. Comparator block COMP1
A current detection circuit 4A of the bias circuit shown in FIG. 6 is arranged at a substantially intermediate portion of the circuit 16 through COMP16, and a bias is applied by the bias wiring 3A and the ground wiring 2A. Similarly, a current detection circuit 4B is arranged in an intermediate portion of the comparator blocks COMP17 to COMP32, and a bias wiring 3B and a ground wiring 2B are provided.
Bias. Current detection circuit 4
In FIGS. 6A and 6B, as shown in FIG. 6, the collector wiring of the current detecting transistor is connected to the input of the amplifier constituting the bias circuit block 1 (not shown in FIG. 1A). Output current is being detected. In this case, the collector wires of the current detection circuits 4A and 4B are connected and connected to the input of the amplifier. The input of each current output circuit is connected to each comparator output (not shown). The block inside wiring connecting the base and the bias line 3 of FIG. 1 transistor as shown in (b) Q _n and a resistor R _n which is arranged over a plurality of blocks, R _n 'and the transistor Q _n 4 and transistors Q emitter to a resistor R _n lines of _n 4 'and the resistor R _n and the resistor R
constitute a constant current circuit shown in the FIG. 5 by a wire 4 for connecting _n and 'wiring connecting the 4' and the resistor R _n 'and the ground line 2. The resistance R _n comparators block COM
P _{n +} constant current transistor included in the _first resistor to the emitter resistor (not shown) R _{n + 1} 'and disposed adjacent the resistor R _n' is a constant current transistor Q included in the comparator block COMP _{n-1 The} resistance R _n-1 that forms the _n-1 emitter resistance
And are arranged adjacently. Furthermore Figure 1 transistor as shown in (c) Q _A and the resistor R _A, which is arranged over a plurality of blocks, R _A 'and the transistor Q _A base and bias line 3A connects the wire 4 and the transistor Q wiring connecting the emitter and the resistor R _a of the _a 4 'and the resistor R _a resistor R _a' line connecting the 4 'and the resistor R _a' and the ground line 2A
The current detection circuit shown in FIG. The resistor R _A is arranged adjacent to a resistor ₉ ′ forming the emitter resistor of the constant current transistor Q ₉ of the current output circuit included in the comparator block COMP ₉ , and the resistor R _A ′ is a resistor for the current output circuit included in the comparator block COMP 8. a resistor R ₈ to the emitter resistance of the current transistor Q ₂ are adjacently disposed.

The above-described equal current addition type DA converter according to the present invention has a structure in which a comparator block row including a current output circuit forming a DA converter is divided into two, and a bias potential of the current output circuit is applied to each of them. Therefore, the wiring length of the ground wiring from the bias source becomes half of the conventional length. As a result, the rise in the potential of the ground wiring also reduces the ground current by half.
/ 4 rise. Therefore, the change of the output current of the current output circuit is reduced to 1/4 of the conventional one, and the accuracy of the DA converter is improved four times.
In addition, since the current detection circuit of the bias circuit is arranged at the center of each comparator row, the ground potential of the current detection circuit becomes almost half of the potential rise at the ends (COMP1 and COMP32). The bias circuit operates so that the current value I _REF of the current detection circuit becomes a value determined from the reference voltage V _REF and the reference resistance R _REF. The output current of the current output circuit that increases and conversely increases the ground potential decreases.The amount of increase or decrease is determined by the fact that the current detection circuit is in the middle of the comparator block row, Are constant because the currents of the constant current sources flowing into the current sources are the same. In other words, since the current detection circuit is arranged in the middle of the comparator block row, the wiring resistance of the ground wiring is determined by the comparator block arranged farther from the current detection circuit and the comparator block arranged closer to the bias circuit. The effect on the output current due to is canceled out. Therefore, the sum of the output currents does not change from the ideal case where the ground wiring resistance is set to 0.
Full-scale voltage of the DA converter configured in _REF and reference resistor R _REF and the current I _REF is not changed. The current detection circuit is 2
By appropriately designing the reference voltage VREF and the reference resistance R _REF , the current I _REF can be made the same value as the conventional one. When n current detection circuits are provided for one bias circuit, the collector outputs of the current detection circuits are connected and connected to the + input of the amplifier.
_{Since REF} is multiplied by n, it goes without saying that the value of the reference resistor R _{REF +} may be set to 1 / n. If the wiring method of the divided ground wiring and the arrangement of the comparator blocks are the same, the same effect can be obtained even if only one of the current detection circuits is arranged. Further since the emitter resistance of the constant current transistor Q _n as shown in FIG. 1 (b) are disposed over a plurality of blocks, the arrangement with the conventional block except block in the wiring region from the height region Since the resistance length of the limited emitter resistance can be extended to approximately the same size as the block height, a high resistance can be obtained without increasing the block area. Further, since the resistance length can be made longer than in the conventional case, the ratio of the contact resistance to the resistance value becomes smaller than in the conventional case, and the deviation of the relative accuracy of the resistance due to the variation in the contact resistance is improved. In addition, since the resistors constituting the emitter resistors are arranged adjacent to the resistors constituting the emitter resistors of the upper and lower constant current circuits, a deviation in the resistance value caused by variations in the resistance width and the concentration of the resistor can be matched, so that the constant value can be obtained. The relative accuracy of the emitter resistance of the current source circuit can be improved as compared with the related art. Therefore, the deviation of the output current of the current output circuit is improved, and the differential error of the DA converter can be reduced as compared with the related art. Further, as shown in FIG. 1 (c), the emitter resistance of the constant current circuit constituting the current detection circuit is arranged adjacent to a part of the emitter resistance of the constant current transistor of the current output circuit of the comparator block disposed on both sides of the block. Therefore, the output current of the current output circuit and the current of the current detection circuit can be more closely matched than in the past, so that the full-scale voltage of the DA converter can be set more accurately.

FIG. 2A is a plan view of a second embodiment of the present invention.
Shows the case where the emitter resistance R _n of the constant current transistor Q _n located within the n-th comparator block COMPn by a single resistor in this embodiment. Some also emitter resistors R _n and the first embodiment are disposed adjacent a portion of the emitter resistor R _{n + 1} of the constant current transistor (not shown) arranged in (n + 1) th comparator block also n- It is arranged adjacent to a part of the emitter resistance R _n-1 of the constant current transistor Q _n-1 arranged in the first comparator block. In this example, no wiring is required for connecting the two resistors in series required in the first embodiment, and a higher resistance can be obtained because the resistance length can be further increased. As the length becomes longer, the deviation of the resistance ratio due to the variation of the contact resistance is further reduced, and the accuracy of the resistance ratio is improved by increasing the portion of the upper and lower blocks adjacent to the emitter resistance. A higher-precision DA converter can be realized than in one embodiment.

FIG. 2 (b) is a plan view of a third embodiment of the present invention.
The ground wiring 2 from the bias circuit block 1 is laid so as to be divided into two for each of the comparator block rows 5A and 5B including the current output circuit shown in FIG.
The current detection circuit 4 is disposed near the center of the lower ground wiring of the comparator block row 5A, and detects a current flowing through a constant current circuit of a nearby current output circuit to which a bias wiring and a ground wiring are connected (not shown). doing. In this embodiment, since the comparator block row is divided into four and the ground wiring of the bias circuit is wired, the potential rise at the end is 1/16 of the conventional one.
And the DA accuracy is improved over the first embodiment. or,
Although the current detection circuit is provided at only one location, the current flowing through the ground wiring divided into four and the wiring method are the same, and therefore, the deviation of the full-scale voltage of the DA converter can be prevented as described in the first embodiment. The differential error of the DA converter can be improved by using the emitter resistance of the constant current transistor in the block according to the method of the first embodiment or the second embodiment.

〔The invention's effect〕

As described above, according to the present invention, the common ground wiring of the current output circuit constituting the equal current addition type DA converter is divided into a plurality of wirings, and the current output is provided near the center of at least one of the wirings. By installing and arranging a current detection circuit that determines the output current of the circuit, it is possible to reduce the change in the output current of the current output circuit and prevent the shift of the full-scale voltage, thereby improving the DA conversion accuracy. Further, since the full-scale voltage is not shifted, a reference voltage can be built in, and adjustment of the full-scale voltage is not required. Also, the emitter resistance of the constant current circuit constituting the current output circuit and the current detection circuit is arranged over a plurality of blocks, and is arranged adjacent to a part of the emitter resistance of the upper and lower blocks, thereby increasing the block shape. Therefore, it is possible to reduce the variation in the output current of the current output circuit without performing the operation, and to reduce the differential error of the DA converter. Further, since the current value of the current detection circuit and the current value of the current output circuit can be detected more closely, the full-scale voltage can be set more accurately.

[Brief description of the drawings]

FIG. 1A shows an equal current addition type according to a first embodiment of the present invention.
The top view of a DA converter. FIG. 1B is a plan view of a current output circuit section in the comparator block according to the present invention. FIG. 1 (c) is a plan view of a current detection circuit section according to the present invention. FIG. 2A is a plan view of a current output circuit section in a comparator block according to a second embodiment of the present invention. FIG. 2 (b) is a plan view of an equal current addition type DA converter according to a third embodiment of the present invention. FIG. 3 (a) is a plan view of a conventional equal current addition type DA converter. FIG. 3B is a plan view of a current output circuit section in a conventional comparator block. FIG. 4 is a block diagram of a serial-parallel AD converter. FIG. 5 is a current output circuit. FIG. 6 shows a bias circuit. 1 ... bias circuit block, 2, 2A, 2B ... ground wiring,
3,3A, 3B …… Bias wiring, 4,4A, 4B …… Current detection circuit,
5A, 5B ...... Comparator block row, COMPn, COMPn-1, CO
MPn-2: Comparator block.

Claims (3)

(57) [Claims] 1. A 2 ^m block including a current output circuit including a differential current switch and a constant current source circuit is arranged in parallel on a semiconductor substrate, and a common bias is applied to the constant current circuit of the current output circuit. -Parallel A / D converter incorporating an m-bit equal current addition type D / A converter including a bias circuit for connecting a common ground line of the constant current source circuit of a block including the 2 ^m current output circuits. The bias circuit is divided into a plurality of parts so that the loads on the respective wirings are equal, and each wiring is connected to the constant current source circuit. The ground point of the first current output circuit of at least one of the divided ground wirings And approximately at the center to the ground point of the terminal current output circuit, the output is biased in common with the constant current source circuit of the current output circuit for determining the output current of the current output circuit. Serial-parallel type AD converter with a built-in constant current adding type DA converter with improved conversion precision by grounding the connected current detection circuit to the input of the road. 2. An emitter resistor of a constant current transistor constituting the constant current circuit included in an n-th block of the 2 ^m block is arranged over a plurality of blocks including the block, and one of the resistors Part is arranged adjacent to a part of the emitter resistance of the constant current transistor included in the (n + 1) th block, and the remaining part of the resistance is connected to a part of the emitter resistance of the constant current transistor included in the (n−1) th block. The series-parallel AD converter according to claim 1, wherein said AD converters are arranged adjacent to each other. 3. An arrangement in which the emitter resistance of a constant current transistor of a constant current circuit constituting the current detection circuit is arranged over a block including the current output circuit sandwiching the detection circuit,
2. A series-parallel A / D converter according to claim 1, wherein said part is arranged adjacent to a part of an emitter resistor of a constant current transistor constituting each of said current output circuits.