JP2723559B2 - Semiconductor integrated circuit device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION The present invention relates to a semiconductor integrated circuit device, and more particularly to a semiconductor integrated circuit device having a multilayer wiring structure.

[Conventional technology]

With the demand for higher integration of semiconductor integrated circuit devices, miniaturization of internal devices and multi-layer wiring have been progressing. Recently, the performance of wiring greatly depends on the performance of this type of semiconductor integrated circuit device, and a technology for forming fine wiring and a flat interlayer film stably thermally, mechanically and electrically is required. It was started. In particular, in order to enhance the reliability of the wiring system, it is important to planarize the interlayer film. Conventionally, after forming a smoothed film by a bias sputtering method or applying a photoresist, the interlayer insulating film and the photoresist are formed. With the same etching rate, a method of flattening by performing etch back on the entire surface, a method of coating a coating film such as a silica film by a spin coating method, and baking it to be used as an interlayer insulating film have been adopted. I have. In particular, flattening with a coating film has been widely used because it can be relatively easily realized without being greatly influenced by the interval and depth of steps of a base film. When the above-mentioned flattening by the coating film is adopted, the coating film collects at the intervals between the wirings and at the same time collects in a wide flat area on the field.

FIGS. 3 (a) and 3 (b) are a partial plan view and a cross-sectional view taken along the line AA of a semiconductor chip showing an example of the related art. As shown in FIG. 1, the semiconductor integrated circuit device includes an internal wiring 3a as a first internal wiring on a field oxide film 2 of a silicon substrate 1.
At the same time, there is a scribe line 3b as a first wiring surrounding the internal wiring 3a formed. The scribe line 3b serves as an index when cutting and dividing into a plurality of semiconductor chips. In addition, a silicon oxide film 4 is formed on the surface including the internal wiring 3a and the scribe line 3b by a vapor deposition method. Further, an organic coating film 5 is formed on the surface of the silicon oxide film 4 to fill the recesses between the wirings. The organic coating film 5 plays a role in flattening the insulating film as described above. The organic coating film 5 and the silicon oxide film 6 formed on the organic coating film 5 and the silicon oxide film 4 already formed constitute one interlayer insulating film 11.
Further, a wiring 8, which is a second internal wiring connecting the internal wiring, is formed by filling the opening 7 of the interlayer insulating film 11. Here, an opening 10 of the silicon nitride film 9 serving as a passivation film is a hole for leading out the wiring 8.

[Problems to be solved by the invention]

The coating film used as the interlayer insulating film is generally an organic film, such as a silica film, even in the case of a film mainly composed of an inorganic substance, in order to suppress the generation of a crack at the time of firing, by adding an organic component. Often used. 800 ℃
By the degree of baking, even in a silica film that becomes a completely inorganic silicon oxide film, when formed on aluminum wiring, the processing at about 500 ° C is the limit, so the organic components used as the solvent are not completely separated, It remains in the film. As described above, since the film containing the organic component has a high water absorption or water permeability in nature, when the coating film is exposed after the film is formed, it is easy to take in water into the inside of the device, thereby significantly lowering the reliability of the device. Cause. Therefore, in the semiconductor integrated circuit device having the above-mentioned conventional structure, the coating film accumulated outside the scribe line 3b shown in FIG. It will be formed around the semiconductor chip. There is a drawback that abnormalities such as corrosion of the wiring, deterioration of the electric breakdown voltage of the interlayer insulating film, and fluctuation of device characteristics are caused by the invaded moisture and mobile ions.

An object of the present invention is to provide a semiconductor integrated circuit device having a structure in which moisture does not enter the interlayer insulating film from the outside.

[Means for Solving the Problems] A semiconductor integrated circuit device according to the present invention is a semiconductor integrated circuit device having a first internal wiring formed on an insulating film provided on a semiconductor substrate and a first internal wiring surrounding a formation region of the first internal wiring. A first wiring, an interlayer insulating film covering a surface on the insulating film including the first internal wiring and the first wiring, and including a film containing an organic component as a part thereof; An opening exposing the surface of the first wiring over the entire periphery thereof is formed in the interlayer insulating film, wherein the multilayer wiring structure has a second wiring formed on the film; A second wiring is attached to an upper surface of the exposed first wiring through an opening, and the second wiring is covered with an insulating film containing no organic component.

〔Example〕

Next, the present invention will be described with reference to the drawings. Also,
The present invention will be described in the order of manufacture for ease of description. FIGS. 1 (a) and 1 (b) are a partial plan view of a semiconductor chip and BB showing a first embodiment of the present invention.
It is sectional drawing. First, as in the conventional case, the silicon substrate 1
A field oxide film 2 is grown thereon, and a wiring 3a as a first internal wiring and a scribe line 3b as a first wiring are formed. Next, a silicon oxide film 4 is grown by a vapor phase growth method. Next, an organic coating film 5 is applied and baked in a nitrogen atmosphere at 500 ° C. Next, the silicon oxide film 6 is formed by a vapor growth method.
To form a planarized interlayer insulating film 11. next,
The interlayer insulating film 11 on the scribe line 3b is removed to form a groove, and an opening 7b exposing the entire periphery of the scribe line 3b is provided.
At the same time, an opening 7a is formed in the interlayer insulating film 11 on the wiring 3a. Next, at the same time as forming the aluminum wiring 8a as the second internal wiring, the wiring 8b as the second wiring extending over the interlayer insulating film 11 and covering the opening 7b is formed.
Next, after the silicon nitride film 9 is grown by the plasma vapor deposition method, an opening 10 for drawing out the wiring is provided to complete the device.

The semiconductor integrated circuit device thus manufactured has a metal waterproof barrier formed of aluminum wiring surrounding the internal wiring region.

The materials of the interlayer insulating film and the wiring need not be the same as those used in the above-described embodiment, but needless to say that they can be used for a semiconductor device.

FIGS. 2 (a) and 2 (b) are a partial plan view and a CC sectional view of a semiconductor chip showing a second embodiment of the present invention. In this embodiment, wirings 3c, 8b and 8c as second wirings having the same cross-sectional structure as the scribe line 3b as the first wiring are provided separately from the scribe lines 3b. This means that the internal wiring formation region is formed at a position separated from the outer periphery of the first and second internal wiring formation regions by a minimum design distance of the wiring or more. The other parts are the same as the first embodiment.

In this embodiment, for example, even if a defect 11 due to mechanical external force occurs at the end of the semiconductor chip, the inner and outer coating films are separated by the wirings 3c, 8c, and 8b, so that the Since the invasion of moisture and the like can be prevented, there is an advantage over the first embodiment.

〔The invention's effect〕

As described above, in the multi-layer wiring of the present invention, even when a highly hygroscopic and water-permeable coating film is used as the interlayer insulating film having excellent flatness, the wiring surrounding the internal wiring pattern of each layer is provided. Since the entire periphery of these wires penetrates the interlayer insulating film and is joined, it is the same as providing a barrier against moisture intrusion. Therefore, there is an effect that the internal wiring is not contaminated by moisture or the like from the outside, and a highly reliable semiconductor integrated circuit device can be obtained.

[Brief description of the drawings]

1A and 1B are a partial plan view and a BB sectional view of a semiconductor chip showing a first embodiment of the present invention, and FIGS. 2A and 2B show a second embodiment of the present invention. 3 (a) and 3 (b) are a partial plan view and an AA sectional view of a semiconductor chip showing an example of a conventional semiconductor chip, respectively. 1 ... silicon substrate, 2 ... field oxide film, 3a, 3c,
8a, 8b, 8c ... wiring, 3b ... scribe line, 4, 6 ... silicon oxide film, 5 ... organic coating film, 7, 7a, 7b, 7c, 10 ... opening, 11 ... missing part.

Claims (1)

(57) [Claims] A first internal wiring formed on an insulating film provided on a semiconductor substrate and a first wiring surrounding a formation region of the first internal wiring; An interlayer insulating film covering a surface of the insulating film including the first wiring and including a film containing an organic component as a part thereof; and a second wiring formed on the interlayer insulating film. In the semiconductor integrated circuit device having a multilayer wiring structure, an opening exposing the surface of the first wiring over the entire periphery is formed in the interlayer insulating film, and the opening is formed on the exposed first wiring through the opening. A semiconductor integrated circuit device, wherein a second wiring is attached to the surface, and the second wiring is covered with an insulating film containing no organic component.