JP2722821B2 - Semiconductor wafer equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer device, and more particularly, to a semiconductor wafer device having a chip area of a ring oscillator capable of performing an operation test, wherein the chip area of the ring oscillator is larger than that of a functional chip. Semiconductor wafer device in the case.

[0002]

2. Description of the Related Art When the operating speed of a tester, which is a wafer testing apparatus, is lower than the operating speed of a functional chip, a ring oscillator is generally arranged on a part of a wafer as shown in FIG. There is a method in which a low-speed oscillation frequency is measured, a delay time per inverter is obtained from the result, and an operation speed of the functional chip is estimated based on the delay time. In this case, assuming that the number of inverter stages is n and the delay time per stage is t, the oscillation frequency f becomes “f =
Ｎｔ nt ”[Hz]. Then, a technique of estimating the operation speed of the functional chip based on the t is adopted.

FIG. 2 shows an example of an arrangement of surface imprints, ie, functional chips and ring oscillator chips in a conventional semiconductor wafer. In FIG. 2, the ring oscillator chips 20 are arranged at an appropriate interval in a part of the arrangement of the functional chips 30. The ring oscillator is formed by a plurality of inverters, for example, as shown in FIG. Reference numeral 22 indicates an output terminal. Further, in FIG.
Indicates a select resistor (resistance value R1) for identifying each ring oscillator chip 20, and reference numeral 52 indicates each function chip 3
A select resistor (resistance value R2) for identifying 0 is shown. P1 to P4 indicate pads for external connection in the ring oscillator chip 20. Among them, the pad P1 indicates an output pad for a ring oscillator. Also, PK
1 to PK4 indicate pads for external connection in the functional chip 30. Among them, the pad PK1 indicates a dummy pad on the functional chip 30. In the operation test, for example, if the resistance value is R2, the test of each functional chip 30 is performed, and if not, the test of the ring oscillator 20 is performed. FIG. 4 shows a flowchart during this time.

[0004]

However, in the above-mentioned prior art, there is a disadvantage that the marking of the inker, that is, the defective product cannot be performed. More specifically, first, there are two types of scan directions of the tester as shown in FIGS. Although it depends on which tester method is used, in the case of the imposition as shown in FIG. 2, if the scanning method shown in FIG. . On the other hand, in the scanning method shown in FIG. 6, the ring oscillator chip 20 cannot always be inked.

The reason why the scanning method shown in FIG. 5 can be used to perform the inking is to test the ring oscillator chip 20 from the side including the output pad. Further, in the scanning method shown in FIG. 6, depending on the initial setting, the test may be performed from the side opposite to the side including the output pad. In this case, another test is performed before reaching the portion including the output pad. There is a risk of hitting the part with an inca. For this reason, it is not possible to accurately mark defective products.

According to the present invention, there is provided a semiconductor wafer device which solves such a disadvantage in the conventional example, and in particular, makes it possible to surely hit an inker on a ring oscillator chip irrespective of a scanning direction of a tester. That is its purpose.

[0007]

According to the present invention, a plurality of functional chips are connected to a part of a semiconductor wafer on which square functional chips are arranged in the same direction. In the semiconductor wafer device in which the ring oscillator chips are arranged, each divided region of each ring oscillator chip when partitioned into a region equivalent to the region of the functional chip within the region of the ring oscillator chip And one and the other output pad, which function identically, are provided in the vicinity of the two opposing sides of the square . This aims to achieve the above-mentioned object.

[0008]

According to the present invention, the output pads of the ring oscillator having a plurality of chip sizes are provided at both ends (ie, at both ends ).
Since it exists in the vicinity of two opposing sides of a square) , it is possible to strike the ring oscillator regardless of the scan direction of the tester.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIG. Here, the same reference numerals are used for the same components as those of the conventional example of FIG. 2 described above. This figure 1
In the figure, reference numeral 1 denotes a semiconductor wafer. A plurality of functional chips 3 and two or more ring oscillator chips 2 are arranged on the semiconductor wafer 1 with reference to the orientation flat 1A. In this embodiment, the ring oscillator chip 2 has a chip size of three chip areas of the same size as the above-described functional chip 3 connected in the same direction.

Each functional chip 3 is formed in a rectangular shape as shown in FIG. 1, and pads for external connection (portions shown in a small rectangular shape) PK1, PK2,
PK3 and PK4 are provided. Further, the ring oscillator chip 2 includes, in each of the partitioned areas when partitioned into areas having the same size as the area of the functional chip 3 described above, pads P1 for external connection similar to those of the functional chip 3 described above. , P2, P3 and P4. Of these,
A pad P1 in the ring oscillator chip 2 indicates one output pad for the ring oscillator.

A fifth pad P5 serving as the other output pad is provided on each of the partitioned areas of the ring oscillator chip 2 on the opposite side to the above-mentioned one output pad P1. The other output pad P5 is obtained by simply branching out the above-mentioned one output pad P1 electrically, and any one of them can output the signal of the ring oscillator chip 2 to the outside. It has become. That is, each of the divided areas of the ring oscillator chip 2 has one and the other two output pads P1 and P2.
5 are provided.

Each of the above-described function chips 3 is also provided with a fifth pad PK5. In other words, each function chip 3 is provided with five pads PK1 to PK5 in the same manner as in the case of each of the above-described divided regions of the ring oscillator chip 2. Five pads PK in this functional chip 3
Of PKs 1 to PK5, pads PK1 and PK5 indicate dummy pads provided corresponding to the respective partitioned regions of the ring oscillator chip 2. Other configurations and operations are the same as those of the above-described conventional example.

As described above, in this embodiment, since the ring oscillator having a plurality of chip sizes has two output pads in each of the divided areas corresponding to the functional chip 3, the scan of the tester is performed. Regardless of the direction, or the direction of rotation of the semiconductor wafer itself, there is an advantage that an inker can be hit on the ring oscillator chip 2 portion.

In the above embodiment, the case where the size of the ring oscillator chip 2 is three times as large as that of the functional chip 3 is exemplified. However, the present invention is not necessarily limited to this. It may be twice or four times or more. In addition, although two output pads are particularly exemplified, three or more output pads may be used.

[0015]

As described above, according to the present invention, since a plurality of output pads are provided on the ring oscillator chip,
It is possible to provide an unprecedented excellent semiconductor wafer device in which an inker can be applied to the ring oscillator chip as required, regardless of the direction in which the tester scans.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing one embodiment of the present invention.

FIG. 2 is a configuration diagram showing a conventional example.

FIG. 3 is a circuit diagram showing a specific example of a conventional ring oscillator.

FIG. 4 is a flowchart showing an operation procedure of a wafer tester in a conventional example.

FIGS. 5 and 6 are explanatory diagrams each showing an example of a tester scan.

[Explanation of symbols]

 2 Ring oscillator chip 3 Function chip P1, P2, P3, P4 Pad PK1, PK2 Output pad

Claims (2)

(57) [Claims] 1. A semiconductor wafer in which a plurality of functional chips are connected in the same direction and a ring oscillator chip having a size of a chip is arranged on a part of the semiconductor wafer on which square functional chips are arranged. In the device, in the area of the ring oscillator chip, when the area is partitioned into an area equivalent to the area of the functional chip, the same function is provided in the vicinity of the two opposing sides of the rectangular shape in each of the partitioned areas. A semiconductor wafer device provided with one and the other output pad. 2. A dummy pad is provided in a region of each of the functional chips and at a position equivalent to the other output pad provided in each of the divided regions of the ring oscillator chip. Item 2. The semiconductor wafer device according to Item 1.