JP2720592B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a metal wiring.

[Conventional technology]

2. Description of the Related Art Conventionally, a metal containing aluminum as a main component has been used as a metal wiring of a semiconductor device. With the recent improvement in the degree of integration of semiconductor devices, metal wiring has also been miniaturized, and disconnection due to stress migration has become a problem. A conventional technique using a metal wiring containing aluminum as a main component will be described with reference to FIG. Fig. 2 (a)
FIGS. 1E to 1E are cross-sectional views of semiconductor chips arranged in the order of steps for explaining a conventional method of forming a metal wiring of a semiconductor device.

First, as shown in FIG.
After forming an N-type impurity layer 2, a field silicon oxide film 4, a silicon oxide film 5 and the like as functional elements such as transistors thereon, a 0.8 μm thick silicon oxide film 3 is grown by using a known CVD technique. Next, as shown in FIG. 2 (b), a contact hole 6 is opened for connection between functional elements, and a polycrystalline silicon film 7 is grown to a thickness of 400 to 500 ° over the entire surface.

Next, as shown in FIG. 2 (c), phosphorus is introduced as an N-type impurity over the entire surface of the substrate at an acceleration energy of 70 keV using an ion implantation technique, and an N-type impurity layer 8 is formed in the contact hole.
To form Next, heat treatment at 800 to 1000 ° C. is performed.

Next, as shown in FIG.
After being deposited to a thickness of .mu.m, it is shaped into an aluminum wiring 10 using a known photo-etching technique, and 350 to 450.degree. C. to reduce the contact resistance between the N-type impurity layer 2 and the aluminum wiring 10 in the contact hole 6. Is performed. At this time, usually the second
As shown in FIG. 3E, the polycrystalline silicon film 7 does not react with the aluminum wiring 10 and disappears.

The conventional polycrystalline silicon film 7 is provided to prevent alloy spikes in the contact hole 6 during heat treatment at 400 to 500 ° C.

The phosphorus is used as N-type impurity layer 8 is an impurity, acceleration energy due to ion implantation (hereinafter referred to as R _P) depth of impurities in silicon after the ion implantation for the 70keV to about 85
0 °, deeper than the thickness of the polycrystalline silicon film 7, sufficiently introduced into the P-type silicon substrate 1 and diffused sufficiently deep by the heat treatment at 800 to 1000 ° C. performed after the ion implantation. Can be prevented.

Conventionally, as a method for introducing impurities into the polycrystalline silicon film 7, there is a method in which heat treatment is performed in an atmosphere containing impurities. However, in this method, it is difficult to control the impurity concentration in the polycrystalline silicon film 7. Complementary MOSI
When an N-type impurity is introduced into a contact hole on an N-type impurity layer and a P-type impurity is introduced into a contact hole on a P-type impurity layer as in C, there is a disadvantage that the manufacturing process becomes complicated.

[Problems to be solved by the invention]

The above-described conventional method for manufacturing a metal wiring of a semiconductor device includes:
After the metal film is shaped into a predetermined pattern, the polycrystalline silicon film 7 does not react with aluminum by a heat treatment at 350 to 450 ° C. performed for the purpose of reducing the contact resistance between the metal film and the N-type impurity layer at the contact portion. .

Further, even if the polycrystalline silicon film remains, since the acceleration energy of phosphorus ion implantation is greater with respect to 70keV so R _P of about 850Å, and the polycrystalline silicon film 7 thickness 400～500A, impurity ions are implanted Almost passes. Therefore, since almost no impurities are introduced into the polycrystalline silicon film, the polycrystalline silicon film remains at high resistance.

In other words, in the conventional method for manufacturing a metal wiring of a semiconductor device,
When the metal wiring is broken by the stress migration described above, there is a drawback that the wiring is directly broken.

[Means for solving the problem]

According to a first method of manufacturing a semiconductor device of the present invention, in the method of manufacturing a semiconductor device having a wiring having a laminated structure including a polycrystalline semiconductor layer and an aluminum layer thereon, an insulating film is formed on a semiconductor substrate and then patterned. Forming a contact hole by etching, forming a polycrystalline semiconductor layer over the entire surface including the contact hole, and implanting impurities of the same conductivity type into the polycrystalline semiconductor layer and the semiconductor substrate by changing acceleration energy conditions. And the step of performing

According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device having a wiring having a laminated structure including a polycrystalline semiconductor layer and an aluminum layer thereon, wherein an insulating film is formed on the semiconductor substrate and then patterned. Forming a contact hole, and forming a polycrystalline semiconductor layer over the entire surface including the contact hole. The first impurity of the same conductivity and different types of impurities is mainly added to the polycrystalline semiconductor layer. Implanting other impurities into the semiconductor substrate.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

1 (a) to 1 (e) are cross-sectional views of semiconductor chips arranged in the order of steps for explaining a first embodiment of the present invention.

First, as shown in FIG. 1 (a), a P-type silicon substrate 1
After forming an N-type impurity layer 2, a field silicon oxide film 4, a silicon oxide film 5 and the like as functional elements such as transistors thereon, a 0.8 μm thick silicon oxide film 3 is grown by using a known CVD technique.

Next, as shown in FIG. 1 (b), a contact hole 6 is opened for connection between functional elements or the like, and then a polycrystalline silicon film 7 is formed.
Is grown to a thickness of 400 to 500 mm using a known CVD technique.

Next, as shown in FIG. 1 (c), phosphorus is introduced as an N-type impurity over the entire surface of the substrate at an acceleration energy of 70 keV by ion implantation, and an N-type impurity is introduced into the P-type silicon substrate 1 in the contact hole 6. An impurity layer 8 is formed.

Next, as shown in FIG. 1 (d), similarly, phosphorus is introduced as an N-type impurity into the entire surface of the substrate with an acceleration energy of 30 keV by using ion implantation technology, and shallow in the P-type silicon substrate 1 in the contact hole 6. An N-type impurity layer 9 is formed.

Next, as shown in FIG. 1 (e), after an aluminum film is applied to a thickness of 0.8 μm, it is shaped into an aluminum wiring 10 using a known photo-etching technique.

In the first embodiment, ion implantation is performed twice with the same acceleration energy of 70 keV as the conventional ion and 30 keV different from the conventional ion implantation. When ion implantation is performed at the same acceleration energy of 70 keV as in the conventional case, the depth of the impurity layer 8 in the contact hole 6 is made the same as in the conventional case.

The phosphorus R _P is an acceleration energy of 30keV is about 370Å
Therefore, phosphorus can be introduced as an impurity into the polycrystalline silicon film 7 of 400 to 500 ° C.
Can be reduced in resistance. When the concentration of phosphorus as an impurity in the polycrystalline silicon film 7 increases,
Heat treatment, the polycrystalline silicon film 7 and the aluminum wiring 10
Can be suppressed, so that the low-resistance polycrystalline silicon film 7 can be left.

Next, a case where phosphorus and arsenic are introduced will be described as a second embodiment.

As described with reference to FIGS. 1A to 1C, after the contact hole 6 is formed, the polycrystalline silicon film 7 is
Grow to a thickness of 00Å. Next, phosphorus as an N-type impurity
An N-type impurity layer 8 is formed in the P-type silicon substrate 1 in the contact hole 6 by introducing the entire surface of the substrate with an acceleration energy of 70 keV.

Next, arsenic as an N-type impurity is ion-implanted into the entire surface of the substrate at an acceleration energy of 50 keV to form an N-type impurity layer in the P-type silicon substrate 1 in the contact hole 6.

For R _P of arsenic is about 320Å when the acceleration energy of 50 keV, can be introduced into the polycrystalline silicon film 7 having a thickness of 400～500A, the first embodiment of introducing phosphorus at a low acceleration energy The same effect as at the time can be obtained.

As described above, according to the present embodiment, since the N-type impurity layers having different depths are separately formed in the contact holes 6, the respective concentrations can be controlled. That is, there is an advantage that the leak at the contact portion can be suppressed by the sufficiently deep N-type impurity layer 8 and a low contact resistance can be realized by increasing the concentration of the shallow N-type impurity layer 9.

Although the embodiment of the present invention has been described with an example in which an N-type impurity layer is formed on a P-type silicon substrate, the present invention is not limited to this. Of course, both the N-type impurity layer and the P-type impurity layer may be formed on the P-type silicon substrate or the N-type silicon substrate.

〔The invention's effect〕

As described above, according to the present invention, since a low-resistance polycrystalline silicon film can be formed under an aluminum film, even if the aluminum film is disconnected due to stress migration, the wiring is connected by the low-resistance polycrystalline silicon film. Therefore, a disconnection failure does not occur. Therefore, there is an effect that a semiconductor device having highly reliable metal wiring can be obtained.

[Brief description of the drawings]

1 (a) to 1 (e) and 2 (a) to 2 (e) are cross-sectional views of a semiconductor chip arranged in a process order for explaining a first embodiment of the present invention and a conventional example. DESCRIPTION OF SYMBOLS 1 ... P type silicon substrate, 2 ... N type impurity layer, 3 ... silicon oxide film, 4 ... field silicon oxide film, 5 ... silicon oxide film, 6 ... contact hole, 7 ... polycrystalline silicon film
8 N-type impurity layer, 9 N-type impurity layer, 10 aluminum wiring.

Claims (2)

(57) [Claims] 1. A method of manufacturing a semiconductor device having a wiring having a laminated structure composed of a polycrystalline semiconductor layer and an aluminum layer thereon, comprising the steps of: forming an insulating film on a semiconductor substrate and then patterning to form a contact hole; Forming a polycrystalline semiconductor layer over the entire surface including the contact hole;
A method of ion-implanting impurities of the same conductivity type into the polycrystalline semiconductor layer and the semiconductor substrate while changing acceleration energy conditions. 2. A method of manufacturing a semiconductor device having a wiring having a laminated structure composed of a polycrystalline semiconductor layer and an aluminum layer thereover, comprising the steps of: forming an insulating film on a semiconductor substrate and then patterning to form a contact hole; Forming a polycrystalline semiconductor layer over the entire surface including the contact hole;
A step of ion-implanting the first impurity mainly into the polycrystalline semiconductor layer among the impurities of the same conductivity type and different types mainly into the semiconductor substrate, respectively. Method.