JP2708309B2 - Multi-chip type semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a multi-chip type semiconductor device in which a semiconductor power chip and a control IC chip for controlling the semiconductor power chip are built in the same package.

[0002]

2. Description of the Related Art FIG. 11 is a sectional view of a conventional multi-chip type semiconductor device. In this semiconductor device 10, as shown in FIG. 1, ceramic substrates 12a and 12b are mounted on a secondary heat sink 11 made of Cu, Al, or the like. A conductive pattern 13a, which is a power chip mounting area, is formed on the upper surface of one ceramic substrate 12a, and a primary radiator plate 14 made of Cu or Mo and a power transistor chip 15a are mounted on the conductive pattern 13a in this order. Have been. The other ceramic substrate 1
Conductive patterns 13b to 13d are also formed on 2b, respectively, and control IC chip 15b is mounted on conductive pattern 13c.

The power transistor chip 15a and the conductive pattern 13b are electrically connected by the aluminum wire 16. The control IC chip 15b is electrically connected to the conductive patterns 13b and 13d by Au wires 17, respectively. Here, the type of the bonding wire is different for the following reason. That is, the power transistor chip 15a is a high-power semiconductor element, and the aluminum wire 16 is used for the power transistor because it is necessary to cope with high power. On the other hand, since the control IC chip 15b is small and delicate, it is not suitable for the aluminum wire bonding method. Therefore, the Au wire 17 is employed.

The external lead 1 is connected to the conductive pattern 13d.
The semiconductor device 10 is sealed with a molding resin 19 except for a part of the external leads 18. The power transistor chip 15a built in the multi-chip type semiconductor device 10 is a high-power semiconductor element, and its operation involves a large amount of heat. Therefore, heat generated in the power transistor chip 15a is radiated to the outside. It needs to be considered. Then, a part of the secondary heat sink 11 is exposed from the semiconductor device 10,
The heat generated by the power transistor chip 15a is radiated to the outside world.

Next, a procedure for manufacturing the semiconductor device 10 will be described. First, the primary heat sink 1 is placed on the conductive pattern (power chip mounting area) 13a of the ceramic substrate 12a.
After mounting the power transistor 4, the power transistor chip 15 is further connected to the primary heat sink 14 by soldering or the like to form a power unit. Further, separately from the formation of the power unit, the conductive pattern 13 on the ceramic substrate 12b is formed.
The control IC chip 15b is mounted on c to form a control unit.

Subsequently, after mounting the power unit and the control unit on the secondary heat sink 11, the external leads 18 are further connected to the conductive patterns 13d. Then, an Au wire bonding step is performed, and the Au wire 17 is formed.
The control IC chip 15b to the conductive pattern 13
b, 13d. Further, an aluminum wire bonding step is performed to electrically connect the power transistor chip 15 and the conductive pattern 13b by the aluminum wire 16. Finally, resin sealing is performed to form the multi-chip semiconductor device 10 shown in FIG.

[0007]

As described above, in order to manufacture the conventional multi-chip type semiconductor device 10, two types of wire bonding steps are required.
As a result, the manufacturing process becomes complicated. Further, the structure of the semiconductor device, particularly, the heat dissipation structure is complicated. That is, the semiconductor device 10 has a structure in which the heat generated in the power transistor chip 15a is transmitted to the secondary radiator plate 11 via the primary radiator plate 14 and the ceramic substrate 12a, and is radiated from the exposed portion to the outside. For this reason, the conventional semiconductor device 10 has a problem that the mass productivity is low and the cost is high.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to provide a multi-chip type semiconductor device which can be manufactured with a simple structure and in fewer manufacturing steps. .

[0009]

According to a first aspect of the present invention, a plurality of external leads, a semiconductor power chip, and a control semiconductor chip for controlling the semiconductor power chip are built in the same package. A multi-chip semiconductor device in which the semiconductor power chip and the control semiconductor chip are electrically connected to the external leads, and in order to achieve the above object, the semiconductor power chip is one of the plurality of external leads. And a part of the external lead on which the semiconductor power chip is mounted is exposed from the package, and a bump is formed on one surface of the control semiconductor chip. Directly connected to external leads.

According to a second aspect of the present invention, a plurality of external leads, a semiconductor power chip, and a control semiconductor chip for controlling the semiconductor power chip are incorporated in the same package. A multi-chip type semiconductor device in which a control semiconductor chip is electrically connected to the external lead, in order to achieve the above object, a secondary heat sink partially exposed from the package; An insulating substrate provided on a heat sink and having a predetermined conductive pattern formed on an upper surface thereof,
A primary heat sink provided on a power chip mounting area of the conductive pattern. Then, the external lead is connected to the conductive pattern, the semiconductor power chip is mounted on the primary heat sink, and connected to the conductive pattern by a wire. While electrically connected to the leads, bumps are formed on one surface of the control semiconductor chip, and the bumps are connected to the external leads, whereby the external leads are connected to the external leads via the bumps and the conductive pattern. It is electrically connected.

According to a third aspect of the present invention, a plurality of external leads, a semiconductor power chip, and a control semiconductor chip for controlling the semiconductor power chip are incorporated in the same package. A multi-chip type semiconductor device in which a control semiconductor chip is electrically connected to the external leads, and a bump is formed on one surface of the semiconductor power chip and one surface of the control semiconductor chip to achieve the above object. Are formed respectively,
The bumps are connected to the external leads, and are connected to the other surface of the semiconductor power chip,
Further, a heat radiation member partially exposed from the package is further provided.

According to a fourth aspect of the present invention, the bump is directly connected to a wiring formed on a tape base,
The bump and the external lead are electrically connected by the external lead being directly connected to the wiring.

[0013]

According to the first aspect of the present invention, a part of the external lead on which the semiconductor power chip is mounted is exposed from the package, and the heat generated in the semiconductor power chip is radiated to the outside via the external lead. I do. A bump is formed on one surface of the control semiconductor chip, and the bump is directly connected to an external lead, so that the control semiconductor chip and the external lead are electrically connected.

According to the second aspect of the present invention, while the external leads are connected to the conductive pattern formed on the insulating substrate, a bump is formed on one surface of the control semiconductor chip, and the bump is connected to the conductive pattern. Connected to the pattern. Thus, the control semiconductor chip and the external leads are electrically connected via the bumps and the conductive patterns.

According to the third aspect of the present invention, bumps are respectively formed on one surface of the semiconductor power chip and one surface of the control semiconductor chip, and the bumps are connected to external leads. Further, a heat radiating member, a part of which is exposed from the package, is connected to the other surface of the semiconductor power chip, and radiates heat generated in the semiconductor power chip to the outside world.

According to the fourth aspect of the present invention, the bump is directly connected to the wiring formed on the tape base, and the external lead is directly connected to the wiring. Therefore, the semiconductor power chip and the external lead, and the control semiconductor chip and the external lead are electrically connected to each other via the bump.

[0017]

FIG. 1 is a sectional view showing a first embodiment of a multi-chip type semiconductor device according to the present invention. In this semiconductor device 20, a plurality of external leads 21 are provided.
A power transistor chip 22a is mounted on one of the external leads 21a. Although not shown, the power transistor chip 22a has three electrodes, a base, an emitter, and a collector. The base electrode and the emitter electrode are provided on the upper surface of the power transistor chip 22a, while the entire bottom surface is provided. It is configured to function as a collector electrode. In this example,
The collector electrode (bottom surface) of the power transistor chip 22a is directly connected to the external lead 21a by soldering or the like. On the other hand, the base and emitter electrodes (not shown) of the power transistor chip 22a are
4 are electrically connected to the external leads 21 respectively. Here, the reason for using the aluminum wire 24 is that the power transistor chip 22a
This is because a large current flows through.

The power transistor chip 22
The control IC chip 22b for controlling the signal a is electrically connected to the predetermined external lead 21. That is, as shown in FIG. 2, the bumps 23 are connected to the control IC chip 22b.
And is directly connected to the external lead 21.

As described above, since the power transistor chip 22a handles a large current, the power transistor chip 22a generates a large amount of heat and heat radiation processing is essential. Therefore, in this embodiment,
As shown in FIG. 1, a part 21a of an external lead 21 on which a power transistor chip 22a is mounted is exposed from a mold resin 25 of a semiconductor device, and heat generated from the power transistor chip 22a is transferred to the outside world through the external lead 21. Dissipates heat.

Next, a procedure for manufacturing the semiconductor device 20 will be described. First, the power transistor chip 22a
Is printed on the bottom surface of the substrate and the bumps 23 of the control IC chip 22b. After the power transistor chip 22a and the control IC chip 22b are mounted on the lead frame, the chip is placed in a solder melting furnace and soldered. Thereby, the external leads 2 of the power transistor chip 22a are
Mounting and control IC chip 22b and external leads 2
1 is completed.

Next, an aluminum wire bonding step is performed to electrically connect the base and emitter electrodes of the power transistor chip 22a to the external leads 21 respectively. Subsequently, resin sealing is performed, and the lead frame is cut off in the middle to form the multi-chip type semiconductor device shown in FIG.

As described above, according to the first embodiment,
Power transistor part 21a of the outer lead 21 for mounting the chip 22a is exposed from the semiconductor device 20, a power transistor heat external leads from the chip 22a 21
Since the heat is radiated to the outside world via a, heat can be radiated efficiently with a simple structure. In addition, the Au wire wire bonding step is not required,
The manufacturing process can be simplified. Therefore, the multi-chip semiconductor device 20 can be manufactured with a simpler structure and with fewer manufacturing steps.

FIG. 3 is a sectional view showing a second embodiment of the multi-chip type semiconductor device according to the present invention. The semiconductor device 30 according to the second embodiment is a conventional semiconductor device 10.
(FIG. 11) is that the control IC chip 15b is connected to the external lead 1 by the Au wire 17 in the conventional example.
In the second embodiment, a bump 37 is formed on the bottom surface of the control IC chip 35b, and the bump 37 is electrically connected to the conductive pattern 33.
b, 33d, and the other configurations are almost the same.

Next, the manufacturing procedure of the semiconductor device 30 will be described, and its features will be clarified. First, the primary heat sink 34
The power unit is formed by mounting the power transistor chip 35a thereon. Then, after solder is printed on the bottom surface of the power unit (the bottom surface of the primary heat sink 34) and the bumps 37 of the control IC chip 35b, the power unit and the control IC chip 35b are mounted on the ceramic substrate 32, and furthermore, a solder melting furnace is used. And soldering. Subsequently, after the external leads 38 are connected to the conductive patterns 33d, the ceramic substrate 32 is connected on the secondary heat sink 31. Then, an aluminum wire bonding process is performed, and the power transistor chip 35a is
And the conductive pattern 33b are electrically connected. Finally, resin sealing is performed to form the multi-chip semiconductor device 30 shown in FIGS.

As described above, also in the second embodiment, as in the first embodiment, the Au wire bonding step becomes unnecessary, and the manufacturing process can be simplified.

FIG. 5 is a sectional view showing a third embodiment of the multi-chip type semiconductor device according to the present invention. In the semiconductor device 40 according to the third embodiment, the control IC chip 4
A bump 42 is formed on the upper surface of 1b, and the control IC chip 41b is directly connected to the external lead 43 via the bump 42.

FIG. 6 is a perspective view showing a power unit of the semiconductor device according to the third embodiment. As shown in the figure,
A power transistor chip 41a and a pedestal electrode 45 are spaced apart from each other by a fixed distance on a heat radiating plate 44 made of Cu, Mo or the like. A bump 46c is formed on the upper surface of the pedestal electrode 45, and the bottom surface (collector electrode) of the power transistor chip 41a via the pedestal electrode 45 and the heat sink 44.
The bump 46c functions as a collector bump electrode because it is electrically connected to the bump. Also, bumps 46b and 46e are formed on base and emitter regions (not shown) formed above the power transistor chip 41a, respectively, and function as base and emitter bump electrodes. Then, as shown in FIG. 5, these bumps 46b, 46c and 46e are connected to the external leads 43.
Is directly connected to In the semiconductor device according to the third embodiment, a part of the radiator plate 44 is exposed from the mold resin 47 of the semiconductor device, and the heat generated from the power transistor chip 41a is radiated to the outside via the radiator plate 44. Is done.

Next, a procedure for manufacturing the semiconductor device will be described. First, after mounting the power transistor chip 41a and the pedestal electrode 45 on the heat sink 44 to form a power unit, each of the bumps 42, 46b, 46c, 46e is formed.
Print solder on each. Then, the power unit and the control IC chip 41b are positioned on the lead frame, and further placed in a solder melting furnace to perform soldering. Thus, the power transistor chip 41a and the control IC chip 41b are electrically connected to the external leads 43. Subsequently, resin sealing is performed, and the lead frame is cut off from the middle to form the multi-chip semiconductor device 40 shown in FIG.

As described above, in this embodiment, since the power transistor chip 41a and the control IC chip 41b are simultaneously bump-mounted in one step, the wire bonding step is not required, and the first and second embodiments are not required. The manufacturing process is simpler than that of the first embodiment. Moreover, as can be easily understood from the comparison between FIG. 5 and FIG. 11, the heat dissipation structure of the semiconductor device according to the third embodiment is simple. As a result, the structure is simpler than in the first and second embodiments, and a multi-chip semiconductor device can be manufactured with fewer steps.

FIG. 8 is a sectional view showing a multichip type semiconductor device according to a fourth embodiment of the present invention. In the semiconductor device 50 according to the fourth embodiment, the control IC chip 5
A bump 52 is formed on the upper surface of the tape base 1b, and the control IC chip 51b is connected to the wiring 54 formed on the upper surface of the tape base 53 via the bump 52.

The power unit including the power transistor chip 51a is connected to the wiring 54 of the tape base 53 in the same manner as in the third embodiment. That is, as shown in FIG. 9, a power unit is formed by connecting the power transistor chip 51a and the pedestal electrode 56 to the upper surface of the heat radiating plate 55 at regular intervals. A bump 57c for collector is formed on the upper surface of the pedestal electrode 56 , and bumps 57b and 57e for base and emitter are formed on the power transistor chip 51a, respectively.
It is connected to the wiring 54 of the tape base 53.

An external lead 59 is connected to the wiring 54 of the tape base 53, and the semiconductor device 50 and a peripheral circuit (not shown) are connected via the external lead 59, the wiring 54 and the bumps 52, 57b, 57c and 57e. Can be transmitted and received.

In the semiconductor device according to the fourth embodiment, as in the third embodiment, the heat generated from the power transistor chip 51a is transferred to the outside by the heat radiating plate 55 exposed from the mold resin 58 of the semiconductor device. It is configured to radiate heat.

Next, a procedure for manufacturing the semiconductor device 50 will be described. First, a power unit is formed in the same manner as in the third embodiment. Subsequently, the power transistor chip 51a and the control IC are formed by the so-called TAB method.
The chip 51b is connected to the wiring 54 of the tape base 53.
That is, after the solder is printed on each of the bumps 52, 57b, 57c, and 57e, the power unit and the control IC
The chip 51b is positioned on the tape base 53, and soldering is further performed. Thus, the power transistor chip 51a and the control IC chip 51b are connected to the wiring 54 of the tape base 53 at a time (FIG. 9).

Then, after the external leads 59 are connected to the wiring 54, resin sealing is performed with a mold resin to form the multi-chip type semiconductor device 50 shown in FIG.

As described above, in the fourth embodiment, TAB
Although the third embodiment differs from the third embodiment in that the method is used, the other points are the same. Therefore, the same effect as in the third embodiment can be obtained.

FIG. 10 is a sectional view showing an improved example of the third embodiment of the multichip type semiconductor device according to the present invention.
In this improved example, the power transistor chip 41a and the control IC chip 41b are made of a soft resin 4 such as silicon.
8 covered. Therefore, the resin 48 plays the role of a cushion, and the stress applied to the connection between the bumps 42, 46b, 46c, 46e and the external leads 43 is reduced. As a result, disconnection or the like at the relevant portion can be prevented.

The technique for covering the connection portion with a soft resin such as silicon is not limited to the third embodiment described above.
It can be applied to the first, second and fourth embodiments.

In the above embodiment, the case where a power transistor chip is employed as a semiconductor power chip has been described. However, a similar effect can be obtained in the case of a power semiconductor power chip such as a power MOS-FET or a thyristor. That is, the present invention can be applied to general multi-chip type semiconductor devices including these semiconductor power chips and their control IC chips.

The number of mounted semiconductor power chips and control IC chips and the number of pins are not limited, and the outer shape of the main body is not limited as long as it satisfies the above-mentioned contents.

[0041]

According to the first aspect of the present invention, a part of the external lead on which the semiconductor power chip is mounted is exposed from the package, and the heat generated in the semiconductor power chip is transferred via the external lead. Since the heat is radiated to the outside, the structure of the semiconductor device, particularly, the heat radiating structure can be simplified. Further, since a bump is formed on one surface of the control semiconductor chip and the bump is directly connected to an external lead, the control semiconductor chip and the external lead are electrically connected. A wire bonding step for connecting a semiconductor chip to the external leads is not required, and as a result, a multi-chip semiconductor device can be manufactured with fewer manufacturing steps.

According to the second aspect of the present invention, while connecting the external leads to the conductive pattern formed on the insulating substrate, a bump is formed on one surface of the control semiconductor chip, and the bump is connected to the conductive pattern. , The wire bonding step is not required, and the same effect as in the first embodiment can be obtained.

According to the third aspect of the present invention, bumps are respectively formed on one surface of the semiconductor power chip and one surface of the control semiconductor chip, and these bumps are connected to external leads. No process is required.
In addition, a heat radiating member, a part of which is exposed from the package, is connected to the other surface of the semiconductor power chip so that heat generated in the semiconductor power chip is radiated to the outside. Therefore, an effect similar to that of the first aspect is obtained.

According to the fourth aspect of the present invention, since the bump is directly connected to the wiring formed on the tape base and the external lead is directly connected to the wiring, a wire bonding step is not required. Thus, the same effect as in the first embodiment can be obtained.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a first embodiment of a multi-chip type semiconductor device according to the present invention.

FIG. 2 is a plan view showing a procedure for manufacturing the multi-chip semiconductor device of FIG.

FIG. 3 is a sectional view showing a second embodiment of the multichip semiconductor device according to the present invention;

FIG. 4 is a plan view showing a procedure for manufacturing the multi-chip semiconductor device of FIG.

FIG. 5 is a sectional view showing a third embodiment of the multichip semiconductor device according to the present invention;

FIG. 6 is a perspective view showing a power unit of a multi-chip semiconductor device according to a third embodiment.

FIG. 7 is a plan view showing the procedure for manufacturing the multi-chip semiconductor device of FIG.

FIG. 8 is a sectional view showing a fourth embodiment of the multichip semiconductor device according to the present invention.

FIG. 9 is a plan view showing the procedure for manufacturing the multi-chip semiconductor device of FIG.

FIG. 10 is a sectional view showing an improved example of the third embodiment of the multichip semiconductor device according to the present invention.

FIG. 11 is a sectional view showing a conventional multi-chip type semiconductor device.

[Explanation of symbols]

21, 38, 43, 59 External leads 22a, 35a, 41a, 51a Power transistor chips 22b, 35b, 41b, 51b Control IC chips 23, 37, 42, 46b, 46c, 46e, 52, 5
7e Bump 24, 36 Aluminum wire 31 Secondary heat sink 32 Ceramic substrate 33a to 33d Conductive pattern 34 Primary heat sink 44 Heat sink 53 Tape base 54 Wiring

Claims (4)

(57) [Claims] A plurality of external leads, a semiconductor power chip, and a control semiconductor chip for controlling the semiconductor power chip are contained in the same package; and the semiconductor power chip and the control semiconductor chip are connected to the external power supply. In a multichip semiconductor device electrically connected to a lead, the semiconductor power chip is mounted on one of the plurality of external leads, and a part of the external lead on which the semiconductor power chip is mounted. Is exposed from the package, and a bump is formed on one surface of the control semiconductor chip,
A multi-chip semiconductor device, wherein the bump is directly connected to the external lead. 2. A plurality of external leads, a semiconductor power chip, and a control semiconductor chip for controlling the semiconductor power chip are built in the same package, and the semiconductor power chip and the control semiconductor chip are connected to the external power supply. A multi-chip semiconductor device electrically connected to a lead, a part of which is provided on the secondary heat sink and a secondary heat sink exposed from the package, and a predetermined conductive pattern is formed on an upper surface thereof; Further comprising a primary heat sink provided on a power chip mounting area of the conductive pattern, wherein the external leads are connected to the conductive pattern, and the semiconductor power chip is mounted on the primary heat sink. Being connected to the conductive pattern by a wire, the wire and the conductive pattern are interposed. The one which is external lead electrically connected to the bump is formed on one surface of the control semiconductor chip Te,
A multi-chip type semiconductor device, wherein the bump is connected to the external lead to be electrically connected to the external lead via the bump and the conductive pattern. 3. A plurality of external leads, a semiconductor power chip, and a control semiconductor chip for controlling the semiconductor power chip are built in the same package, and the semiconductor power chip and the control semiconductor chip are connected to the external power supply. In a multichip semiconductor device electrically connected to leads, bumps are respectively formed on one surface of the semiconductor power chip and one surface of the control semiconductor chip, and the bumps are connected to the external leads. A multi-chip type semiconductor device, further comprising a heat radiating member connected to the other surface of the semiconductor power chip and partially exposed from the package. 4. The bump is connected directly to a wiring formed on a tape base, and the external lead is directly connected to the wiring, whereby the bump and the external lead are electrically connected. The multi-chip type semiconductor device according to claim 3.