JP2707899B2 - Hybrid integrated circuit device - Google Patents
Hybrid integrated circuit deviceInfo
- Publication number
- JP2707899B2 JP2707899B2 JP111992A JP111992A JP2707899B2 JP 2707899 B2 JP2707899 B2 JP 2707899B2 JP 111992 A JP111992 A JP 111992A JP 111992 A JP111992 A JP 111992A JP 2707899 B2 JP2707899 B2 JP 2707899B2
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- case
- hybrid integrated
- circuit board
- circuit device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Casings For Electric Apparatus (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は、混成集積回路装置に関
し、特にケースを具備する表面実装型混成集積回路装置
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit device, and more particularly to a surface mount type hybrid integrated circuit device having a case.
【0002】[0002]
【従来の技術】従来のケースを具備する混成集積回路装
置は、一般に、直方体の箱型プラスチックケース内に組
立済の混成集積回路基板(以下、回路基板と記す)を挿
入し、封止用樹脂を充填して熱硬化させた後、リードを
整形することにより表面実装型混成集積回路装置を構成
するか、あるいは組立済の回路基板に単にキャップとし
てのケースを機械的に嵌合せしめる構造を有している。
後者の場合は、封止樹脂を用いず比較的軽量な混成集積
回路装置が実現可能であるが、耐湿性等の信頼性に於い
てやや劣るため、樹脂の誘電率の影響を嫌う高周波帯域
で使用される混成集積回路装置にのみ使用されている。2. Description of the Related Art In general, a hybrid integrated circuit device having a conventional case is prepared by inserting an assembled hybrid integrated circuit board (hereinafter, referred to as a circuit board) into a rectangular box-shaped plastic case and sealing resin. After filling and thermal curing, the leads are shaped to form a surface-mounted hybrid integrated circuit device, or a structure is provided in which a case as a cap is simply mechanically fitted to an assembled circuit board. doing.
In the latter case, a relatively light-weight hybrid integrated circuit device can be realized without using a sealing resin.However, since the reliability such as moisture resistance is slightly inferior, in a high-frequency band where the influence of the dielectric constant of the resin is disliked. It is used only in the hybrid integrated circuit device used.
【0003】[0003]
【発明が解決しようとする課題】この従来の混成集積回
路装置では、第1にケースの内径と回路基板の外形のマ
ージンにより、ケース外形と回路基板より引き出される
外部端子との位置公差が大きくなり、自動実装の際の位
置決めに問題を生じていた。また第2にケース内に封入
する樹脂の為、混成集積回路装置全体としての重量が増
す結果となっていた。また、第3にケース封止後、外部
端子を整形し表面実装構造とする為、厚さ寸法が通常の
DIP(Dual In−line Package)
に比較して大きくなるという問題点があった。In this conventional hybrid integrated circuit device, first, due to the inner diameter of the case and the margin of the outer shape of the circuit board, the positional tolerance between the outer shape of the case and the external terminals drawn out from the circuit board becomes large. However, there has been a problem in positioning during automatic mounting. Second, due to the resin sealed in the case, the weight of the hybrid integrated circuit device as a whole has increased. Third, after the case is sealed, the external terminals are shaped to have a surface mounting structure, so that the thickness dimension is a normal DIP (Dual In-Line Package).
There was a problem that it became large compared with.
【0004】[0004]
【課題を解決するための手段】本発明の混成集積回路装
置は、少くとも対向する1対の内側壁が外方に傾斜した
絶縁性ケースと、周端部に取付けたクリップ端子を前記
ケースの傾斜した内側壁に接触させて位置決めし前記ケ
ース内に装着した混成集積回路基板と、前記混成集積回
路基板の下面に塗布して前記ケースと混成集積回路基板
を固着した封止樹脂とを含んで構成される。SUMMARY OF THE INVENTION A hybrid integrated circuit device according to the present invention comprises an insulating case having at least a pair of opposing inner walls inclined outwardly, and a clip terminal attached to a peripheral end of the case. A hybrid integrated circuit board positioned in contact with the inclined inner side wall and mounted in the case; and a sealing resin applied to the lower surface of the hybrid integrated circuit board and fixing the case and the hybrid integrated circuit board. Be composed.
【0005】[0005]
【実施例】次に、本発明の実施例について図面を参照し
て説明する。Next, embodiments of the present invention will be described with reference to the drawings.
【0006】図1(a),(b)は本発明の第1の実施
例を示す模式的断面図及び一部切欠側面図である。FIGS. 1A and 1B are a schematic sectional view and a partially cutaway side view showing a first embodiment of the present invention.
【0007】図1(a),(b)に示すように、上面に
ICチップを搭載してICチップを含む表面にチップコ
ート2を設けた1.0mm厚の回路基板1の下面にチッ
プ部品3を実装し、回路基板1の対向する両周端にクリ
ップ端子4を1.27mmピッチで66ピン取り付け、
かつ、クリップ端子4のリードを外側に斜めに引き出し
先端を実装面に対して水平となる様にリード整形した
後、高耐熱性プラスチックケース5に嵌め込む。ここ
で、横向方向に於いてはクリップ端子4のリードの傾斜
部分により位置決めされ長方方向に於いてはプラスチッ
プケース5の対向する1対の傾斜した内側壁6と回路基
板1の端部により位置決めされる。次にシリコン系封止
樹脂7を回路基板1の下面に塗布すると共にケース5と
回路基板1の嵌合部にも塗布して固着することにより、
フラットパッケージ型の表面実装型混成集積回路装置を
構成する。ここで、回路基板1の上面側には封止樹脂が
回り込まず中空状態となる。As shown in FIGS. 1 (a) and 1 (b), an IC chip is mounted on the upper surface, and a chip component is formed on the lower surface of a 1.0 mm thick circuit board 1 provided with a chip coat 2 on the surface including the IC chip. 3 are mounted, and 66 pins are attached to the opposite peripheral ends of the circuit board 1 at a pitch of 1.27 mm.
The lead of the clip terminal 4 is drawn obliquely outward, the lead is shaped so that the tip is horizontal to the mounting surface, and then fitted into the high heat resistant plastic case 5. Here, in the lateral direction, it is positioned by the inclined portion of the lead of the clip terminal 4, and in the longitudinal direction, it is defined by the pair of opposed inner walls 6 of the plus chip case 5 and the end of the circuit board 1. Positioned. Next, the silicon-based sealing resin 7 is applied to the lower surface of the circuit board 1 and also applied to and fixed to the fitting portion between the case 5 and the circuit board 1.
A flat package type surface mount hybrid integrated circuit device is configured. Here, the sealing resin does not go around on the upper surface side of the circuit board 1 and is in a hollow state.
【0008】図2(a),(b)は本発明の第2の実施
例を示す平面図及び模式的断面図である。FIGS. 2A and 2B are a plan view and a schematic sectional view showing a second embodiment of the present invention.
【0009】図2(a),(b)に示すように、第1の
実施例と同様にチップコート2及びチップ部品3を設け
た正方形の回路基板1の各辺の周端部にクリップ端子4
を1.27mmピッチで取付け、リード整形した後、角
錐台形状の高耐熱ケース5aに挿入し、回路基板1の下
面にシリコン系封止樹脂7を塗布してケース5aと回路
基板1とを接着させることにより、QFP(Quad
Flat Package)型の表面実装型混成集積回
路装置を構成する。この実施例でな、ケース5aの傾斜
した内側壁6がクリップ端子4のリードの傾斜部により
支持され±0.3mm程度の位置精度が得られる。As shown in FIGS. 2 (a) and 2 (b), similar to the first embodiment, a clip terminal is provided at the peripheral end of each side of a square circuit board 1 provided with a chip coat 2 and a chip component 3. 4
Are mounted at a pitch of 1.27 mm, and after lead shaping, inserted into a high heat-resistant case 5a having a truncated pyramid shape, a silicone-based sealing resin 7 is applied to the lower surface of the circuit board 1, and the case 5a and the circuit board 1 are bonded. By doing so, QFP (Quad
(Flat Package) type surface integrated hybrid integrated circuit device. In this embodiment, the inclined inner side wall 6 of the case 5a is supported by the inclined portion of the lead of the clip terminal 4, and a positional accuracy of about ± 0.3 mm is obtained.
【0010】[0010]
【発明の効果】以上説明したように本発明は、ケースの
内側壁の少くとも対向する2辺に傾斜を設けると同時
に、クリップ端子を斜めに引き出す構造を採用すること
によりケース端面に対する端子位置の精度が向上し、ケ
ース外形を基準とする自動実装に対応できるという効果
を有する。また、回路基板の下面に塗布する封止樹脂に
よりケースと回路基板との接着を行い、回路基板の表面
部を中空とすることが出来、混成集積回路装置自体の重
量の軽量化がはがれるという効果を有する。また、端子
によりケースを支持する構造である為、ケースを封止し
た後、リード整形する場合に比較して混成集積回路装置
の厚みを0.5mm程度薄く出来る。As described above, the present invention employs a structure in which at least two opposite sides of the inner wall of the case are inclined and the clip terminal is pulled out obliquely, whereby the position of the terminal position with respect to the case end surface is improved. This has the effect of improving the accuracy and being able to cope with automatic mounting based on the case outline. In addition, the case and the circuit board are adhered to each other by a sealing resin applied to the lower surface of the circuit board, and the surface of the circuit board can be made hollow, thereby reducing the weight of the hybrid integrated circuit device itself. Having. Further, since the case is supported by the terminal, the thickness of the hybrid integrated circuit device can be reduced by about 0.5 mm as compared with a case where the case is sealed and leads are shaped.
【図1】本発明の第1の実施例を示す模式的断面図及び
一部切欠側面図。FIG. 1 is a schematic cross-sectional view and a partially cutaway side view showing a first embodiment of the present invention.
【図2】本発明の第2の実施例を示す平面図及び模式的
断面図。FIG. 2 is a plan view and a schematic cross-sectional view showing a second embodiment of the present invention.
1 回路基板 2 チップコート 3 チップ部品 4 クリップ端子 5,5a 高耐熱プラスチックケース 6 傾斜した内側壁 7 シリコン系封止樹脂 DESCRIPTION OF SYMBOLS 1 Circuit board 2 Chip coat 3 Chip component 4 Clip terminal 5, 5a High heat-resistant plastic case 6 Inclined inner wall 7 Silicon-based sealing resin
Claims (2)
傾斜した絶縁性ケースと、周端部に取付けたクリップ端
子を前記ケースの傾斜した内側壁に接触させて位置決め
し前記ケース内に装着した混成集積回路基板と、前記混
成集積回路基板の下面に塗布して前記ケースと混成集積
回路基板を固着した封止樹脂とを含むことを特徴とする
混成集積回路装置。An insulative case having at least a pair of opposing inner walls inclined outwardly, and a clip terminal attached to a peripheral end thereof is positioned by contacting the inclined inner wall of the case. A hybrid integrated circuit device, comprising: a hybrid integrated circuit board mounted on the substrate; and a sealing resin applied to a lower surface of the hybrid integrated circuit board and fixing the case and the hybrid integrated circuit board.
ースである請求項1記載の混成集積回路。2. The hybrid integrated circuit according to claim 1, wherein the insulating case is a high heat resistant plastic case.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP111992A JP2707899B2 (en) | 1992-01-08 | 1992-01-08 | Hybrid integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP111992A JP2707899B2 (en) | 1992-01-08 | 1992-01-08 | Hybrid integrated circuit device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH05243479A JPH05243479A (en) | 1993-09-21 |
JP2707899B2 true JP2707899B2 (en) | 1998-02-04 |
Family
ID=11492575
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP111992A Expired - Lifetime JP2707899B2 (en) | 1992-01-08 | 1992-01-08 | Hybrid integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2707899B2 (en) |
-
1992
- 1992-01-08 JP JP111992A patent/JP2707899B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH05243479A (en) | 1993-09-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 19970916 |