JP2668999B2 - Package for semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD The present invention is used for a package for a semiconductor device, and particularly relates to a structure of a package for a high-frequency semiconductor device.

〔Overview〕

The present invention relates to a semiconductor device package having a ceramic substrate having a required metallized pattern formed on an upper surface thereof. By providing a void inside the ceramic substrate, the effective relative permittivity of the ceramic substrate is lowered, and the metallized pattern is separated. The capacitance is reduced to improve the signal leakage characteristics.

[Conventional technology]

FIGS. 7A and 7B show a conventional high-frequency semiconductor device package. FIG. 3A is a plan view and FIG. 3B is a sectional view taken along line GG ′.

On the upper surface of the ceramic substrate 1 shown in FIG. 7A, a metallized pattern 3 and a metallized pattern 4 for external lead connection are printed with a tungsten paste. Next, in order to insulate and protect these metallized patterns 3 and 4 and to form a cap mounting portion, ceramic frame substrates 5 are laminated, and the entire upper surface of the ceramic frame substrates 5 is printed with a tungsten paste. Then, the entire lower surface of the ceramic substrate 1 is printed with a tungsten paste.

When firing in an oxidizing atmosphere at 1500 to 1600 ° C in such a state, the tungsten paste reacts with the ceramic to be metallized. Then, Ni plating is applied to the metallized pattern. Next, on the ceramic substrate 1,
The heat radiating plate 6, the die attach metal plate 7, and the external connection lead 8 are brazed with an Ag-Cu brazing material. Then, the metallized pattern, the heat dissipation plate 6, the die attach metal plate 7
If the external connection leads 8 are plated with Ni and Au, a package for a high-frequency semiconductor device is completed.

[Problems to be solved by the invention]

In the conventional semiconductor device package described above, in the high frequency region of over 1 GHz, due to the influence of the capacitance between the metallized patterns on the ceramic substrate, high frequency signal leakage occurs and the leakage characteristics deteriorate, There is a defect that the characteristics of the semiconductor device are deteriorated, such as a decrease in the gain of the high frequency signal and noise of the high frequency signal of other metallized patterns.

The object of the present invention is to eliminate the disadvantages mentioned above,
It is an object of the present invention to provide a semiconductor device package with improved signal leakage characteristics.

[Means for solving the problem]

The present invention is characterized in that, in a semiconductor device package having a ceramic substrate having a required metallized pattern formed on an upper surface thereof, a void is provided inside the ceramic substrate.

[Action]

 The ceramic substrate has voids inside.

Therefore, since the relative permittivity of the ceramic substrate is 1 in the void portion, the effective relative permittivity is small. As a result, the capacitance between the metallized patterns is reduced, and the signal leakage characteristics can be improved.

The shape of the gap provided inside the ceramic substrate is determined in consideration of the strength required for the ceramic substrate, and may be one large gap or a collection of a large number of small gaps provided at different positions. It may be.

〔Example〕

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 (a) is a plan view of the first embodiment of the present invention. FIG. 1B is a sectional view taken along the line AA ′. 2 (a) is a plan view of the ceramic substrate a of FIG. 1 (b), FIG. 2 (b) is a sectional view taken along the line BB ', and FIG. 3 (a) is a view of FIG. 1 (b). A plan view of the ceramic substrate b and FIG.
It is C 'sectional drawing.

According to FIGS. 1 (a) and 1 (b), the first embodiment has a ceramic substrate 1a having a metallized pattern 3 and a metallized pattern 4 for external lead connection formed on the upper surface.
In the semiconductor device package having the above, the ceramic substrate 1a is provided with a plurality of through holes 2 as voids. Where the ceramic substrate
As shown in FIG. 1 (b), 1a has a 6-layer structure, and 4 layers (ceramic substrate a2
Fig.3 (a) and (b)
Also, a through hole 2 as shown in FIGS. 4 (a) and 4 (b) is provided.

On the upper surface of the ceramic substrate 1a having such a structure,
The metallization pattern 3 and the external lead connection metallization pattern 4 are printed with a tungsten paste.
Next, in order to insulate and protect these metallized patterns 3 and 4 and to form a cap mounting portion, a ceramic frame substrate 5 is laminated, and the entire upper surface of the ceramic frame substrate 5 is printed with a tungsten paste. Then, the entire lower surface of the ceramic substrate 1a is printed with a tungsten paste.

When firing in an oxidizing atmosphere at 1500 to 1600 ° C. in such a state, the tungsten paste reacts with the ceramic to be metallized. Then, this metallized pattern is plated with Ni. Next, the heat dissipation plate 6, the die attach metal plate 7, and the external connection lead 8 are brazed to the ceramic substrate 1a with Ag-Cu brazing material. Then, the metallized patterns 3 and 4, the heat sink 6, the die attach metal plate 7 and the external connection leads 8 are plated with Ni and
When the Au plating is applied, the package for the high frequency semiconductor device of the first embodiment is completed.

In the first embodiment, the relative dielectric constant of the ceramic used is
In case of 10, the effective relative permittivity is about 7.9, about 20%
Has a low dielectric constant.

FIG. 4 (a) is a plan view showing a second embodiment of the present invention, and FIG. 4 (b) is a sectional view taken along the line DD '. 5 (a) is a plan view of the ceramic substrate c shown in FIG. 4 (b), FIG. 5 (b) is a sectional view taken along the line EE ', and FIG. 6 (a).
Is a plan view of the ceramic substrate d shown in FIG. 4 (b), and FIG. 6 (b) is a cross-sectional view taken along the line FF '.

The ceramic substrate 1b shown in FIG. 4 (a) has a six-layer structure as shown in FIG. 4 (b), and has four layers except for the uppermost layer and the lowermost layer (two ceramic substrates c and two ceramic substrates d). ) To FIGS. 6 (a) and (b) and FIG.
The slit 9 shown in FIGS. 9A and 9B is provided. That is, in this second embodiment, a large number of voids are provided by the through holes 2 and the slits 9.

By using the ceramic substrate 1b having such a structure and performing the same processing as that of the above-described first embodiment, the high-frequency semiconductor device package of the second embodiment is completed.

In the second embodiment, the relative permittivity of the ceramic used is
In the case of 10, the effective relative permittivity is about 6.5, which is about 35
% Reduction in dielectric constant is achieved.

In the second embodiment, although there is a difficulty in processing ceramics as compared with the first embodiment, there is an advantage that a lower dielectric constant can be obtained.

A feature of the present invention is that, in FIGS. 1 (a) and 1 (b), a large number of voids composed of through holes 2 are provided in the ceramic substrate 1a, and in FIGS. 4 (a) and 4 (b), the ceramic substrate is formed. This is because a large number of voids composed of through holes and slits were provided in 1b.

The strength of the substrate can be increased by displacing a large number of voids for each layer of the ceramic substrate.

〔The invention's effect〕

As described above, according to the present invention, in a semiconductor device package, by providing a void inside the ceramic substrate, the effective relative permittivity of the ceramic substrate is reduced, and the capacitance between the metallized patterns is reduced. This has the effect of improving the leakage characteristics of high-frequency signals between patterns and improving the high-frequency characteristics of the semiconductor device package.

Specifically, the leakage characteristic between metallized patterns is 1GHz.
In a semiconductor device package of −20 dB and a dielectric constant reduction of 20% as the structure of the present invention, 1.2 GHz
There is an effect that a leakage characteristic of -20 dB can be obtained.

[Brief description of the drawings]

FIG. 1 (a) is a plan view of the first embodiment of the present invention. FIG. 1B is a sectional view taken along the line AA ′. FIG. 2 (a) is a plan view of the ceramic substrate a of FIG. 1 (b). FIG. 2B is a sectional view taken along the line BB '. FIG. 3 (a) is a plan view of the ceramic substrate b of FIG. 1 (b). FIG. 3B is a cross-sectional view taken along the line CC ′. FIG. 4 (a) is a plan view of a second embodiment of the present invention. FIG. 4 (b) is a sectional view taken along the line DD '. FIG. 5 (a) is a plan view of the ceramic substrate c of FIG. 4 (b). FIG. 5 (b) is a sectional view taken along the line EE '. FIG. 6 (a) is a plan view of the ceramic substrate d of FIG. 4 (b). FIG. 6 (b) is a sectional view taken along the line FF '. FIG. 7A is a plan view of a conventional example. FIG. 7B is a sectional view taken along the line GG ′. 1, 1a, 1b ... Ceramic substrate, 2 ... Through hole,
3 ... Metallization pattern, 4 ... External lead connection metallization pattern, 5 ... Ceramic frame substrate, 6 ... Heat sink, 7 ... Die attach metal plate, 8 ... External connection lead, 9 ... Slit.

Claims (1)

(57) [Claims] 1. A semiconductor device package having a ceramic substrate having a required metallized pattern formed on an upper surface thereof, wherein a void is provided inside the ceramic substrate.