JPS6370442A - Multilayer interconnection substrate - Google Patents

Abstract

PURPOSE:To obtain a highly reliable multilayer interconnection substrate capable of releasing gas in its insulating layers and free from the breakdown of signal layers which affects the semiconductor device functions by utilizing a specially designed meshed metal layer. CONSTITUTION:A metal layer 3 and a signal layer 4 as a ground layer or a power source layer are laminated on an insulating substrate 1 through an insulating layer 2 by a thin film growing technology in a multilayer interconnection substrate. The metal layer is formed in a mesh state so that the void ratio of the layer is 5-80%. Hole parts 3a are provided in the metal layer 3, and the mesh state is obtained. When the insulating layer 2 is heat-treated, and hardened, gas is released through the hole parts 3a in the metal layer 3 even if the gas is yielded in the insulating layer 2. Thus a gas well is not formed beneath the metal layer 3 and an upheaved part is not yielded on the insulating layer 2 at all. The breakdown of the signal layer 4 caused by the stress of the upheaved part is not yielded at all.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement of a multilayer wiring board, and more particularly to an improvement of a multilayer wiring board for mounting semiconductor integrated circuit elements.

[Background of the invention]

Conventionally, multilayer wiring boards for mounting semiconductor integrated circuit elements have wiring patterns formed by screen printing a conductive paste such as silver-palladium, tungsten, or molybdenum.
The main technology was to form a thick film by firing, but
The minimum conductor width of about 100 .mu.m has made it unsuitable for the trend toward higher densities in integrated circuits. Therefore, by applying thin film formation techniques such as vacuum evaporation and sputtering and etching techniques to the formation of fine wiring patterns on substrates, conductor widths of approximately 25 μm can be achieved.
It has become possible to obtain a multilayer wiring board with a high density and fine wiring pattern.

In addition, as the speed of semiconductor integrated circuit devices increases, the insulating layer of the wiring pattern is required to have a low dielectric constant.

In other words, the propagation delay (Tpd) of the signal traveling through the line is Tpd
=(1)Co)ノTT L co=Speed of light εr: Relative permittivity of dielectric L: Expressed by the length of the line, so in order to reduce Tpd and increase the signal propagation speed, the permittivity is It is necessary to use a substance with a low dielectric constant as an insulator. For example, organic polymers such as polyimide and butadiene rubber exhibit a low dielectric constant of 2.5 to 3.5 and are excellent in this respect.

Therefore, multilayer wiring boards that use these organic polymers as insulating layers and form fine wiring patterns using thin film formation techniques such as vacuum evaporation and sputtering, and etching techniques are suitable for puff cages for housing semiconductor elements in high-speed devices. It has come to be used in

[Conventional technology]

FIG. 3 is a partially cutaway perspective view showing the main structure when a conventional multilayer wiring board is applied to a package for storing semiconductor elements for high-speed devices, and FIG. FIG.

In the figure, reference numeral 11 denotes a substrate made of an electrically insulating material such as alumina ceramics, and a metal layer 13 and a signal layer 14, which are used as a ground layer or a power supply layer, are laminated on the upper surface of the substrate with an insulator 112 in between.

The metal layer 13 and the signal layer 14 are provided with an insulating layer 12 having a predetermined dielectric constant between their eyebrows, thereby making the signal input/output wiring a distributed constant circuit to prevent signal reflection and attenuation due to impedance mismatch. , the generation of waveform distortion, etc. in the signal is minimized.

The insulating layer 12 is made of an organic polymer having a dielectric constant of 2.5 to 3.5, such as polyimide or butadiene rubber, and is deposited on the insulating substrate 11 by a spinner method, a spray method, a printing method, or the like.

The metal layer 13 is made of a metal such as copper (Cu), gold (Au), or aluminum (AI), and is formed on the upper surface of the insulating layer 12 on the insulating substrate 11 by using a thin film forming technique such as vacuum evaporation or sputtering. Similarly to the metal N13, the signal layer 14 is formed into a fine wiring pattern of a predetermined shape with the insulating layer 12 interposed above the metal layer 13 by thin film formation technology and etching technology.

[Problem that the invention seeks to solve]

However, in this conventional package for housing semiconductor elements, the metal layer used as the ground layer or power layer is deposited over almost the entire surface of the insulating layer provided on the top surface of the insulating substrate. When heat treatment is performed to harden the insulating layer, the volatilization of the gas generated from the insulating layer is blocked by the metal layer, and a gas pool is formed under the metal layer, causing blisters in the insulating layer. ,the result,
The problem is that the signal layer formed in the fine wiring pattern breaks due to the stress caused by the blisters, and loses its function as a package for housing semiconductor elements.

[Purpose of the invention]

The present invention was devised in view of the above-mentioned drawbacks, and its purpose is to improve the volatilization of gas generated from the insulating layer, and to eliminate disconnections in the signal layer that would impede the functionality of semiconductor element housing packages, etc. The purpose of the present invention is to provide a highly reliable multilayer wiring board.

[Means for solving problems]

The present invention provides a multilayer wiring board in which a metal layer serving as a ground layer or a power supply layer and a signal layer are laminated with an insulating layer interposed therebetween by thin film production technology on an insulating substrate. It is characterized by having a mesh shape.

〔Example〕

Next, the present invention will be explained in detail based on the embodiment shown in FIGS. 1 and 2.

FIG. 1 is a partially cutaway perspective view showing the main structure when the multilayer wiring board of the present invention is applied to a package for storing semiconductor elements for high-speed devices, and FIG. Y
It is a 4% cross-sectional view.

In the figure, 1 is a substrate made of an electrically insulating material such as alumina ceramics, and on its upper surface there is a metal N3 used as a ground layer or power source, and a signal layer 4 on which an insulating layer 2 is formed.
are laminated through.

The insulating substrate 1 is made of alumina (AlzOa), silica (
It is formed by adding and mixing a suitable solvent to ceramic raw material powder such as SiO□) to form a slurry, forming the slurry into a sheet by the conventionally well-known doctor blade method, and firing it at a high temperature.

Further, a metal layer 3 is formed on the upper surface of the insulating substrate 1 via an insulating layer 2, and the metal layer 3 acts as a ground layer or a power supply layer, and forms a signal hub with a signal layer 4, which will be described later. Input/output wiring is configured as a distributed constant circuit to prevent signal reflection, attenuation, etc. due to impedance mismatch, and to minimize waveform distortion, etc. in the signal.

The metal layer 3 is made of a metal such as gold (Au), copper (Cu), or aluminum (AI), and is formed by a thin film forming technique such as vacuum evaporation or sputtering.

A signal layer 4 is formed on the upper surface of the metal layer 3 via an insulating layer 2, and the signal layer 4 serves to connect each electrode of a semiconductor element (not shown) housed inside to an external circuit. to do.

A large number of the signal layers 4 are provided radially from the center of the upper surface of the insulating substrate 1 to the outer periphery, and each electrode of the semiconductor element is connected to a bonding wire in a portion of each signal layer 4 located at the center of the upper surface of the insulating substrate 1. An external lead terminal (not shown) is connected to a portion located on the outer periphery of the insulating substrate 1. As a result, when the external lead terminals are connected to the external circuit, each electric current of the semiconductor element housed inside is connected to the external circuit via the bonding wire and the signal layer 4.

The signal layer 4 is made of gold (Au), li'l (Cu)
, made of metal such as aluminum (A1), vacuum evaporated,
It is formed on top of the metal layer 3 with the insulating layer 2 interposed therebetween by a thin film forming technique such as sputtering and an etching technique.

Unprecedented again! ! The insulating layer 2 disposed on the upper surface of the substrate 1 to insulate the metal layer 3 and the signal layer 4 is made of a material with a low dielectric constant, such as polyimide or butadiene rubber, with a dielectric constant of 2 to increase the propagation speed. The insulating substrate 1 is made of an organic polymer of .
It is deposited on top and cured by heating to about 350°C.

In this manner, a semiconductor element is mounted on the center of the upper surface of the insulating substrate 1, and each electrode of the semiconductor element is connected to each of the signal layers 4 via bonding wires, and then the semiconductor element is housed inside the upper surface of the insulating substrate 1. By attaching a bowl-shaped lid and bonding external lead terminals to each signal layer 4, a semiconductor device 5 for a high-speed device is completed.

In the multilayer wiring board of the present invention, it is important that the metal layer used as the ground layer or the power supply layer has a mesh shape with a porosity of 5 to 80χ.

For this reason, as shown in FIGS. 1 and 2, the metal layer 3 is provided with a large number of holes 3a, one in mesh shape and one without. If the metal layer 3 is provided with the holes 3a in this manner and is made into a mesh shape, even if gas is generated from the insulation layer 2 when the insulation layer 2 is heat-treated and hardened, the gas will be absorbed into the holes 3 of the metal layer 3.
It volatilizes through the metal N3, forms a gas pocket in the F part of the metal N3, and does not cause a crack in the insulating layer 2, and the stress of the blister causes a disconnection in the signal layer 4. There will be nothing to do.

Note that if the mesh-like metal layer 3 has a porosity of less than 5χ, it will not be able to volatilize the gas generated by the insulating layer 2 well, and the insulating layer 2 will develop blisters due to gas accumulation. . Moreover, if it exceeds 8 oz, it becomes difficult to form the signal output/input wiring into a distributed constant circuit, which is not preferable because signal reflection and attenuation due to impedance mismatch causes signal waveform distortion. Therefore, the porosity of the metal layer 3 is specified to be in the range of 5 to 80X.

〔Effect of the invention〕

In the multilayer wiring board of the present invention in which a metal layer as a ground layer or a power supply layer and a signal layer are laminated via an insulating layer on an insulating substrate using thin film production technology, the metal layer is formed by laminating the metal layer with a porosity of 5 to 8 oz. Since the mesh-shaped metal layer is formed, the gas generated when the insulating layer is heated and hardened is well volatilized through the holes in the mesh-shaped metal layer, and does not accumulate at the bottom of the metal layer and cause blisters. The signal layer will not be disconnected due to stress. As a result, the multilayer wiring board of the present invention can be of extremely high quality and has no disconnections in the signal layer.

[Brief explanation of the drawing]

Fig. 1 is a partially cutaway perspective view showing the main structure when the multilayer wiring board of the present invention is applied to a package for storing semiconductor elements for high-speed devices, and Fig. 2 is a perspective view taken along the line Y-Y in Fig. 1. 3 is a partially cutaway perspective view showing the main structure when a conventional multilayer wiring board is applied to a package for storing semiconductor elements for high-speed devices, and FIG. 4 is a cross-sectional view taken along It is an X-ray cross-sectional view. 1: Insulating substrate 2: Insulating layer 3: Metal N 4: Signal layer Figure 8! 3 Figure 4

Claims (1)

[Claims] In a multilayer wiring board in which a metal layer as a ground layer or a power supply layer and a signal layer are laminated with an insulating layer interposed therebetween using thin film production technology on an insulating substrate, the metal layer is formed into a mesh shape with a porosity of 5 to 80%. A multilayer wiring board characterized by the following.