JP2618883B2 - Semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION (Industrial Application Field) The present invention relates to a semiconductor device using a resin-encapsulated semiconductor element container (plastic package). The present invention relates to a semiconductor device that achieves high performance and high reliability without being damaged.

(Prior Art) A package for accommodating a semiconductor chip in a semiconductor device generally uses two types of materials, ceramic and plastic. This ceramic is generally better than plastic in reliability, but is considerably more expensive. On the other hand, plastic is inexpensive and suitable for automation, and is most suitable as a package for a semiconductor chip such as a memory, which requires mass production and requires price competitiveness.

In the conventional semiconductor device using the plastic package, as shown in FIG. 5, a single metal plate 1 is processed to form a plurality of leads 2, a bed 3, and suspension pins 4. Mount the semiconductor chip on the top surface,
After wire bonding the pads of the semiconductor chip and the respective leads 2, they are sealed with a package resin 5,
After that, the lead 2 and the bed 3 are placed on a metal plate (frame) 1
And the lead 2 is bent into a desired shape to form a semiconductor device.

One form of the memory package of the semiconductor device is a zigzag in-line package (ZIP) as shown in FIG. This is one in which the outlet of the lead 2 from the package resin 5 is concentrated on one side, and the lead 2 protruding from this side is alternately bent up and down.

(Problems to be Solved by the Invention) However, in the case of the above-described conventional example, since the metal layer is one layer, for example, the lead and the bed cannot be polymerized, so that the layout of the lead is limited,
When trying to get a bed with the desired area and shape,
There was an inconvenience that the size of the package became large due to the layout of the leads.

Conversely, in order to obtain a fixed package size, the bed becomes smaller, and therefore the chip area of the semiconductor element mounted here must also be made smaller. Therefore, it is necessary to design using extremely fine dimensions. There was an inconvenience that it did not work.

In particular, in the case of the above-mentioned ZIP, since the lead outlet is concentrated on one side, this routing is intense, there is an inconvenience that the lead capacitance and inductance are increased, and the bed size is reduced, and the lead is longer. In such a case, there is a risk that the lead is cut due to the stress generated at the time of resin sealing, and furthermore, processing of such an elongated lead is relatively difficult, and the manufacturing process is extremely complicated. There are also inconveniences.

In view of the above, the present invention can achieve both a large bed size and a small package size,
It is an object of the present invention to provide a semiconductor device having high reliability in noise resistance and moisture resistance, for example, which can avoid complexity in a manufacturing process such as cutting of a lead due to stress generated during resin sealing. It was made for the purpose.

(Means for Solving the Problems) In order to achieve the above object, according to the first aspect of the present invention, a semiconductor chip having a plurality of pads on at least one side and another opposite side is mounted on a bed. In the semiconductor device, which is resin-sealed with a package resin and a plurality of leads protrude from one side of the package resin, the bed and the plurality of leads are formed with a bed and a first-type lead at a bending line. And the upper
A metal plate divided into a lower layer portion on which a second type lead is formed, and an insulating layer interposed between the bed and the second type lead after the semiconductor chip is mounted on the bed. While the upper layer portion and the lower layer portion are bent along the bending line, the first type leads and the second type leads are alternately arranged in the arrangement direction of the leads, thereby forming the first type leads. Extends to one side of the bed, while the second type of lead extends under the insulating layer to the other side of the bed, and then the first type of lead extends to a pad on one side of the semiconductor chip. The second type of lead is wire-connected to a pad on the other side of the semiconductor chip.

(Operation) In the above invention, in addition to the first type of lead, the semiconductor chip of the bed is stacked on the opposite side of the semiconductor chip via an insulating layer, extended to the other side of the bed, and A second type of lead wire-connected to the pad is provided. In this way, the second type of lead is arranged so as to overlap the bed, and is also arranged hierarchically with respect to the first type of lead, so that the second type of lead can be extended to the other side of the bed. A configuration in which a pad wire is connected to the other side of the chip by extension is realized.

Therefore, even when connecting each wire, since this connection work can be performed on both the one side and the other side of the bed,
In extreme cases, the spacing between the leads can be reduced to half that of the prior art. Therefore, even when a bed having a desired area is to be obtained, the size of the package resin is half that of the conventional example, unlike the conventional case. Conversely, even if a fixed package size is to be obtained, a bed twice as large as the conventional example can be secured, and the area of the semiconductor chip can be increased. Therefore,
Greater flexibility can be given to lead and bed layout. Moreover, in the manufacturing process, the spacing between the leads can be increased, so that the leads can be routed easily. Since the leads are formed relatively short, they can be cut by stress during resin sealing. Further, since the lead is easy to process, the manufacturing operation can be simplified.

The first type leads and the second type leads are arranged alternately in the arrangement direction of the leads, while the first type leads extend to one side of the bed, while the second type leads pass under the insulating layer. Extending to the other side of the bed. That is, the first type of lead is relatively short and extends to the vicinity of the bed, and the second type of lead adjacent to the first type of lead is relatively long and extends to the far side of the bed. More specifically, the first type and second type leads are arranged such that short ones and long ones are alternately arranged. Therefore, compared with the case where the leads are sequentially arranged, the interval between the leads is relatively large, and the electromotive force induced from one lead to the other lead is extremely reduced. As a result, the electromagnetic induction is reduced. As a result, adverse effects are minimized.

Furthermore, the first type and second type leads are configured by bending an upper layer portion and a lower layer portion divided from one metal plate, and do not require a complicated bending process. for that reason,
Not only is the manufacturing operation easy, but also when the sealing resin or the like is filled, the resin or the like hardly spreads, and the reliability of the semiconductor device is improved.

(Embodiment) FIG. 1 and FIG. 2 show an embodiment of the present invention,
It is adapted to P.

That is, one metal plate 1 is processed, and is divided at the bending line 6 into an upper layer portion 1a serving as an upper metal film and a lower layer portion 1b serving as a lower metal film. In this upper part 1a,
The first type leads 2a, the base 3, and the suspension pins 4 are laid out and formed. The first type of lead 2a extends to one side of the bed 3 and is connected to the pad 8a on one side of the semiconductor chip 8 by wire. The lower layer portion 1b has a second portion which intersects the overlapping portion 7 with the base 3.
Each kind of lead 2b is laid out and formed. The second type of lead 2b is placed on the opposite side of the semiconductor chip 8 of the bed 3 via an insulating layer, extends to the other side of the bed 3, and is connected to a pad 8b on the other side of the semiconductor chip 8 by a wire. It is configured to be connected. When assembling,
After mounting the semiconductor chip 8 on the upper surface of the base 3, the semiconductor chip 8 is bent along the bending line 6, and the base 3 and the second type lead 2 b are overlapped between the bent two metal films 1 a and 1 b. By attaching an insulating material to one of the surfaces, an insulating layer is interposed to insulate the two metal films 1a and 1b.

After being bent in this manner, the pad 8a of the semiconductor chip 8 and the first type lead 2a are wire-connected by the wire 9, and at the same time, the pad 8b of the semiconductor chip 8 is connected.
And the second type lead 2b are connected by a wire 9 and then sealed with a package resin 5. Thereafter, the first type lead 2a, the second type lead 2b and the bed 3 are separated from the metal plate (frame) 1 by a resin. Is disconnected.

At this time, besides the first type lead 2a, the second type lead 2b
Are stacked on the opposite side of the semiconductor chip of the bed 3 via the insulating layer, extended to the other side of the bed 3, and wire-connected to the pads 8b on the other side of the semiconductor chip 8.
In this manner, the second type of lead 2b is arranged so as to overlap the bed 3 and is also arranged hierarchically with respect to the first type of lead 2a. Pad 8b on the other side of semiconductor chip 8 extending to the other side
Is realized.

For this reason, at the time of each wire connection, since this connection work can be performed on both the one side and the other side of the bed 3, the interval between the leads 2a and 2b is set to a half of the conventional example in an extreme case. be able to. Therefore, even when the bed 3 having a desired area is to be obtained, the size of the package resin is half that of the conventional example, unlike the conventional case. Conversely, even if it is intended to obtain a fixed package size, the bed 3 which is twice as large as the conventional example can be secured, and the area of the semiconductor chip 8 can be increased. Therefore, a greater degree of freedom can be given to the layout of the first and second types of leads 2a, 2b and the bed 3. In addition, since the distance between the first type and second type leads 2a and 2b can be increased in the manufacturing process, the first type and second type leads 2a and 2b can be easily routed, and each lead 2a , 2b are also formed relatively short, so they are not cut by stress during resin encapsulation, and the processing of each lead 2a, 2b is easy, so that the manufacturing work can be simplified. You can do it.

In this case, it is preferable that the thickness of the bent insulating layer between the two layers is large and the dielectric constant is low in order to reduce the parasitic capacitance of the second type lead 2 b overlapping the bed 3.

When the insulating film is bent, a space may be formed between the metal films 1a and 1b, and the space may be filled with a resin for sealing to insulate the space. The mounting may be performed after the metal plate 1 is bent.

FIG. 3 shows another embodiment, which is another embodiment of a so-called DIP (dual in-line package), in which a single metal plate 1 is bounded by a fold line 6 and an upper layer portion serving as an upper metal film is formed. 1a and a lower layer portion 1b serving as a lower metal film, and a bed 3 and a suspension pin 4 are formed in an upper layer portion 1a above the lower layer portion 1b.
A suspension pin 4 is connected to the superposed plate 10, the lead 2 is disposed with the tip thereof being close to the superposed plate 10, and a ground terminal 11 or a power supply terminal is further connected to the suspended pin 4. It is.

By doing so, a semiconductor element that generates a substrate potential on a semiconductor chip, for example, a dynamic RAM
In this case, countermeasures against the noise of the substrate potential are important issues. However, the bed can be provided with a large capacitance with the power supply terminal or the ground terminal, so that the substrate potential can be stabilized.

Further, as shown in FIG.
a and 10b constitute the superposed plate 10 shown in FIG. 4 described above. The suspension pin 4 of one superposed plate 10a is connected to the ground terminal 11, and the other superposed plate 10b
By connecting the hanging pins 4 to the power supply terminal 12 respectively, the bed 3 can be provided with the capacitance of both the ground terminal and the power supply terminal.

Note that this capacitance can be formed between the power supply terminal and the ground terminal as well as the substrate potential to reduce power supply noise.

In such a case, the insulating film between the two layers is preferably as thin as possible within the range of the withstand voltage, and more preferably has a high dielectric constant.

In addition, although the said Example showed what provided all the two metal layers, it was made into three or more layers,
It can be made more effective. Further, for example, the structure shown in FIG. 4 may be added to the structure shown in FIG. 3 so that both effects can be simultaneously obtained.

Further, in the above-described embodiment, a single-layer metal plate is formed into a multilayer (two layers) by including a bending step in the assembling step. However, for example, two or more metal layers are used from the beginning. Alternatively, a bed or a lead may be formed by bonding these.

In this case, it is possible to cope with the conventional assembling process by changing the manufacturing process of the lead tape in which the pattern of the lead and the bed is connected in a tape shape by a number of chips. In the case of a single metal layer, the lead tape manufacturing process can be dealt with as it is in the past, and one type of die is used, which is inexpensive. Need to be added.

(Effects of the Invention) As described above, the second type of lead is arranged to overlap the bed, and the second type of lead is also arranged hierarchically with respect to the first type of lead. Therefore, unlike the conventional case, the size of the package resin is half that of the conventional example. Conversely, even when trying to get a certain package size,
A bed twice the size of the conventional example can be secured,
The area of the semiconductor chip can be increased. Therefore, greater freedom can be given to the layout of the lead and the bed. Moreover, in the manufacturing process, the spacing between the leads can be increased, so that the leads can be routed easily. Since the leads are formed relatively short, they can be cut by stress during resin sealing. Further, since the lead is easy to process, the manufacturing operation can be simplified.

[Brief description of the drawings]

1 and 2 show one embodiment of the present invention, FIG. 1 is a plan view showing a state in which semiconductor chips are bonded, FIG. 2 is a plan view showing a metal plate layout before bending, and FIG. And FIG. 4 is a diagram corresponding to FIG. 2 showing another different embodiment, FIG. 5 is a plan view showing a layout of a conventional metal plate,
FIG. 6 shows a conventional ZIP. FIG. 6A is a plan view, FIG. 6B is a side view, and FIG. 6C is a front view. 1 ... metal plate, 1a ... upper layer part (metal layer), 1b ... lower layer part (metal layer), 2a ... first type lead, 2b ... second type lead, 3 ... bed , 4 ... hanging pins, 5 ... package resin, 8 ... semiconductor chip, 10 ... overlapping board, 11 ...
... Ground terminal, 12 ... Power supply terminal.

Claims (3)

(57) [Claims] 1. A semiconductor device comprising: a semiconductor chip having a plurality of pads on at least one side and another side opposite to the semiconductor chip mounted on a bed and sealed with a resin; and a plurality of leads protruding from one side of the package resin. In the apparatus, the bed and the plurality of reeds are separated by a bending line.
An upper layer portion on which a bed and a first type lead are formed;
A single metal plate divided into a lower layer portion on which a type lead is formed, and after the semiconductor chip is mounted on the bed, an insulating layer is interposed between the bed and the second type lead. The upper layer portion and the lower layer portion are bent along a bending line, whereby the first type leads are alternately arranged in the lead arrangement direction while the first type leads are placed in the bed. While the second type of lead extends under the insulating layer to the other side of the bed, and then the first type of lead is connected to a pad on one side of the semiconductor chip by a wire. A semiconductor device, wherein the second type lead is wire-connected to a pad on the other side of the semiconductor chip while being connected. 2. The semiconductor device according to claim 1, wherein a sealing resin is used for said insulating layer. 3. The semiconductor device according to claim 1, wherein a dielectric different from a sealing resin is used for said insulating layer.