JPS63244657A - Semiconductor device - Google Patents

Abstract

PURPOSE:To make a large-sized bed and a small-sized package compatible with each other by a method wherein metal layers where a lead or a bed is formed are laminated by laying an insulating layer between the metal layers to form a multilayer structure and a semiconductor chip mounted on the bed is plastic-sealed. CONSTITUTION:Metal layers 1a, 1b where leads 2 or a bed 3 have been formed on separate layers and which have been formed by bending individual metal plates 1 are laminated by laying an insulating layer such as a sealing resin 5, a dielectric or the like between two layers to form a multilayer substrate; a semiconductor chip 8 which has been mounted on the bed 3 is plastic-sealed. That is to say, if the two or more metal layers 1a, 1b are used and the metal layers 1a, 1b where, e.g., the leads 2 are formed and the metal layers 1a, 1b where the bed 3 is formed are overlapped by laying the insulating layer between them, a greater degree of freedom is given to a layout of the leads 2 and the bed 3. By this setup, the assembly which has the large-sized bed 3 and where the semiconductor chip 8 corresponding to this size is mounted can be realized in a small-sized package and without being obstructed by the leads 2.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention particularly relates to a semiconductor device using a resin-sealed semiconductor element container (plastic package), which has a high degree of integration. Moreover, the present invention relates to a semiconductor device that achieves high performance and high reliability without easily losing its degree of integration.

(Prior Art) Materials of the 21EJ class are used for packages that house semiconductor chips in semiconductor devices, which are broadly classified into ceramic and plastic. This ceramic is generally superior to plastic in terms of reliability, but is considerably more expensive. On the other hand, plastic is inexpensive and suitable for automation, making it ideal for use as a package for semiconductor chips, such as memory, which are mass-produced and require price competitiveness.

As shown in FIG. 6, a conventional semiconductor device using the above-mentioned plastic package is manufactured by processing a single metal plate 1 to form a plurality of leads 2, a bed 3, and a hanging pin 4. After mounting a semiconductor chip on the top surface and wire-bonding the pads of this semiconductor chip and each of the above-mentioned leads 2, resin sealing is performed with a package resin 5, and then the leads 2 and bed 3 are separated from the metal plate (frame) 1. Furthermore, the leads 2 are bent into a desired shape to construct a semiconductor device.

One type of package for the memory of this semiconductor device is a ZIP (zigzag inline package) as shown in FIG. In this case, the exits of the leads 2 from the package resin 5 are concentrated on one side, and the leads 2 are made to protrude from this side and are alternately bent up and down.

(Problems to be Solved by the Invention) However, in the case of the above-mentioned conventional example, since the metal layer was one layer, it was not possible to polymerize the leads and the bed, for example, and as a result, the layout of the leads was restricted or the desired When trying to obtain a bed with a certain area and shape, there was an inconvenience that the size of the package became large due to the layout of the leads.

On the other hand, if you try to obtain a constant package size,
As the bed becomes smaller, the chip area of the semiconductor element mounted there must also be reduced, which is disadvantageous in that it must be designed using extremely fine dimensions.

In particular, in the case of the above-mentioned ZIP, since the lead exits are concentrated on one side, this leads to severe pulling, which increases the capacitance and inductance of the leads, and also reduces the bed size.

In view of the above, the present invention has been made for the purpose of providing a semiconductor device that is not only capable of achieving both a large bed size and a small package size, but also has high reliability such as noise resistance and moisture resistance. It is.

[Structure of the invention]

(Means for Solving the Problems) In order to achieve the above object, the present invention forms leads or beds in separate layers or bends a single metal plate to form a metal layer with a sealing resin. A semiconductor chip is stacked in multiple layers with an insulating layer of dielectric or other dielectric material interposed therebetween, and a semiconductor chip mounted on this bed is sealed with a resin.

(Function) By using two or more metal layers, for example, by overlapping the metal layer forming the leads and the metal layer forming the bed with an insulating layer interposed, the leads and the bed can be formed. This gives greater freedom in layout.

(Example) FIGS. 1 and 2 show an example of the present invention, and the above ZI
It is adapted to P.

That is, a single metal plate 1 is processed and divided into an upper layer part 1a, which is an upper layer metal film, and a lower layer part 1b, which is a lower layer metal film, with the bending line 6 as a boundary, and this upper layer part 1
The lead 2, base 3 and hanging bottle 4 are attached to the lower part 1.
A board 2 is laid out and formed to intersect with the overlapping part 7 with the base 3, and after mounting the semiconductor chip 8 on the top surface of the base 3 during assembly, the board 2 is laid out along the bending line 6. As well as bending, the bent two-layer metal films 1a, l
An insulating layer is interposed between the two metal films 1a and 1b by attaching an insulating material to one of the overlapping surfaces of the base 3 and the lead 2, thereby insulating the two metal films 1a and 1b.

After bending in this way, wire bonding is performed between the pads 8a of this semiconductor chip 8 and the tips of the leads 2 using a bonding wire 9, and then resin sealing is performed with a package resin 5. After that, a metal plate (frame) is formed. A semiconductor device is constructed by separating leads 2 and bed 3 from 1.

In this case, the thickness of the insulating layer between the two folded layers is thick;
The lower the dielectric constant, the more overlap with bed 3.
This is preferable in terms of reducing the parasitic capacitance of the node 2.

Note that when the above insulating film is bent, the metal film 1a + 1b
A space may be created between the semiconductor chips 8 and 8, and this space may be filled with resin for sealing to insulate the semiconductor chip 8.
The mounting on the bed 3 may be performed after the metal plate 1 is bent.

Figure 3 shows another embodiment, the so-called DIP (dual
An example of application to an in-line package is shown in which a single metal plate 1 is divided into two parts, with the bending line 6 as the boundary, into an upper layer part 1a, which is the metal film of the layer, and a lower layer part 1b, which is the metal film of the lower layer. and the leads 2 that spread out in all directions on the lower layer 1b above it,
A bed 3 and upper and lower hanging bins 4 are provided in the upper layer 1a below.
are formed respectively, and bent along the bending line 6 during assembly, and an insulating layer is interposed between the overlapping parts of the two,
A semiconductor device is configured in the same manner as above.

FIG. 4 shows still another embodiment, in which a single metal plate 1 is divided into two parts, with a bending line 6 as a boundary, into an upper layer part 1a which is an upper layer metal film, and a lower layer part 1b which is a lower layer metal film. , a bed 3 and a hanging bin 4 are formed in the upper layer 1a above it, and
A superimposed board 10 with the bed 3 is formed in the lower layer 1b below, a hanging bottle 4 is connected to this superimposed board 10, and a lead 2 is disposed with its tip close to this superimposed board 10. A grounding terminal 11 or a power terminal is connected to this hanging bottle 4.

By doing this, a semiconductor element that generates a substrate potential on a semiconductor chip, such as a dynamic RAM,
In this case, countermeasures against noise in the substrate potential are an important issue, but the bed can have a large capacitance with the lX1M terminal or the ground terminal, and the substrate potential can be stabilized.

Furthermore, as shown in FIG. 5, a polymeric board 10 separated into two
a and 10b constitute the overlapping board 10 shown in FIG. This allows the bed 3 to have capacitance with both the ground terminal and the power supply terminal.

Note that this capacitance can be formed not only between the substrate potential but also between the power supply terminal, the ground terminal, and the terminal to reduce power supply noise.

In such a case, it is preferable that the insulating film between the two layers be as thin as possible within the range of withstand voltage, and preferably have a high dielectric constant.

Note that, although the above embodiments each include two metal layers, it is also possible to use three or more layers to further enhance the effect. Furthermore, for example, what is shown in FIG. 5 can be added to what is shown in FIG. 3, so that the effects of both can be present at the same time.

Furthermore, in the above example, a single layer metal plate is made into a multilayer (two layers) by including a bending process during the assembly process, but for example, it is possible to use two or more metal layers from the beginning. , these may be bonded together to form a bed or lead.

In this case, it is possible to deal with the conventional assembly process by changing the manufacturing process of the lead tape in which several chips are connected in a tape-like manner to the lead or bed pattern. In addition, in the case of a single metal layer, the manufacturing process for the lead tape can be handled as usual, and only one type of mold is required, making it inexpensive, but a new bending process is added during the assembly process. will need to be added.

〔Effect of the invention〕

Since the present invention has the above-described configuration, it is possible to realize a device having a large bed and mounting a semiconductor chip suitable for the bed in a small package without being obstructed by leads.

Moreover, it is possible not only to improve reliability such as noise resistance and moisture resistance, but also to strengthen the strength of the lead against external forces such as pulling out.

[Brief explanation of the drawing]

1 and 2 show one embodiment of the present invention, FIG. 1 is a plan view showing a state in which semiconductor chips are bonded, FIG. 2 is a plan view showing the layout of a metal plate before bending, and FIG.
5 to 5 are views corresponding to FIG. 2 showing other different embodiments, and FIG. 6 is a plan view showing the layout of a conventional metal plate.
FIG. 7 shows a conventional ZIP, in which (A) is a plan view, (B) is a side view, and (C) is a front view. 1... Metal plate, 1a... Upper layer part (metal layer), 1b
...lower layer part (metal layer), 2...lead, 3...
Bed, 4... Hanging pin, 5... Package resin,
8... Semiconductor chip, 10... Polymer board, 11...
Ground terminal, 12...power terminal. Applicant's agent Sato - Yuimo 1 Figure vine 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 2

Claims (1)

[Claims] 1. A semiconductor device characterized in that metal layers forming leads or beds are laminated in multiple layers with an insulating layer interposed therebetween, and a semiconductor chip mounted on the bed is sealed with a resin. 2. The semiconductor device according to claim 1, wherein a sealing resin is used for the insulating layer. 3. The semiconductor device according to claim 1, wherein a dielectric material different from the sealing resin is used for the insulating layer. 4. A semiconductor device according to any one of claims 1 to 3, characterized in that the leads and the bed are each formed of separate metal layers, and the two are polymerized. 5. The semiconductor device according to any one of claims 1 to 4, characterized in that a single metal plate is bent to form multiple metal layers.