JP2611629B2 - Instantaneous interruption switching method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hitless switching system, and more particularly, to a transmission line frame signal containing an arbitrary virtual container together with a pointer indicating the head of the transmission line, which is duplicated and transmitted. And a non-instantaneous interruption switching system of the transmission system having a configuration for selecting the

[0002]

2. Description of the Related Art A conventional non-interruptible switching system of this type is disclosed in Japanese Unexamined Patent Publication Nos. Hei 3-159339 and Hei 3-38128, in which a transmission line frame signal is duplicated from the transmitting side. In the configuration in which any one of them is transmitted and selected on the receiving side, it is used for the purpose of instantaneously switching at the time of switching.

With reference to FIG. 3, a first conventional example of the instantaneous interruption switching system will be described. The apparatus that realizes the instantaneous interruption switching system shown in the figure includes a working synchronization circuit (SYNC) 11a, a protection synchronization circuit (SYNC) 11b, and a selection circuit (SE).
L) 12, a phase difference detector 13, and a variable delay circuit (DL)
Y) 14.

Next, the operation of the first conventional example will be described. The phase difference detector 13 detects a frame phase difference between the working transmission line frame signal a and the protection transmission line frame signal b,
The variable delay circuit 14 is controlled. The variable delay circuit 14 adds a delay of the phase difference to the spare transmission line frame signal b. The working transmission line frame signal a is directly supplied to the working synchronization circuit 11a, and the protection transmission line frame signal b is
The signal is supplied to the standby synchronization circuit 11b via the variable delay circuit 14. Working and standby synchronization circuits 11a and 11b
Each extract a frame pulse from the transmission line frame signal and output it to the phase difference detector 13. Selection circuit 12
Normally outputs the working transmission line frame signal a as data, but when the transmission quality of the working transmission line frame signal a falls below a certain level, the protection transmission line frame signal b
Is output as data.

Next, with reference to FIG. 4, a second conventional example of the instantaneous interruption switching system will be described. In this conventional example, an active line (or transmission line) for transmitting an information sequence in units of cells, a frame synchronization pattern of cells, and additional information including empty bits.
Is a line switching system including a unit for switching to a spare line (or transmission line). The system that realizes the instantaneous uninterruptible switching method includes a transmitting device 15, a receiving device 16, and a center (CNT) 17. The transmitting device 15 includes a working multiplexing unit (MUX) 18a and a protection multiplexing unit (MUX).
X) 18b and additional information insertion circuit (OH INS) 19
And The receiving-side device 16 includes a working synchronization circuit (SY
NC) 20a and a standby system synchronization circuit (SYNC) 20b.
And the active system additional information detection circuit (OH DET) 21a
And a standby additional information detection circuit (OH DET) 21b
, A comparison unit 22, a control unit (CONT) 23, an active elastic store (ES) 24a, a standby elastic store (ES) 24b, and a selection circuit (SEL).
25.

Next, the operation of the second conventional example will be described. When the switching control from the center 17 occurs, the transmitting side device 15 indicates the end of the line information sequence to the empty bit of the additional information of the cell delimiter in the working line (or the transmission line) by the additional information insertion circuit 19. The switching signal is inserted, multiplexed into information strings by the multiplexing sections 18a and 18b of the working system and the protection system, and both are transmitted.

In the receiving device 16, after synchronization is established in the active and standby synchronization circuits 17a and 17b, additional information is detected by the active and standby additional information detection circuits 21a and 21b, and the empty bits of both systems are compared. The unit 22 constantly monitors. If there is a switching signal in the empty bit, the comparison unit 22 calculates the phase difference between the switching signals of both systems, and sends out the phase difference obtained as a result of the calculation as delay information. When the switching control is applied from the center 17, the control unit 23 controls the read reset signal of the standby elastic store 24b based on the delay information, and the elastic stores 24a and 2
The output phase of 4b is matched. The outputs of the elastic stores 24a and 24b of both systems are switched by the selection circuit 25 in the cell next to the cell to which the empty bit of the switching signal is added as additional information, and data is transmitted.

[0008]

However, the conventional hitless switching system has the following problems. First, in the case of the first conventional example, the frame pulse coincides when the phase difference between the working system and the standby system is larger than the frame pulse width.
Since switching is performed using different data, instantaneous interruption occurs. Therefore, in the first conventional example, instantaneous interruption switching can be realized only when the phase difference is within one frame. on the other hand,
In the case of the second conventional example, the switching signal is added by the transmitting device, and the phase difference between the switching signals of both systems is detected by the receiving device, so that the circuit scale of the receiving device becomes large, The circuit scale of the device also increases. Further, in the second conventional example, since both the transmitting device and the receiving device must be controlled, the system becomes complicated.

An object of the present invention is to provide a non-instantaneous interruption switching system capable of performing instantaneous interruption switching even when the circuit scale is small and the phase difference is one frame or more.

Another object of the present invention is to provide an instantaneous interruption switching system in which only a receiving device detects a phase difference between transmission line frame signals of both systems and performs instantaneous interruption switching.

[0011]

In the hitless switching method according to the present invention, a transmission line frame signal containing a virtual container of an arbitrary phase together with a pointer indicating the head thereof is transmitted in a duplicated manner, and a 0-system is transmitted on the receiving side. The data received by the receiving section and the 1-system receiving section are input to the selection control section, and the selection control section selects and outputs one of the data received by the 0-system receiving section and the 1-system receiving section by a selection signal. In the instantaneous interruption switching system, each of the 0-system receiving unit and the 1-system receiving unit
A termination unit for receiving and terminating the transmission line frame signal and outputting a virtual container, a transmission line clock, and a frame pulse; and a multi-frame pulse for every N frames (N is an integer of 2 or more) from the frame pulse output from the termination unit. A multi-frame pulse generating section, a transmission path clock, a virtual container, and a multi-frame pulse are input to the write side, an internal clock and a read reset signal are input to the read side, and a virtual container is output at the phase of the read reset signal. When the frame phase of the local system is different from that of the virtual container of the standby system and that of the other system due to the elastic store, the control signal, and the information of the active system, the multiframe pulse is read by shifting the frame pulse in the apparatus of one frame width of the virtual container. And a control unit for outputting a reset signal. The selection control unit compares the virtual containers output from the 0-system receiving unit and the 1-system receiving unit for each frame in the apparatus, and outputs a control signal indicating match / mismatch, and a control unit and a switching signal. An external control unit that outputs the active system information that changes at the timing of the frame in the device only when the virtual containers of the system match, and inputs the virtual containers of both systems and uses the active system information as a selection signal to perform one system And a selection circuit for selecting

[0012]

Embodiments of the present invention will be described below with reference to the drawings.

Referring to FIG. 1, in the hitless switching system according to one embodiment of the present invention, a transmission line frame signal containing a virtual container of an arbitrary phase together with a pointer indicating the head thereof is transmitted in a duplicated manner. On the receiving side, data received by the 0-system receiving unit 1a and the 1-system receiving unit 1b is input to the selection control unit 3, and the selection control unit 3 is applied to a transmission system in which one of them is selected by a selection signal. Is done.

The 0-system receiving section 1a and the 1-system receiving section 1b
Terminating sections (TRM) 4a and 4b and multi-frame pulse generating sections (MFP GEN) 5a and 5b, respectively.
b and elastic stores (ES) 6a and 6b
And control units (CONT) 7a and 7b.

The termination units 4a and 4b receive and terminate the transmission line frame signals a and b, respectively, and output a virtual container VC, a transmission line clock LC, and frame pulses FP1 and FP2. The multi-frame pulse generators 5a and 5b respectively output the frame pulses FP1 and FP2 output from the terminators 4a and 4b, respectively.
Thus, multi-frame pulses MFP1 and MFP2 are output every N frames.

The elastic stores 6a and 6b are:
Transmission line clock LC and virtual container V, respectively
C and the multi-frame pulses MFP1 and MFP2 on the write side, the internal clock C and the read reset signal SF.
P1 and SFP2 are input to the read side, and virtual containers VC1 and VC2 are output with the phases of read reset signals SFP1 and SFP2. Control unit (CON
T) 7a and 7b respectively output multi-frame pulses MFP1 and MFP2 to the virtual containers when the frame phases of the virtual containers VC2 and VC1 of the standby system and the other system are different from each other according to the control signal J and the active system information ACT. It is read by shifting the internal frame pulse FP of one frame width of VC1 and VC2, and outputs read reset signals SFP1 and SFP2.

The selection control section 3 has a comparison section 8, an external control section (COM) 9, and a selection circuit (SEL) 10.
The comparing unit 8 compares the virtual containers VC1 and VC2 output from the 0-system receiving unit 1a and the 1-system receiving unit 1b for each frame FP in the device, and outputs a control signal J indicating match / mismatch. The external control unit 9 uses the control signal J and the switching signal S to control the virtual containers VC1 and V2 of both systems.
Only when C2 matches, the active system information ACT that changes at the timing of the internal frame FP is output. The selection circuit 10 includes both virtual containers VC1 and V
C2 is input, and a single-system virtual container is selected based on the active system information ACT. The selection control unit 3 outputs the active system information ACT to the 0 system receiving unit 1a, and outputs the active system information ACT inverted by the inverter 9a to the 1 system receiving unit 1b.

Next, the operation of the transmission system shown in FIG. 1 will be described with reference to FIG. Normally, the phases of the transmission line frame signal a and the transmission line frame signal b do not match. In the present embodiment, the maximum phase difference between the two systems of the transmission line frame signal is within four frames, the transmission line frame signals a and b are received with a phase difference of approximately two frames, and the 0-system receiving unit 1a is currently selected. Suppose that

In the 0-system receiving section 1a and the 1-system receiving section 1b, the multi-frame pulse generating sections 5a and 5b
Multiframe pulses MFP1 and MFP2 are generated for every four frame pulses FP1 and FP2, respectively.

Control units 7a and 7b output read reset signals SFP1 and SFP2 in phase with multiframe pulses MFP1 and MFP2, respectively. Elastic stores 6a and 6b write-reset multi-frame pulses MFP1 and MFP2, respectively, input transmission line clock LC as a write clock, and read-out reset signals SFP1 and SFP, respectively.
2 is a read reset, and the virtual containers VC1 and VC2 are read using the internal clock C as a read clock.

At the position of the multi-frame bit 1 shown in FIG. 2, the virtual containers VC1 and VC2 read from the elastic stores 6a and 6b are compared by the comparing unit 8, and the comparing unit 8 determines whether the data matches / mismatches. The control signal J shown is output. At this time, the control unit 7b of the first system receiving unit 1b determines that the own system is the standby system and the frame phase of the virtual container VC2 is different from that of the other system by the control signal J and the active system information ACT. The read reset pulse SFP2 is output after being delayed by the internal frame pulse FP.

The phase diagram is the position of the multi-frame bit 2 in FIG. Since the virtual containers VC1 and VC2 do not match at this time, the control signal J also indicates mismatch. The control unit 7b also outputs the read reset signal SFP2 of the own system delayed by the in-device frame pulse FP because the own system is the standby system and the frame phase of the virtual container VC2 is different from that of the other system.

The phase diagram is the position of the multi-frame bit 3 in FIG. Since the virtual containers VC1 and VC2 at this time match, the control signal J indicates a match,
The control unit 7b continues to output the read reset signal SFP2 at the phase of the multi-frame bit 3.

When the switching signal S is received, the external control unit 9 outputs the active system information ACT for switching the active system from the 0 system to the 1 system at the timing of the frame pulse FP in the apparatus because the control signal J indicates the coincidence. Output. The selection circuit 10
The virtual container VC is switched from the virtual container VC1 selection output to the virtual container VC2 selection output according to the active system information ACT. According to the active system information ACT, the first system receiving unit 1b becomes the active system and the zero system receiving unit 1a becomes the standby system.

Although the present invention has been described with reference to the embodiments, the present invention is not limited to the embodiments, and it is needless to say that various changes / modifications can be made without departing from the spirit of the present invention. .

[0026]

As described above, in the hitless switching system of the present invention, a multi-frame pulse is generated from a frame pulse extracted from a transmission line frame signal, and data of both systems is compared for each frame within the multi-frame. And by controlling, even when the phase difference between the transmission line frame signals of both systems is one frame or more, it can be changed to a value other than the elastic store.
Instantaneous interruption switching is possible without using delay means . In addition, since it is possible to detect the phase difference between the transmission line frame signals of both systems and perform the instantaneous interruption switching only by the receiving device, there is an advantage that the circuit scale can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a receiving apparatus of a transmission system to which a hitless switching system according to an embodiment of the present invention is applied.

FIG. 2 is a time chart for explaining an operation of the receiving device shown in FIG. 1;

FIG. 3 is a block diagram showing a first conventional example of a hitless switching method.

FIG. 4 is a block diagram showing a second conventional example of the hitless switching method.

[Explanation of symbols]

1a 0-system receiving unit 1b 1-system receiving unit 3 Selection control unit 4a, 4b Termination unit (TRM) 5a, 5b Multi-frame pulse generation unit (MFP
GEN) 6a, 6b Elastic store (ES) 7a, 7b Control unit (CONT) 8 Comparison unit 9 External control unit (COM) 10 Selection circuit (SEL)

Claims (2)

(57) [Claims] 1. A transmission line frame signal containing a virtual container of an arbitrary phase together with a pointer indicating the head of the transmission line is duplicated and transmitted.
a) and the data received by the first-system receiving unit (1b) are input to the selection control unit (3).
In the non-interruptible switching method of selecting and outputting one of data received by the system receiving unit (1a) and the system 1 receiving unit (1b) by a selection signal, the 0-system receiving unit (1a) and the 1-system Receiver (1b)
Are terminating units (4a, 4b) for receiving and terminating a transmission line frame signal and outputting a virtual container, a transmission line clock, and a frame pulse, respectively;
4b) a multi-frame pulse generator (5a, 5b) for generating a multi-frame pulse every N frames (N is an integer of 2 or more) from the frame pulse output from 4b);
An elastic store (6a, 6a, which inputs the transmission path clock, the virtual container, and the multi-frame pulse to the writing side, inputs the internal clock and the read reset signal to the reading side, and outputs a virtual container at the phase of the read reset signal. 6b), when the frame phase of the virtual system of the standby system differs from that of the virtual system of the standby system and that of the other system based on the control signal and the active system information, the multi-frame pulse is shifted by the frame pulse of the virtual container of 1 frame width in the apparatus. A control unit (7a, 7b) for outputting the read reset signal, wherein the selection control unit (3) is configured to output a virtual signal output from the 0-system receiving unit (1a) and the 1-system receiving unit (1b). A comparing unit (8) that compares the container for each frame in the apparatus and outputs the control signal indicating match / mismatch. ), An external control unit (9) that outputs working system information that changes at the timing of a frame in the apparatus only when the virtual containers of both systems match according to the control signal and the switching signal, and a virtual container of both systems. And a selection circuit (10) for inputting and selecting one system using the current system information as the selection signal. 2. A means for outputting the active system information to the zero system receiving unit (1a) and the inverted system of the active system information to the first system receiving unit (1b). The non-instantaneous interruption switching system according to claim 1, comprising: