JP2597034B2 - Active matrix display device and control method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION 【Overview】

An opposing matrix type active matrix type display device and a control method thereof are provided, in order to reduce the occurrence of crosstalk and improve the display quality, and to provide a plurality of scan bus lines provided on one of the opposing insulating substrates. A plurality of data bus lines provided on the other side, a plurality of display cells formed by pixel electrodes and electro-optical elements arranged in a matrix, and a plurality of display cells provided for each display cell in order to control each display cell. An active matrix display device, comprising: a switching element that is turned on by applying a positive voltage to a control electrode; and a negative voltage that is applied to the control electrode. And a switching element that is brought into a conductive state by applying The display device has two types of reference voltage bus lines for applying a voltage to each of the display cells, and in each of the display cells, one controlled electrode of each of the two types of switching elements is connected to the pixel electrode; Each of the other controlled electrodes is distributed and connected to one and the other of the two types of reference voltage bus lines, and each control electrode is connected to the corresponding scan bus line. In a state where the reference voltage is applied to the line, a voltage is selectively applied to each of the scan bus lines in synchronization with the application of the voltage to the data bus line, and display data of one frame is written to each display cell. By alternately switching the voltage applied to the bus line between a positive direction voltage and a negative direction voltage for each frame, The two types of switching elements are configured to be turned on alternately for each frame.

TECHNICAL FIELD OF THE INVENTION

The present invention relates to a facing matrix type active matrix display device and a control method thereof. An active matrix display device is used as a thin display device for an information terminal together with a simple matrix display device, and liquid crystal is often used as a display medium. Since the active matrix type liquid crystal display device can independently drive a large number of pixels, even if the number of lines increases with an increase in display capacity,
Unlike the simple matrix type, problems such as a decrease in driving duty ratio and contrast and a decrease in viewing angle do not occur. In addition, in order to cope with a reduction in manufacturing yield and an increase in cost due to the complexity of the structure of the active matrix display device, the scan bus lines and the data bus lines are formed on separate substrates, and are formed on the same substrate. Active matrix type liquid crystal display devices of the opposite matrix type (hereinafter, sometimes referred to as “opposite matrix type liquid crystal panels”) in which intersections of bus lines are eliminated are often used, and the display quality of the opposite matrix type liquid crystal panels is further improved. Improvement is expected.

[Prior art]

2. Description of the Related Art Conventionally, as an opposed matrix type liquid crystal panel, for example, there is one described in Japanese Patent Application Laid-Open No. 61-235815. This conventional opposed matrix type liquid crystal panel will be described with reference to an equivalent circuit diagram shown in FIG. In FIG. 9, the opposed matrix type liquid crystal panel 50
A plurality of scan bus lines 11, a liquid crystal cell 17 provided for each pixel,
A pixel electrode 21 and a TFT (thin film transistor) 51 for controlling the pixel electrode 21 are formed. On the other glass substrate, a data bus line 13 extending in a direction orthogonal to the scan bus line 11 is formed as a counter electrode of the liquid crystal cell 17. It is configured. That is, in the opposed matrix type liquid crystal panel 50,
The pixel electrode 21 which is one electrode of the liquid crystal cell 17 is connected to the source electrode 63 which is one of the controlled electrodes of the TFT 51, and the other electrode is connected to the data bus line 13 (which is also used). The cell 17 has a structure in which the cell 17 is connected between the TFT 51 and the data bus line 13. The drain electrode 62, which is the other controlled electrode of the TFT 51, is commonly connected to a ground bus line (not shown) formed in parallel with the scan bus line 11. As a method for controlling the opposed matrix type liquid crystal panel 50, an address signal S11 having a pulse width of about 30 to 60 μs is used.
However, the TFT 51
The data signal S12 is applied to the liquid crystal cell 17 through the data bus line 13 at that timing, whereby the display data is written to the liquid crystal cell 17.

[Problems to be solved by the invention]

However, in the opposed matrix type liquid crystal panel 50,
Since one electrode of the liquid crystal cell 17 is directly connected to the data bus line 13 (and is also used), the potential of the pixel electrode 21 changes to the data signal S12 during the holding time after addressing.
And always fluctuates following the signal waveform. Therefore, the data signal S12 mixed through only the parasitic capacitance between the source and drain of the TFT in the normal active matrix type display device which is not the opposed matrix type is used.
However, in the opposed matrix type liquid crystal panel 50, the TFT 51
In addition to the parasitic capacitance between the source and the drain as well as the parasitic capacitance between the source and the gate, it is mixed, which is disadvantageous in terms of so-called crosstalk. For this reason, depending on the content of the display image, a shaded pattern may appear on the screen, which has been a problem in improving the display quality. Further, due to the existence of the parasitic capacitance between the source and the gate of the TFT 51, a voltage change at the time of the fall of the address signal S11 appears on the pixel electrode 21 through the parasitic capacitance, whereby the voltage (liquid crystal cell voltage) Vlc of the pixel electrode 21 is increased. Shift in the negative direction. Due to this shift voltage ΔVlc, even when an AC voltage having a polarity symmetrical for each frame is used as the data signal S12, the effective voltage applied to the liquid crystal cell 17 does not become symmetrical and the DC component is reduced. Will occur. Such a DC component reduces display quality such as generation of flicker and an afterimage of a still image, and also reduces the life of the opposed matrix type liquid crystal panel 50. SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to reduce the occurrence of crosstalk in a facing matrix type active matrix display device and improve display quality.

[Means for Solving the Problems]

In order to solve the above-mentioned problems, the display device according to the first aspect of the present invention includes a plurality of scan bus lines provided on one of the opposed insulating substrates and a plurality of scan bus lines provided on the other, as shown in FIGS. A plurality of data bus lines, a plurality of display cells formed by pixel electrodes and electro-optical elements arranged in a matrix, and a switching element provided for each display cell to control each display cell Wherein the switching element applies a positive voltage to the control electrode, and the switching element becomes conductive by applying a positive voltage to the control electrode, and applies a negative voltage to the control electrode. And a switching element that is brought into a conductive state by the
It has two kinds of reference voltage bus lines for applying different reference voltages to each of the display cells, and in each of the display cells, one controlled electrode of each of the two kinds of switching elements is connected to the pixel electrode. Connected, each other controlled electrode is distributed and connected to one and the other of the two types of reference voltage bus lines, and each control electrode is connected to the corresponding scan bus line. With the reference voltage applied to the reference voltage bus line, a voltage is selectively applied to each of the scan bus lines in synchronization with the application of the voltage to the data bus line, and display data of one frame is written to each display cell. By alternately switching the voltage applied to each scan bus line between a positive voltage and a negative voltage for each frame, Serial made is configured to conduct alternately the two switching elements for each frame in each display cell. The display element according to claim 2, wherein the two types of reference voltage bus lines are arranged in parallel with the scan bus lines.
In addition, they are provided alternately for each row of the array of the pixel electrodes. In the display device according to the third aspect of the invention, a different reference voltage is alternately applied to each controlled electrode of the switching element for each of one or a plurality of display cells arranged in a row direction. . 5. The display device according to claim 4, wherein two scan bus lines are provided on both sides of the pixel electrode for each row of the array of the pixel electrodes, and each control electrode of the two types of switching elements is provided. Are distributed and connected to the respective scan bus lines. The control method according to claim 5, wherein a positive or negative voltage is alternately applied to a control electrode of the switching element for each frame, and the switching elements are alternately turned on for each frame. It is.

[Operation]

Next, the operation in the case where TFTs are used as the switching elements 14 and 15 and liquid crystal is used as the electro-optical element will be described with reference to FIG. N-channel TFT 14 and P connected to pixel electrode 21
Each gate electrode 31 of the channel type TFT 15 has a positive voltage + V
_{By GN} and the negative voltage -V _GP address signal S1 alternately switched for each frame is applied, TFT14,15 to alternately conduct. The drain electrodes 32 and 33 of each TFT14,15, since the reference voltage -V _R made every each other, + V _R is applied, TFT 1
4 and 15 are alternately conducted, so that the pixel electrode 21 has
Reference voltage -V _R as its electrode voltage V _P, + V _R is applied alternately. When the voltage of the gate electrode 31 is returned to the original, TFT14,15 is rendered non-conductive, the pixel electrode 21 is a reference voltage -V _R, is disconnected from + V _R. On the other hand, through the data bus line 13, the other electrode of the liquid crystal cell 17 and the data signal S2 of the voltage ± V _D is applied, since the polarity and the electrode voltage V _P is opposite polarity, the liquid crystal cell 17 The applied write voltage (the liquid crystal cell voltage Vlc at the time of write) is the difference between these, (V _D +
V _R ) or-(V _D + V _R ). Reference voltage after writing the pixel electrode 21 to the liquid crystal cell 17 -V _R, + because they are disconnected from V _R, the electrode voltage V _P have the same voltage change as the data signal S2, the liquid crystal cell voltage Vlc a write Will be held. That is, assuming that the threshold voltage of the liquid crystal cell 17 is V _th and the saturation voltage is V _sat , the voltage V _D of the data signal S2 and the reference voltage V _R are represented by V _D = (V _sat −V _th ) / 2. .. (1) V _R = (V _sat + V _th ) / 2 (2) Thus, the magnitude of the voltage V _D is approximately equal to the saturation voltage V _sat in the case of the conventional facing-matrix liquid crystal panel that does not perform the switching of the reference voltage, when the control method of the present invention to switch the reference voltage Is less than half the saturation voltage V _sat as in the above equation (1). Normally, the threshold voltage _Vth is about one half of the saturation voltage _Vsat.
Voltage V _D of S2 is compressed to about 1/4 as compared with the conventional.

BEST MODE FOR CARRYING OUT THE INVENTION

FIG. 2 shows a facing matrix type liquid crystal panel 1 according to the present invention.
FIG. The opposing matrix type liquid crystal panel 1 includes a plurality of scan bus lines 11, 11,..., And reference voltage bus lines 12 (12a, 12b) are formed, and each pixel region partitioned in a matrix is provided with a pixel electrode 21 and TFTs 14 and 15 for controlling the pixel electrode 21. A scan bus line 11 is provided on the other glass substrate. A data bus line 13 extending in a direction perpendicular to the direction is formed as a counter electrode of the liquid crystal cell 17. Liquid crystal is filled between the two glass substrates, and a liquid crystal cell 17 is formed for each pixel electrode 21. The TFTs 14 and 15 are N-channel type and P-channel type, respectively, and are turned on by applying a positive or negative pulse signal (voltage + V _GN , −V _GP ) to these gate electrodes 31. These TFTs 14 and 15 have a semiconductor layer of amorphous silicon or polycrystalline silicon, and have a source / drain contact portion formed of a P-type doped with impurities such as boron in the case of a P-type.
In the case of an N-type semiconductor, an N-type semiconductor doped with phosphorus, arsenic, or the like can be used. In forming them, a photosensitive material, an oxide film,
These two types of TFTs 14 and 15 can be formed by separately doping boron or arsenic into the semiconductor layer of the source / drain portion by a method such as ion implantation or diffusion using a nitride film or the like as a mask. The scan line 11 is provided for each line, and the gate electrodes 31 of the TFTs 14 and 15 connected to the above-described pixel electrodes 21 are connected to the same scan bus line 11. Reference voltage bus line 12, a positive reference voltage bus line 12a for applying a positive reference voltage + V _R, 2 kinds of a negative reference voltage bus line 12b for applying a negative reference voltage -V _R These are alternately provided for each row of the array of the pixel electrodes 21. The drain electrode 32 of the N-channel type TFT 14 is connected to the negative reference voltage bus line 12b, the drain electrode 32 of the P-channel type TFT 15 is connected to the positive reference voltage bus line 12a, and the source electrode 33 is connected to the pixel electrode 21. Each is connected. In the following description and drawings, scan bus line 1
1, address signal S1, data bus line 13, data signal S
2, according to the positions of the TFTs 14, 15 and the liquid crystal cell 17 on the matrix, "n, m", "n + 1, m +"
In some cases, a code such as "1", "n", or "n + 1" or a code indicating a line position is added. FIG. 6 is a signal waveform diagram of each part of the opposed matrix type liquid crystal panel 1 of FIG. Address signals S1n, S1n + 1, S1n + 2,... Are applied to the canvas lines 11n, 11n + 1, 11n + 2,. These address signals S1n, S1n + 1, and S1n + 2 are sequentially output with a delay corresponding to the pulse width for each line, and the polarity of the pulse signals is inverted for each line. The polarity of each of the address signals S1n, S1n + 1 and S1n + 2 is also inverted for each frame. That is, in the odd frame, the address signal S1n
Is a pulse signal of the voltage + V _GN output during the time t ₀ of time t _1, the address signal S1 output in the next line
n + 1 is the voltage −V _GP output between time t ₁ and time t ₂
Pulse signal. In an even frame, the address signal S1n
Is a pulse signal of the voltage −V _GP output between time t ₀ and time t ₁ , and the address signal output to the next line
S1n + 1, the voltage is outputted to between the time t ₁ of time t ₂ + V
_GN pulse signal. The data signal S2 has a voltage of ± V _D and is applied at substantially the same timing as the address signal S1, but in the case of this embodiment in which the same data is written, the data signal S2 is in the same frame. , The polarity is inverted for each line, and for the same line, for each frame. The reference voltage bus line 12a, the 12b, the positive reference voltage + V _R or negative reference voltage -V _R is always applied. First, in the odd frame, the scan bus line 11
When the address signal S1n (voltage + V _GN ) is applied to n, the N-channel TFT 14 connected to the scan bus line 11n is turned on (conducted). As a result, the negative reference voltage −V _R is applied to the pixel electrode 21 of the liquid crystal cell 17 arranged on the line from the negative reference voltage bus line 12b through the N-channel type TFT 14.
Is applied as _P, is the voltage difference between the data bus line 13 the data signal applied to S2 (voltage + V _D) Voltage (V _D +
V _R ) is the write voltage (liquid crystal cell voltage Vl)
c). When the address signal S1n + 1 (voltage −V _GP ) is applied to the next scan bus line 11n + 1, the P-channel TFT 15 connected to the scan bus line 11n + 1 is turned on. has been in the pixel electrode 21 of the liquid crystal cell 17, the positive from the reference voltage bus line 12a the positive reference voltage + V _R is applied as an electrode voltage V _P, the data signal applied to the data bus line 13
S2 (voltage -V _D) and difference voltage at which the voltage of - (V _D -V _R)
Is the writing voltage to the liquid crystal cell 17 (liquid crystal cell voltage Vlc)
Will be applied. In the even frame, the address signal S1 applied to each scan bus line 11, the TFTs 14 and 15 to be turned on,
The electrode voltage _VP or the like applied to the pixel electrode 21 has the opposite or opposite polarity to that of the odd-numbered frame, and as a result, the
Is inverted for each frame. That is, to each liquid crystal cell 17, a data signal S2 (voltage ± V _D ) whose polarity is inverted for each frame is applied, and the two types of TFTs 14 and 15 are alternately turned on for each frame, and the turned on TFTs 14 and 15 are turned on. -V _R , + V
Applying a _R as alternating electrode voltage V _P, these difference voltage _{(V D + V R),} - a (V _D + V _R) is to the liquid crystal cell voltage Vlc written to the liquid crystal cell 17. Thus, the reference voltage + V _R as a write voltage to the liquid crystal cell 17 is added, because given the bias corresponding to the reference voltage + V _R In other words, to obtain a liquid crystal cell voltage Vlc of required size , The voltage ± V _D of the data signal S2 can be reduced. In other words, the amplitude of the data signal S2 is compressed. Therefore, crosstalk caused by the data signal S2 is reduced, and the display quality is improved. Also, since the polarity of the address signal S1 is inverted for each frame, the polarity of the shift voltage ΔVlc generated by the parasitic capacitance between the source and the gate is reversed for each frame,
By averaging over time, the shift voltage ΔVlc is canceled. This prevents the generation of a DC component in the AC voltage applied to the liquid crystal cell 17. As a result, the occurrence of flicker and afterimage of a still image is prevented, the display quality is improved, and the life of the opposed matrix liquid crystal panel 1 is extended. Note that the voltages + V _GN , −V _GP , ± V _D , and the reference voltages + V _R , −V
The magnitude of _R is determined based on the expressions (1) and (2) described in the section of the operation, the structure of the opposed matrix type liquid crystal panel 1, the characteristics of each part, and the like. FIG. 3 is an equivalent circuit diagram showing a facing matrix type liquid crystal panel 2 of another embodiment according to the present invention. 2 is that the polarity of the reference voltage bus line 12 connected to each of the TFTs 14 and 15 is inverted for each liquid crystal cell 17 adjacent in the row direction. This is different from the matrix type liquid crystal panel 1. FIG. 7 is a waveform chart of signals of respective parts of the opposed matrix type liquid crystal panel 2 of FIG. In FIGS. 3 and 7, the data bus lines 13m, 13
The polarity (voltage ± V _D ) of the data signals S2m, S2m + 1... applied to each of the liquid crystal cells 17 adjacent to each other in the row direction is reversed for m + 1. the electrode voltage V _P is different for each liquid crystal cell 17 adjacent in the row direction, each liquid crystal cell 17, each liquid crystal cell 17 adjacent to the row direction, the voltage _{(V D + V R),} -
(V _D + V _R ) is written alternately. According to the opposing matrix type liquid crystal panel 2 of this embodiment, in addition to the effect of the opposing matrix type liquid crystal panel 1 of FIG. 2, the polarity of the data signal S2 to be applied is inverted for each liquid crystal cell 17 adjacent in the row direction. Therefore, generation of flicker is further prevented. FIG. 4 is an equivalent circuit diagram showing a facing matrix type liquid crystal panel 3 of another embodiment according to the present invention. In this opposed matrix type liquid crystal panel 3, scan bus lines 11 (SU, SD) are formed on the upper and lower sides of each liquid crystal cell 17, and two types of TFTs 14, 15 are formed near each scan bus line SU, SD. The difference from the opposed matrix type liquid crystal panel 1 in FIG. 2 is that the connection is made to the scan bus lines SU, SD near the gate electrodes 31 of the TFTs 14, 15, respectively. The waveforms of the signals at various parts of the opposing matrix liquid crystal panel 3 are the same as those in FIG. 6 for the opposing matrix liquid crystal panel 1 in FIG. Therefore, the same address signal S1 is applied to a pair of scan bus lines SU and SD located above and below the same pixel, and one of the TFTs 14 and 15 is turned on according to the polarity. In the counter matrix type liquid crystal panel 3 of this embodiment, in addition to the effect of the counter matrix type liquid crystal panel 1 of FIG. 1, the electrode portion between the drain electrode 32 of each of the TFTs 14 and 15 and the reference voltage bus line 12 is formed. The wiring length can be shortened,
The occurrence of crosstalk can be further reduced by reducing the parasitic capacitance between the drain and the source, and the aperture ratio can be increased. FIG. 5 is an equivalent circuit diagram showing a facing matrix type liquid crystal panel 4 according to another embodiment of the present invention. This opposing matrix type liquid crystal panel 4 has the same configuration as the opposing matrix type liquid crystal panel 3 shown in FIG. 4 applied to the opposing matrix type liquid crystal panel 2 shown in FIG. That is, in the opposed matrix type liquid crystal panel 4, the scan bus lines 11 (SU, SD) are formed on the upper and lower sides of each liquid crystal cell 17, and the two types of TFTs 14, 15 are respectively provided near the scan bus lines SU, SD. Form each TFT1
Connect the gate electrodes 31 of 4,15 to the nearby scan bus lines SU, SD
And the drain electrodes of TFT14 and TFT15
32 is a reference voltage bus line 12 having a different polarity for each line.
The difference from the opposing matrix type liquid crystal panel 2 in FIG. 3 is that it is configured to be connected to a and 112b. FIG. 8 is a waveform diagram of signals of respective parts of the opposed matrix type liquid crystal panel 4 of FIG. In FIG. 8, the address signal S1 has the same polarity with respect to the scan bus line 11 of each line in the same frame, and the polarity is inverted every frame.
Therefore, the data signal S2 is also on the same data bus line.
13m, 13m + 1... Have the same polarity within one frame, and the polarity is inverted for each adjacent data bus line 13m, 13m + 1. In the opposing matrix type liquid crystal panel 4 of this embodiment, in addition to the effect of the opposing matrix type liquid crystal panel 1 of FIG. 1, the polarity of the data signal S2 applied to each liquid crystal cell 17 adjacent in the row direction is inverted. The occurrence of flicker is further prevented, and the wiring length of the electrode section between the drain electrode 32 of each TFT 14 and 15 and the reference voltage bus line 12 can be shortened, thereby reducing the drain-source parasitic capacitance. Thus, the occurrence of crosstalk can be further reduced, and the aperture ratio can be increased. In each of the above-described opposed matrix type liquid crystal panels 1 to 4, one liquid crystal cell 17 is connected to two TFTs 14, 15
TFT14,15
If one of the TFTs becomes open due to a defect, or becomes short-circuited and is cut by a laser, the other TFTs 14 and 15 can drive the liquid crystal cell 17 and display Function can be maintained. In the above embodiment, two TFTs 14 and 15 are used for each liquid crystal cell 17, but three or more TFTs may be used. TFT1
P channel type using a semiconductor substrate or N
It may be a channel type MOS transistor or the like. Further, various configurations other than those described above can be obtained by exchanging the connection of the P-channel type or the N-channel type or the connection of the reference voltage of the reference voltage bus line 12, and the like. The polarity and voltage value of the signal S2, the reference voltage and the like can be variously changed. In the above embodiment, liquid crystal is used as the electro-optical element, but other various elements such as an electroluminescent element and an electrochromic element can be used. The structures, shapes, materials, and the like of the opposed matrix type liquid crystal panels 1 to 4 and each part thereof may be various other than those described above.

【The invention's effect】

ADVANTAGE OF THE INVENTION According to this invention, in the active matrix type display apparatus of a facing matrix system, generation | occurrence | production of crosstalk can be reduced and display quality can be improved. Also, the polarity of the address signal is inverted for each frame,
By canceling the shift voltage generated by the parasitic capacitance between the source and the gate, it is also possible to prevent the generation of the DC component and the occurrence of the flicker and the afterimage phenomenon of the still image. Further, since the switching elements have redundancy, even if a failure occurs in one of the switching elements, the display function can be maintained by driving the display cell by the other switching element. Further, according to the present invention, the wiring length of the controlled electrode of the switching element can be shortened, the parasitic capacitance is reduced, the occurrence of crosstalk is further reduced, and the aperture ratio is increased. it can.

[Brief description of the drawings]

FIG. 1 is an equivalent circuit diagram for explaining the principle of the present invention, FIG. 2 is an equivalent circuit diagram showing a facing matrix type liquid crystal panel according to the present invention, and FIGS. 3 to 5 are other circuit diagrams according to the present invention. FIG. 6 is an equivalent circuit diagram showing the opposing matrix type liquid crystal panel of the embodiment, FIG. 6 is a waveform diagram of signals of respective parts of the opposing matrix type liquid crystal panel of FIGS. 2 and 4, and FIG. FIG. 8 is a waveform diagram of a signal of each portion of the liquid crystal panel, FIG. 8 is a waveform diagram of a signal of each portion of the opposed matrix type liquid crystal panel of FIG. 5, and FIG. 9 is an equivalent circuit diagram showing a conventional opposed matrix type liquid crystal panel. In the figure, 1 to 4 are opposed matrix type liquid crystal panels (active matrix type display devices), 11, SN and SP are scan bus lines, 12, 12a and 12b are reference voltage bus lines, 13 is a data bus line, and 14 is a TFT. (Switching element), 15 is TFT (switching element), 17 is liquid crystal cell (display cell), 21 is pixel electrode, 31 is gate electrode (control electrode), 32 is drain electrode (controlled electrode), 33 is source electrode (controlled electrode), a + V _R, -V _R is the reference voltage.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Tetsuya Hamada 1015 Uedanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Inside Fujitsu Limited (72) Inventor Kazuhiro Takahara 1015 Kamikodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Limited

Claims (5)

(57) [Claims] 1. A plurality of scan bus lines provided on one of opposing insulating substrates and a plurality of data bus lines provided on the other, a plurality of pixels formed by pixel electrodes and electro-optical elements arranged in a matrix. A display cell, and a switching element provided for each display cell to control each of the display cells, wherein the switching element has a control electrode in a positive direction. A switching element that is turned on by applying a voltage, and a switching element that is turned on by applying a negative voltage to the control electrode, and applies different reference voltages to each of the display cells. And two types of reference voltage bus lines for each of the display cells. One of the controlled electrodes is connected to the pixel electrode, and the other controlled electrode is separately connected to one of the two types of reference voltage bus lines and the other of the two control voltage bus lines. In a state where the reference voltage is applied to each of the reference voltage bus lines, a voltage is selectively applied to each of the scan bus lines in synchronization with application of a voltage to the data bus line. The display data of one frame is applied to each display cell, and the voltage applied to each scan bus line is alternately switched between a positive voltage and a negative voltage for each frame. An active matrix display characterized in that the two types of switching elements are alternately turned on for each frame. apparatus. 2. The device according to claim 1, wherein the two types of reference voltage bus lines are provided in parallel with the scan bus lines and alternately for each row of the pixel electrode array. Active matrix display device. 3. The method according to claim 1, wherein a different reference voltage is alternately applied to one or a plurality of display cells arranged in a row direction to each controlled electrode of the switching element. Item 3. An active matrix display device according to item 1 or 2. 4. Two scan bus lines are provided on both sides of the pixel electrode for each row of the array of pixel electrodes, and each control electrode of the two types of switching elements is connected to each of the scan buses. The active matrix display device according to claim 1, wherein the active matrix display device is connected to a line. 5. The method according to claim 1, wherein a positive or negative voltage is alternately applied to a control electrode of said switching element for each frame, and said switching elements are turned on alternately for each frame. A method for controlling an active matrix display device according to any one of claims 1 to 4.