JP2584120B2 - Data recording method in memory card and memory card system - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a data recording method and a memory card system in a memory card for storing data such as image data and character data.

BACKGROUND ART In recent years, as a medium for recording image data such as an electronic still camera and character data such as a word processor, a smaller memory card using a semiconductor memory has been used instead of a floppy disk.

Conventionally, such a memory card has a static RAM that can perform high-speed reading and writing.
(SRAM) was used.

However, since this SRAM is a volatile semiconductor memory, a backup battery is required, and
There is a problem in that storing large-capacity data such as image data becomes expensive and the price of the memory card becomes high.

Therefore, in recent years, adoption of an inexpensive EEPROM (electrically erasable and rewritable read-only memory), which is a nonvolatile semiconductor memory that does not require a backup battery, as a memory card has been studied. This EEPROM has an excellent storage period of 10 years or more without a battery, and in recent years has provided a reading or writing speed comparable to that of SRAM, and the price is about a quarter of that of SRAM. Is being developed.

However, due to the nature of the device, this EEPROM must take erasure into account, so there is a need to increase the number of pins for the memory card and special considerations on the operation side of the use of the memory card. Arising
The problem is that it is difficult to achieve compatibility with a memory card configured with SRAM.

The necessity of increasing the number of pins is that EEPROM cannot rewrite data as overwriting. In this case, two steps of erasing and writing are required. There was a problem that required pins.

In addition, special considerations are required for EEPROM erasing methods such as a batch erasing type (flash type) and a block type erasing method. For erasing in block units, similar to SRAM, However, when the flash type is used, there is a problem that the rewriting cannot be freely performed in block units unlike SRAM.

Further, the number of times of erasing and writing is limited in EEPROM, for example, there is a limit of 100 to 10000 times of erasing and writing. In a block erasing type EEPROM, when writing is concentrated in one place, the life is extremely shortened. There was a problem of getting faster.

Objective The present invention overcomes such disadvantages of the prior art and provides an EE
It is not necessary to increase the number of pins in a memory card using a PROM, compatibility with a memory card using an SRAM can be achieved, and long life can be maintained when using a block erase type EEPROM. It is an object of the present invention to provide a memory card recording method and a memory card system capable of performing the above.

DISCLOSURE OF THE INVENTION According to a recording method of a memory card according to the present invention, in a data recording method in a memory card using a block erase type EEPROM as a main memory, at least one of the EEPROMs having a plurality of memory blocks is stored in the EEPROM. A memory block is set as a spare block in which nothing has been written, and when an access to rewrite the data occurs in one memory block to which data has been written so far, the memory block and the spare block are used. By exchanging the physical address between the memory block and the memory block converted from the spare block by erasing the memory contents of one memory block in which data has been written up to the previous time, The data from this access is written to the Data is rewritten as a lock.

According to the memory card system of the present invention,
Block erase type EEPROM in main memory of memory card
In this memory card system, the memory card system is configured by the EEPROM having a plurality of memory blocks, and at least one of the memory blocks is configured as a spare block in which nothing is written. A main memory unit, a physical address of each memory block in the main memory unit, whether or not data is held in these memory blocks, and a data holding state thereof, and an external memory. A block selecting unit that reads a logical address sent from the device and selects a memory block of a main memory unit corresponding to the logical address, and a system control unit that controls each unit in response to a control signal sent from an external device. The block selecting unit writes the read logical address. In the case of the address for the body,
A determination function of reading and determining the data storage state of the memory block stored in the main memory management memory, and a determination result of the determination function, when it is determined that data is stored in the memory block, An address exchange function for exchanging the physical addresses of the memory block of the main memory management memory and the spare block into the main memory management memory and writing the data, and a logic block for reading the memory block exchanged from the address of the spare block by the address exchange function A selection function of selecting a target block of an address, and the system control unit erasing a memory content of the memory block converted into an address of the spare block by the address exchange function of the block selection unit. With the configuration having If the recombination occurs, and averaging the number of uses of each memory block are sequentially replacing the memory block.

Description of Embodiment Next, an embodiment of a recording method and a memory card system in a memory card according to the present invention will be described in detail with reference to the drawings.

As shown in FIG. 1, a memory card M according to this embodiment includes a main memory unit 10 for storing data,
The main memory unit 10 includes a control unit 20 for performing write control or read control. The memory card M is attachable via a connector 22 to an external device such as an electronic still camera or its playback device.

The main memory unit 10 is configured by a block erase type EEPROM (an electrically erasable / writable nonvolatile memory). This EEPROM has a plurality of memory blocks 1,
.., And each of these memory blocks is in units of one cluster in which image data for one screen is stored, for example. In the main memory unit 10, at least one of the clusters 1, 2,... Is a spare cluster in which no data is written. This spare cluster is used when the cluster holding the data is overwritten. Specifically, as shown in FIG. 2, for example, when an overwrite access occurs in the cluster 1, the physical address A of the cluster 1 and the physical address D of the spare cluster 4 are exchanged.
This data is written to the cluster 4 at the address A, and the data at the cluster at the address D is erased.
Rewriting is performed by exchanging clusters. Thereby, one or more spare clusters always exist in the main memory unit 10. When the erase signal is supplied to each of the clusters 1, 2,..., The stored contents are all set to “1” and the data is erased.

In FIG. 1 again, the control unit 20 includes an input / output control unit 24 for performing input / output processing of addresses and data, and a main memory unit 10 for writing or reading data.
, A main memory management memory 28 for managing the physical addresses of the clusters 1, 2,... Of the main memory unit 10 and the data storage state thereof, and a selected cluster. Address control unit 30 for controlling the lower address of
And a system control unit 32 for controlling the

The input / output control unit 24 reads an address for writing or reading sent from the external device via the connector 22 and transfers the address to the cluster selection control unit 26. And a data register for transferring data. These registers operate in response to a timing signal TS sent from the system control unit 32.

The cluster selection control unit 26 is a circuit that selects the corresponding cluster 1, 2,... In the main memory unit 10 according to the address transferred via the input / output control unit 24. The cluster selection control unit 26 in this embodiment has a determination function of reading and determining the data storage state of the cluster stored in the main memory management memory 28 when the read address is an address for writing; When the result of the determination by the function indicates that data is stored in the cluster, the physical addresses of the cluster and the spare cluster in the main memory management memory 28 are exchanged and written into the main memory management memory 28. It has an address exchange function and a selection function of selecting a cluster exchanged by the address exchange function as a target cluster of the read logical address.

The main memory management memory 28 is configured by a non-volatile memory such as a non-volatile RAM, and retains the stored contents even when the card M is removed from an external device. This main memory management memory 28
.. Correspond to the physical addresses of the clusters 1, 2,... Of the main memory unit 10, and whether or not data is held in each cluster is stored. In this case, for example, when data is held, a flag of "1" is written in the corresponding address, and when data is not held, a flag of "0" is written in the address. ,
At the time of writing or erasing, the flag is rewritten.

The address control unit 30 is configured by an address counter. The address control unit 30 includes a system control unit.
Count the timing clock sent from 32,
This is a circuit for sending to the main memory unit 10 a lower address for reading or writing for each byte of the cluster selected by the cluster selector control unit 26.

The system control unit 32 is supplied with a write signal for writing and a read signal for reading sent from an external device via the connector 22, and outputs a control signal for controlling writing or reading, respectively. Each part 24
Send to ~ 30. Specifically, when a control signal is supplied via the connector 22, an identification signal IS for distinguishing between reading and writing is sent to the main memory unit 10 and the cluster selection control unit 26, and at the same time, processing is performed to the external device side. A BUSY signal indicating the inside is transmitted. A timing signal TS for writing or reading data is input to the input / output control unit 24.
And sends a timing clock TCLK to the address control unit 30 and the main memory unit 10 in synchronization with this signal.
Further, when an overwrite access occurs and the physical address is replaced in the main memory management memory 28, the system control unit 32 receives the replacement signal SS transmitted from the cluster select control unit 26. Then, the main memory management memory 28 performs control for erasing the data holding cluster that has become the address of the spare cluster. In this case, the address of the spare cluster is read from the main memory management memory 28, the address is sent to the cluster selector control unit 26, the erase cluster is selected, and the erase signal is sent to the main memory unit 10 to send the spare block. To form

A connector 22 for connecting the control unit 20 to an external device has terminals for connecting to an address / data bus 100 for transmitting addresses and data and a control bus 110 for transmitting control signals.

The address / data bus 100 transmits an address for writing or reading and data transmitted following the write address to the memory card M, and transmits the read data to an external device. The control bus 110 transmits a write signal for writing and a read signal for reading to the memory card M, and
The BUSY signal sent from is transmitted to the external device.

Next, an operation of the memory card M having the above configuration and a recording method thereof will be described.

First, the operator inserts the memory card M into the connector 22.
Is connected to the address data shared bus 100 and the control bus 110 of the external device, so that the device is mounted on the external device. Next, when the external device is a device that records data, such as an electronic still camera, the control bus 110 is stored in the memory card M.
When a write signal is sent from the system controller 32, the system controller 32 determines whether the signal is a write signal or a read signal, and sends a timing signal TS for reading an address to the input / output controller 24.
At the same time, an identification signal indicating writing is sent to the cluster select control unit 26. Thus, when the write address is sent from the external device, the input / output control unit 24 reads the address into the address register, and transfers the read address to the cluster select control unit 26. When reading the write address, the cluster select control unit 26 reads the data storage state of the cluster corresponding to the address from the main memory management memory 28, and determines whether the previous data is held at the address. to decide. If the result of the determination is that no data is stored, the cluster select control unit 26 sends a cluster select signal specifying the start address of the cluster to the main memory unit 10. Next, when write data is sent from the external device, the input / output control unit 24 reads the data into the data register and sends the data to the main memory unit 10 in synchronization with the timing signal TS sent from the system control unit 32. Send out. At this time, the system control unit 32 sends a timing signal TCLK for writing to the address control unit 30 and the main memory unit 10. As a result, the main memory unit 10
Writes the write data sent from the input / output control unit 24 into the cluster selected by the cluster select control unit 26 one by one according to the address signal of the address control unit 30. When writing is completed, the system controller
A BU 32 writes a flag of “1” at a corresponding address of the main memory management memory 28 and sends it to an external device.
The SY signal is released, and the system waits for the next instruction.

If the access from the external device is overwriting, the cluster select control unit 26 receiving this address from the input / output control unit 24 reads the data holding state of the address from the main memory management memory 28, and Determine that data has been written to the cluster. As a result, the cluster select control unit 26 exchanges the physical addresses of the access destination cluster and the spare cluster and writes them in the main memory management memory 28, and accesses the cluster converted from the spare cluster as a data write destination. . At the same time, the cluster selection control unit 26
Sends a replacement signal SS to the system control unit 32. The system control unit 32 sends the timing signal TS to the input / output control unit 24, and the address control unit 30 and the main memory unit 10
To send the timing clock TCLK to As a result, the write data supplied from the external device is sequentially written one byte at a time through the data register of the input / output control unit 24 into the converted cluster from the spare cluster in the main memory unit 10. When this writing is completed, the system control unit 32 reads the address of the cluster converted into the spare cluster from the main memory management memory 28 and sends it to the cluster select control unit 26. As a result, the cluster selection control unit 26 selects the cluster converted into the spare selector. Then, the system control unit 32 sends an erasure signal to the main memory unit 10. As a result, the contents of the memory of the cluster converted into the spare cluster are erased. When the erasing is completed, the system control unit 32 releases the BUSY signal and waits for the next instruction.

As described above, in this embodiment, no substantial erasure command signal is supplied from the external device, so that it is not necessary to increase the number of pins for erasure in the connector 22 of the memory card M. As a result, in terms of hardware, compatibility with a memory card using SRAM can be achieved. Further, in this embodiment, clusters are exchanged at the time of data rewriting, so that clusters can be used on average. Therefore, rewriting is not concentrated on one cluster, and the EEPROM, that is, the memory, is not used. The life of the card M can be maintained long.

When the external device on which the memory card M is mounted is a reproducing device, a read signal is supplied from the control bus 110.
Upon receiving this read signal, the system control unit 32 sends the cluster select control unit and the identification signal IS for reading to the main memory unit 10, and sends the timing signal TS for reading to the input / output control unit 24. I do. Thereby, the input / output control unit 24 transfers the read address sent from the external device to the address select control unit 26. Upon receiving the read address, cluster select control unit 26 sends a signal to main memory unit 10 for selecting a selector at that address. At this time, the system control unit 32 sends a timing clock TCLK for reading to the address control unit 30 and the main memory unit 10. As a result, the main memory unit 10
The data is read one byte at a time from the corresponding cluster and transmitted to the external device via the input / output control unit 24. When the reading is completed, the system control unit 32 releases the BUSY signal and enters a command waiting state.

In the above embodiment, at the time of rewriting, the data is written and the spare cluster is erased after converting the cluster. However, after converting the cluster, the data is erased after the spare cluster is erased. The data may be written in the cluster converted from the spare cluster.

Effect As described in detail above, in the memory card recording method and memory card system according to the present invention, at least one of the plurality of memory blocks is used as a spare block by using a block erase type EEPROM. , In the event of overwriting access,
The physical address of the memory block to be accessed and the spare block are exchanged, and the current data is written to the memory block converted from the spare block.
By erasing the contents of the memory block converted to the address of the spare block, rewriting is performed while sequentially replacing the memory blocks. Therefore, no substantial erase command signal is supplied from the external device, and there is no need to increase the number of pins in the memory card. As a result, in terms of hardware, compatibility with a memory card using SRAM can be achieved. In addition, since memory blocks are exchanged when rewriting data, the memory blocks can be used on an average basis, so that rewriting is not concentrated on one memory block and the life of the EEPROM, that is, the memory card is extended. It has an excellent effect that it can be held.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a memory card according to the present invention, and FIG. 2 is a conceptual diagram showing a recording method of the memory card in the embodiment of the present invention. Description of Signs of Main Parts M: Memory Card 1, 2, Cluster (Memory Block) 10: Main Memory Unit 20: Control Unit 22: Connector 24: Input / Output Control Unit 26: Cluster Select Control Unit 28: Main memory management memory 30: Address control unit 32: System control unit 100: Address data bus 110: Control bus

Claims (2)

(57) [Claims] 1. A data recording method for a memory card using a block erase type EEPROM as a main memory, wherein at least one of the memory blocks is not written in the EEPROM having a plurality of memory blocks. When a spare block is used, when a memory block to which data has been previously written is accessed to rewrite the data, the physical address is exchanged between the memory block and the spare block. Then, by erasing the memory contents of the memory block to which the data was written up to the previous time, the memory block is used as a spare block, and the data obtained by the current access is written to the converted memory block from the spare block to serve as a data holding block. It is characterized by rewriting data Data recording method in the memory card that. 2. A memory card system using a block erase type EEPROM as a main memory of a memory card, wherein the memory card system comprises the EEPROM having a plurality of memory blocks, and at least one of the EEPROMs is provided. A main memory unit configured as a spare block in which no memory block is written, a physical address of each memory block in the main memory unit, and whether or not data is held in these memory blocks; A main memory management memory for storing these data holding states, a block selecting unit for reading a logical address sent from an external device and selecting a memory block of the main memory unit corresponding to the logical address; System control that controls each part in response to control signals sent from The block selecting unit reads and determines the data storage state of the address of the memory block stored in the main memory management memory when the read logical address is an address for writing. Function, and when it is determined that data is stored in the memory block, the physical addresses of the memory block and the spare block of the main memory management memory are replaced with the main memory management memory. And a selection function of selecting a memory block exchanged from a spare block by the address exchange function as a target block of the read logical address. Is reserved by the address exchange function of the block selector. Memory card system characterized by comprising a erasure function to erase the memory contents of the transformed memory block address.