JP2578759B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device in which a diffusion layer formed on a semiconductor substrate and a wiring layer made of aluminum or the like are connected to each other via a barrier layer.

[Summary of the Invention]

The present invention relates to a titanium layer formed on the p-type diffusion layer side and a titanium nitride layer formed on the wiring layer side by laminating a p-type diffusion layer and a wiring layer formed on a semiconductor substrate on the p-type diffusion layer side Are connected to each other through a barrier layer consisting of
By setting the surface concentration of the p-type impurity in the p-type diffusion layer to 1.4 × 10 ²⁰ cm ^-3 or more, the generation of alloy spikes that occurs when the p-type diffusion layer and the wiring layer are brought into direct contact is extremely effectively prevented. In addition, the ohmic property between the p-type diffusion layer and the barrier layer is increased and the contact resistance is reduced.

[Conventional technology]

When an aluminum wiring layer is brought into direct contact with an impurity diffusion layer provided on a semiconductor substrate, aluminum enters from the surface of the diffusion layer and penetrates through the diffusion layer during a subsequent heat treatment, resulting in a so-called alloy spike that short-circuits with the substrate.

Therefore, in order to prevent this, a barrier layer including a titanium nitride layer is provided between the diffusion layer and the wiring layer. For example, in an apparatus described in Japanese Patent Application Laid-Open No. 58-101454, a titanium (Ti) or platinum silicide (PtSi) layer is formed as a first layer on a diffusion layer of a silicon semiconductor substrate. A second layer of titanium nitride (TiN) is formed thereon, and a wiring layer of aluminum (Al) is formed on the second layer. Thus, two of TiN and Ti or PtSi
By interposing a barrier layer having a layer structure between the diffusion layer and the wiring layer, alloy spikes of Al are prevented.

[Problems to be solved by the invention]

However, when a barrier layer composed of, for example, a Ti layer and a TiN layer formed by laminating the Ti layer is used as described above, a sufficiently small contact resistance (for example, 100 Ω or less) can be obtained in a conventional semiconductor device. In addition, there is a disadvantage that good ohmic contact cannot be obtained particularly with the p ⁺ diffusion layer.

Therefore, an object of the present invention is to provide a semiconductor device in which alloy spikes are prevented by using a barrier layer composed of a Ti layer and a TiN layer formed by laminating the Ti layer as described above, to sufficiently reduce contact resistance. An object of the present invention is to provide a semiconductor device which is reduced in size and can obtain good ohmic contact with ap ⁺ diffusion layer.

[Means for solving the problem]

The object of the present invention is to form a P-type diffusion layer and a wiring layer formed on a semiconductor substrate on a titanium layer formed on the P-type diffusion layer side and a titanium layer formed on the titanium layer on the wiring layer side according to the present invention. In a semiconductor device connected to each other via a barrier layer made of a titanium nitride layer formed by controlling the surface concentration of the p-type impurity in the p-type diffusion layer to 1.4 × 10 ²⁰ cm ⁻³ or more. .

That is, as shown in FIG. 1, the p ⁺ diffusion layer 2 formed in the semiconductor substrate 1 is exposed in an opening provided in the insulating layer 3. Then, the surface of the exposed diffusion layer 2 is coated with Ti
A first barrier layer 4 made of TiN is formed, and a second barrier layer 5 made of TiN is formed on the first barrier layer 4 by being laminated on the first barrier layer. A wiring layer 6 made of Al or the like is connected to the diffusion layer 2 via the barrier layers 4 and 5. When the wiring layer 6 is connected to the diffusion layer 2 via the barrier layer composed of the Ti layer and the TiN layer formed by laminating the Ti layer, the contact resistance conventionally increases, and especially, the p ⁺ diffusion layer Although it was difficult to obtain an ohmic contact to the contact layer, the contact resistance was reduced by controlling the surface concentration of the p-type impurity in the diffusion layer to 1.4 × 10 ²⁰ cm ⁻³ or more according to the present invention, and the p ⁺ It was also found that good ohmic contact was obtained.

As a method of increasing the surface concentration of the diffusion layer, there is a method of increasing the dose amount, adoption of short-time annealing, or the like.

EXAMPLES Hereinafter, the present invention will be described based on examples.

BF ₂ ⁺ was used as an impurity species and the dose was variously changed under the condition of 50 keV, and a p ⁺ diffusion layer was formed through a 200-mm thick SiO ₂ film. The diffusion conditions were as follows. That is, 94
After heat treatment in an electric furnace at 0 ° C. for 20 minutes, a window for contact was opened in the SiO ₂ film, and heat treatment was further performed in an electric furnace at 900 ° C. for 10 minutes.

The relationship between the dose I ² and the diffusion depth x _j and dose I ² and the contact resistance [rho _S at this time are shown in respectively Figure 2. From this figure, it can be seen that the contact resistance ρ _S drops sharply when the dose I ² is between 2 × 10 ¹⁵ cm ⁻² and 3 × 10 ¹⁵ cm ⁻² .

From the results of ρ _S and x _j , the relationship between the dose I ² and the surface concentration C _S of the diffusion layer is obtained as shown in the following table.

The relationship between the surface concentration C _S and the contact resistance ρ _S is shown in FIG.
Shown in the figure. From this figure, it can be seen that if the surface concentration _CS is 1.4 × 10 ²⁰ cm ⁻³ or more, a sufficiently small contact resistance can be obtained. ○ indicates a contact resistance of 1 × 1 μm and △ indicates a contact resistance of 1 × 1.2 μm.
Each of (1) and ( ₂ ) is data in a diffusion region formed by using BF ₂ ion implantation.

On the other hand, the dose was set to 2 × 10 ¹⁵ cm ^{−2 under} the above-described conditions.
When the contact between the p ⁺ diffusion layer and the barrier layer having the two-layer structure of Ti and TiN was examined, sufficient ohmic contact was not obtained. When the dose was set to 3 × 10 ¹⁵ cm ⁻² , good ohmic contact was obtained.

Therefore results of secondary ion mass spectrometry, surface concentration C _S of the p ⁺ diffusion layer of B was found to be a boundary between the ohmic contact and a non-ohmic contact with the vicinity of 1.0~1.4 × 10 ²⁰ cm ^-3. When the surface concentration _CS was 1.4 × 10 ²⁰ cm ⁻³ or more, sufficient ohmic contact was obtained.

The barrier layer having a two-layer structure of Ti and TiN showed good ohmic contact with the n ⁺ diffusion layer.

Next, the barrier property of the two-layer structure of Ti and TiN was examined.

First, a 500Å Ti layer is formed on the diffusion layer, and then Ar: N ₂
A TiN layer having a thickness of 1000 mm was formed by reactive sputtering of = 4: 1. Then, 4,000mm thick Si-containing Al and 1μ
A laminated structure with m-thick Al was formed. Diffusion depth x _j = 0.2μ
It was examined and the n ⁺ diffusion layer and the x _j = 0.3 [mu] m of the p ⁺ diffusion layer of m, but in any case, 450 ° C., alloy spike did not occur in the 2 hours.

As can be seen from the above, Ti between the Si-containing Al and the Si substrate
By forming a barrier layer made of TiN and TiN, penetration of Al into the diffusion layer due to interdiffusion can be prevented. In addition, since the deposition of Si on the contact surface is prevented and the effective area of the contact is not reduced, the contact resistance is relatively low. Further, since p-type Si particles due to Al are not generated on the n ⁺ contact, a good ohmic contact with the n ⁺ diffusion layer can be obtained.

〔The invention's effect〕

According to the present invention, the p-type diffusion layer and the wiring layer formed on the semiconductor substrate are laminated on the titanium layer formed on the p-type diffusion layer side and the nitride layer formed on the wiring layer side by laminating the titanium layer on the titanium layer. Since they are connected to each other via the barrier layer composed of the titanium layer, the generation of alloy spikes that occurs when the p-type diffusion layer and the wiring layer are brought into direct contact can be extremely effectively prevented.

Further, the surface concentration of the p-type impurity in the p-type diffusion layer is set to 1.4 × 10
Since it is controlled to ²⁰ cm ^-3 or more, when a barrier layer composed of a titanium layer and a titanium nitride layer formed by being laminated on the titanium layer is provided between the p-type diffusion layer and the wiring layer, ,
The contact resistance can be reduced to, for example, 100Ω or less, and despite the fact that the diffusion layer is p-type,
Good ohmic contact can be obtained.

Further, the pattern can be miniaturized by increasing the surface concentration of the p-type impurity in the p-type diffusion layer.
m rules can be used.

Further, when an n ⁺ diffusion layer and a p ⁺ diffusion layer are formed on one substrate, the same barrier layer (two layers of Ti and TiN)
Layer structure), the manufacture of the device is simplified.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a main part of a semiconductor device according to an embodiment of the present invention, FIG. 2 is a graph showing a relationship between a dose amount, a diffusion depth, and a contact resistance, and FIG. 5 is a graph showing a relationship between a surface concentration and a contact resistance. In addition, in the code | symbol used for drawing, 1 ... Semiconductor substrate 2 ... Diffusion layer 4 ... First barrier layer 5 ... Titanium nitride layer 6 ... Wiring layer.

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁶ Identification code Agency reference number FI Technical display location H01L 27/06 H01L 27/08 102D 27/088 29/36

Claims (1)

(57) [Claims] 1. A p-type diffusion layer and a wiring layer formed on a semiconductor substrate, a titanium layer formed on the p-type diffusion layer side, and a titanium nitride formed on the titanium layer by laminating the titanium layer on the titanium layer. The p-type diffusion layer has a surface concentration of 1.4 × 10 ²⁰ cm.
A semiconductor device, characterized by being at least ^-3 .