CA1275332C - Multilayer contact structure - Google Patents

Multilayer contact structure

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Publication number
CA1275332C
CA1275332C CA000574384A CA574384A CA1275332C CA 1275332 C CA1275332 C CA 1275332C CA 000574384 A CA000574384 A CA 000574384A CA 574384 A CA574384 A CA 574384A CA 1275332 C CA1275332 C CA 1275332C
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Prior art keywords
layer
tinxoy
tisi2
seconds
degrees celsius
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French (fr)
Inventor
Vu Quoc Ho
Ping Kung Yang
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Nortel Networks Ltd
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Northern Telecom Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855After-treatment introducing at least one additional element into the layer
    • H01L21/76856After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28568Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising transition metals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855After-treatment introducing at least one additional element into the layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53285Conductive materials containing superconducting materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
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  • Manufacturing & Machinery (AREA)
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

Abstract of the Disclosure MULTILAYER CONTACT STRUCTURE

A method for forming a contact structure on a silicon surface comprises forming a TiSi2 layer in intimate contact with the silicon surface and a TiNxOy layer overlying the TiSi2 layer, and forming an Al alloy layer on the TiNxOy layer. The TiSi2 layer provides a good electrical contact to the silicon surface, the Al alloy layer reduces the contact resistance, and the TiNxOy layer provides a diffusion barrier to prevent interaction of the Al alloy and TiSi2 which could degrade the contact.

-i-

Description

5~

MULTILAYER CONTACT STRUCTURE
Field of the Invention This invention relates to multilayer contact structures for semiconductor devices and to methods for making such structures.

Back~round of the Invention Al Si alloys have traditionally been used to form contacts f~r CMOS integrated circuit devices. When such alloys are deposited directly on a silicon surface, some of the Al may di~use into the surface of the silicon to form ~Ispikesl~. The spikes may penetrate the silicon to a depth exceeding 0.3 microns. This is not normally a problem for CMOS devices having junctions which are much deeper than 0.3 microns. However, the trend is toward smaller CMOS devices with shallower junctions, and as the junction depth approaches 0.3 microns, some spikes will penetrate the junctions causing device failures.
Spiking can be reduced by increasing the Si content in the Al-Si alloy. However, this leads to the formation of Si precipitates which increase contact resistance. As the trend toward smaller CMOS devices also leads to smaller contact struc~ures, the effect of these precipitates on contact resistance is accentuated and the formation of such precipitates may lead to unacceptably high contact res t lS ances.
A contact structure comprising a PtSi layer in intimate contact with the silicon surface, a Ti-W alloy layer overlying the PtSi layer and an Al layer overlying the Ti-W
layer has b~en used in bipolar devices to avoid the problems described above (Ghate et al, Thin Solid Film~ ~3 (1978), P~117)~ The PtSi layer forms a good contact to the silicon surface, the Al layer lowers the contact resistance, and the Ti-W alloy acts as a diffusion barrier which prevents interaction between the Al and PtSi which could lead to deterioration of the contact.
Unfortunately, PtSi is unstable at temperatures above 550 degrees Celsius. As a result, temperatures above 550 degrees Celsius must be avoided in processing which ~ .

~ ; . '' ~ ' ' .

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follows formation of the contacts. Moreover, the Ti W
sputter targets used to deposit the Ti-W layer must be manufactured using powder metallurgy and consequently do not have the purity attainable with sputtering targets made by more conventional techniques. In addition, Ti-W films have a high compressive stress, so that Ti-W films deposited on internal surfaces of sputter deposition equipment delaminate after only a few hours of deposition causing particulate contamination. Consequently, the PtSi/Ti-W/Al contact structure is not readily applicable to the manufacture of very small CMOS devices.

Summary of the Invention This invention provides a multilayer contact structure and a method for making that contact structure which obviates or mitigates the problems described above.
One aspect of the invention provides a method for forming a contact structure on a silicon surface, the method comprising: forming a TiSi2 layer in intimate contact with the silicon surface and a TiNxoy layer overlying the TiSi2 layer; and forming an Al alloy layer on the TiNxoy layer~
The TiSi2 layer and the overlying TiNxoy lay~r may be formed by depositing a Ti layer on the silicon surface and heating the Ti layer in a N2 ambient having a low residual 2 content to cause Ti adjacent the silicon surface to react with silicon to form TiSi2 in intimate contact with the silicon surface and to cause exposed Ti to react with N2 and 2 to form TiNxoy overlying the TiSi2.
The TiNXOy layer thickness is limited to approximately 150 angstroms since fast diffusion of Si into the Ti layer causes rapid formation of TiSi2 until no further Ti is availabla for formation of TiNXo~. To form a thicker TiNxoy layer, additional Ti is deposited on the TiNxoy and this Ti is heated in a N2 ambient having a low residual 2 cont~nt. The existing TiSi2 and TiNxoy layers retard diffusion of Si rrom the Si substrate into the upper Ti layer, so most of the upper Ti layer is available for formation of TiNxoy~

Alternatively, the TiSi2 layer and the overlying TiNxOy layer may be formed in two separate and successive heating steps. A first Ti layer is deposited on the silicon surface and heated in a N2 ambient having a low residual 2 content to cause Ti adjacent the silicon surface to react with silicon to form TiSi2 and to cause exposed Ti to react with N2 and 2 to form TiNxoy. The TiNxoy is removed and a second Ti layer i~ deposited and heated in a N2 ambient having a low residual 2 content to cause exposed Ti to react with N2 and 2 to form TiNxoy overlying the TiSi2.
Alternatively, the TiNxoy layer may be provid~d on an existing TiSi2 contact by depositing a Ti layer on the TiSi2 contact and heatiny the Ti in a N2 ambient having a low residual 2 content to cause the Ti to react with N2 and 2 to form TiNxoy~
Another aspect of the invention provides a multilayer contact structure ~or making electrical contact to a silicon surface, the contact structure comprising: a TiSi2 layer in intimate contact with the silicon surface; a TiNxoy layer on the TiSi2 layer; and an Al alloy layer on the TiNxoy layer.
The Al alloy may be Al~Si, Al-Cu or Al-Ti.
; Unlike PtSi which is unstable at temperatures above 550 degrees Celsius, TiSi2 is stable at temperatures at least as high as 900 degrees Celsius. Thus, the method and contact structure of this invention permit greater flexibility in processing following the formation of contacts than the PtSi/Ti-W/Al multilayer contact method and contact structure.
Moreover, unlike the PtSi/Ti-W/Al multilayer contact method which requires both Pt and Ti-W sputter targets r the method of this invention rsquires only one Ti sputter target, and that Ti sputter target can ba made with a higher purity than ; the Ti~W sputter target required for the PtSi/Ti-W/Al multilayer contact method. Indeed, unlike the PtSi/Ti-W/Al multilayer contact method which deposits a delamination prone Ti-W film in sputter deposition equipment, the method of this invention deposits a stable Ti film which is not prone to delamination. Consequently the method of this invention is . . . ' ' : ' ' ' ` .
~ ~ ' :

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less prone to particle contamination than the PtSi/Ti-W/Al multilayer contact me~hod. Furthermore, the TiNxoy layer of this invention prov:ides a more effective diffusion barrier than the Ti-W alloy used in the PtSi/Ti-W/Al multilayer contact structure.

Brief Description of the Drawinas Embodiments of the invention are described helow by way of example only. Re~erence is made to the accompanying drawings in which:
Figures la - le are cross-sectional views of a multilayer contact structure at successive steps in its manufacture by a method according to a first embodiment; and Figures 2a 2f are cross-sectional views of a multilayer contact structure at successive steps in its manufacture by a method according to a second embodiment.

Detailed Description of _mbodiments Figures la - le illustrate a method according to a first embodiment for forming a m~ltilayer c~ntact structure on a surface 12 of a silicon substrate 10. The contact structure i~ formed on a portion of the silicon surface 12 which is exposed by a contact hole 22 formed in a SiO2 dielectric 20 on the silicon substrate 10.
In the method according to the first embodiment, a first Ti layer 30 is sputter deposited in the contact hole 22 in intimate contact with the silicon surface 12 as shown in Figure la, A 99.99% pure Ti target is used in a Varian 3180 DC magnetron sputtering unit to deposit the layer 30 to a 500 angstrom thickness.
The first Ti layer 30 is heated in an 02-depleted N2 ambient to 800 degrees Celsius for 10 seconds to cause Ti adjacent to the silicon surface 12 to react with silicon at the surface 12 to form a TiSi2 layer 32 and to cause exposed Ti to react with N2 and any residual 2 to form a first TiNxoy layer 34 overlying the TiSi2 layer 32 as shown in Figure lb. The heating is performed in an AG-210T annealing system which has been purged with N2 to reduce the 2 :

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concentration to a very low residual level, approximately 5 parts per million.
A second Ti lay~r 40 is sputter deposited on the TiNxoy layer 34 to a 500 anystrom thickness as shown in Figure lc. The second Ti layer 40 is heated in an 2-depleted N2 ambient to 800 degrees Celsius for 10 seconds to cause exposed Ti to react with N2 and any residual 2 to form an additional TiNxoy layer 42 overlying the existing TiNXo,~
layer 34 as shown in Figure ld.
An Al-Si alloy layer 50 is then sputter deposited on the additional TiNxoy lay~r 42 and patterned as shown in Figure le. The resulting structure is sintered in H2 at 450 degr~es Celsius for 30 minutes to complete the multilayer contact structure.
Figures 2a - 2f illustrate a method according to a second embodiment for forming a multilayer contact structure on a surface 12 of a silicon substrate 10. The contact structura is formed on a portion o~ the silicon surface 12 which is exposed by a contact hole 22 formed in a sio2 dielectric 20 on the silicon substrate 10 as in the ~irst embodiment.
In the method according to the second embodiment, a first Ti layer 60 is sputter deposited in the contact hole 22 in intimate contact with the silicon surface 12 as shown in Figure 2a. A 99.99% pure Ti target is used in a Varian 3180 DC magnetron sputtering unit to deposit the layer 60 to a 500 angstrom thickness.
The first Ti layer 60 is heated in an 02-depleted N2 ambient to 650 degrees Celsius for 30 seconds to cause Ti adjacent to the silicon surface to react with silicon at th~
surface to form a TiSi2 layer 62 and to cause exposed Ti to react with N2 and any residual 2 to form a first TiNxoy layer 64 overlying the TiSi2 layer 62 as shown in Figure ~b.
The TiNxoy layer 64 is etched in one part NH40H and one part H~02 in five parts H20 for 10 minutes to selectively remove the TiNxoy layer 64 and expose the TiSi2 layer 62 and sio2 dielectric 20 as shown in Figure 2c The remaining TiSi2 .: .
: : :

' ' ' ;' :' . ' lay~r 62 is heated to 800 degrees Celsius for 10 seconds to consolidate the TiSi2 layer 62.
A second Ti layer 70 is sputter deposited to a 500 a~gstrom thickness on the TiSi2 lay~r 62 as shown in Figure 2d. The second Ti layer 70 is heated in an O2-depleted N2 ambient to 800 degrees Celsius for 30 seconds to cause exposed Ti to react with N2 and any residual 2 to form a TiNxoy layer 72 overlying the TiSi2 layer 62 as shown in ~igure 2e.
An ~l-Si alloy layer B0 is then sputter deposited on the TiNxoy layer 72 and patterned as shown in Figure 2f.
The resulting structure is sintered in H2 at ~50 degrees Celsius for 30 minutes to complete the multilayer contact structure.
The method according to the second embodiment provides a smaller total thickness of TiNxoy over the sio2 dielectric 20 than does the method according to the first embodiment. This difference may be impsrtant where the iotal thickness of dielectric and metallization layers overlying the silicon device must be limited to meet performance reguiremen~s.
In the above embodiments the Ti layers 30, 40, ~0, 70 could be deposited to any thickness between 100 angstroms and 1000 angstroms providing that the processing temperatures and timas are adjusted accordinglyO The TiSi2 layers 32, 62 could be formed by heating to any temperature between 600 degrees Celsius and 1100 degrees Celsius for durations between 2 seconds and 100 seconds, and the ~iNXOy layers could be formed by heating in N2 and 2 to any temperature between 600 degrees Celsius and 1100 degrees Celsius for durations hetween 2 seconds and 100 seconds. However, it is important to note that the Ti layers 30, 40, 60, 70 will react with the underlying SiO2 dielectric 20 at these temperatures, so the SiO2 thickness, processing temperatures and processing times should be selected to avoid unwanted penetration of the sio2 dielectric 20.
The TiSi2 layer 62 could be consolidated by heating to any temperature between 600 degrees Celsius and 1100 , ~ . .

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degrees Celsius for any duration between 2 seconds and 1~0 seconds.
Further TiNxoy layers could be added to the contact structures of the first and second embodiments by depositing additional Ti over the existing TiNxoy layers and heating in an 02-depleted N2 ambient to a temperature between 600 degrees Celsius and 1100 degrees Celsius for a duration between 2 seconds and 100 seconds.
Contact structures according to the invention may also be provided by forming one or more TiNxoy layers on existing TiSi2 contacts formed in earlier processing steps.
As in the above embodiments, the TiNxoy layers may be formed by depositing a Ti layer on the TiSi~ contacts and heating the Ti in an 02-depleted N2 ambient to a temperature between 600 degrees Celsius and 1100 degrees Celsius for a duration bekween 2 seconds and 10 seconds to cause the Ti to react with N2 and any residual 2 to form TiNxoyo The proportions of N and 0 in the TiNxoy layers 34, 42, 72 will vary according to the processing times and temperatures. For the e~bodiments described above, the TiNxoy layers 34, 42, 72 are approximately 10% 0 and 45% to 50~ N.
The residual concentration of 2 in the ~ ambient used during formation of the TiNxoy layers 34, 42, 72 must ba very low, preferably less than 5 parts per million.
Otherwise, a TioX layer will form instead of the desired TiNXoy layer. In the ideal case, if 2 is elimina~ed from the N2 ambient, the TiNxOy layers which are formed ar in fact TiN layers ~i.e. x=l, y=0).
The Al-Si alloy layer 50 could be replaced by a layer of another suitable Al alloy, such as Al-Cu alloy or Al-Ti alloy.
These and other modifications are within the SCOp2 of the invention as claimed below.

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Claims (20)

1. A method for forming a contact structure on a silicon surface, the method comprising:
forming a TiSi2 layer in intimate contact with the silicon surface and a TiNxOy layer overlying the TiSi2 layer;
and forming an Al alloy layer on the TiNxOy layer.
2. A method as defined in claim 1, comprising forming the TiSi2 layer and the TiNxOy layer by:
depositing a first Ti layer on the silicon surface;
heating the first Ti layer in an O2-depleted N2 ambient to cause Ti adjacent to the silicon surface to react with silicon at the surface to form TiSi2 and to cause exposed Ti to react with N2 and any residual O2 to form TiNxOy overlying the TiSi2;
depositing a second Ti layer on the TiNxOy; and heating the second Ti layer in an O2-depleted N2 ambient to cause exposed Ti to react with N2 and any residual O2 to form a further TiNxOy layer overlying the existing TiNxOy.
3. A method as defined in claim 2, comprising;
depositing the first Ti layer to a thickness between 100 angstroms and 1000 angstroms; and heating the first Ti layer in an O2-depleted N2 ambient to a temperature between 600 degrees Celsius and 1100 degrees Celsius for a duration between 2 seconds and 100 seconds to cause Ti adjacent to the silicon surface to react with silicon at the surface to form TiSi2 and to cause exposed Ti to react with N2 and any residual O2 to form TiNxOy overlying the TiSi2.
4. A method as defined in claim 2, comprising:
depositing the second Ti layer to a thickness between 100 angstroms and 1000 angstroms; and heating the second Ti layer in an O2-depleted N2 ambient to a temperature between 600 degrees Celsius and 1100 degrees Celsius for a duration between 2 seconds and 100 seconds to cause exposed Ti to react with N2 and any residual O2 to form additional TiNxOy overlying the existing TiNxOy.
5. A method as defined in claim 1, comprising forming the TiSi2 layer and the TiNxOy layer by:
depositing a first Ti layer on the silicon surface;
heating the first Ti layer in an O2-depleted N2 ambient to cause Ti adjacent to the silicon surface to react with silicon at the surface to form TiSi2 and to cause exposed Ti to react with N2 and any residual O2 to form TiNxOy overlying the TiSi2;
removing the TiNxOy to expose the TiSi2;
depositing a second Ti layer on the TiSi2; and heating the second Ti layer in an O2-depleted N2 ambient to cause exposed Ti to react with N2 and any residual O2 to form TiNxOy overlying the TiSi2.
6. A method as defined in claim 5, comprising:
depositing the first Ti layer to a thickness of between 100 angstroms and 1000 angstroms; and heating the first Ti layer in an O2-depleted N2 ambient to a temperature between 600 degrees Celsius and 800 degrees Celsius for a duration between 2 seconds and 100 seconds to cause Ti adjacent to the silicon surface to react with silicon at the surface to form TiSi2 and to cause exposed Ti to react with N2 and any residual O2 to form TiNxOy overlying the TiSi2.
7. A method as defined in claim 6, further comprising heating the TiSi2 to a temperature between 600 degrees Celsius and 1100 degrees Celsius for a duration between 2 seconds and 100 seconds to consolidate the TiSi2 after removing the TiNxOy and before depositing the second layer of Ti.
8. A method as defined in claim 5, comprising:
depositing the second Ti layer to a thickness between 100 angstroms and 1000 angstroms; and heating the second Ti layer in an O2-depleted N2 ambient to a temperature between 600 degrees Celsius and 1100 degrees Celsius for a duration between 2 seconds and 100 seconds to cause exposed Ti to react with N2 and any residual O2 to form TiNxOy.
9. A method as defined in claim 5, comprising removing TiNxOy to expose the TiSi2 by selectively etching the TiNxOy in a mixture of NH4OH, H2O2 and H2O.
10. A method as defined in claim 1, comprising forming the TiSi2 layer and the TiNxOy layer by:
forming a TiSi2 layer in intimate contact with the silicon surface;
depositing a Ti layer on the TiSi2; and heating the Ti layer in an O2-depleted N2 ambient to cause exposed Ti to react with N2 and any residual O2 to form TiNxOy overlying the TiSi2.
11. A method as defined in claim 10, comprising:
depositing the Ti layer to a thickness between 100 angstroms and 1000 angstroms; and heating the Ti layer in an O2-depleted N2 ambient to a temperature between 600 degrees Celsius and 1100 degrees Celsius for a duration between 2 seconds and 100 seconds to cause exposed Ti to react with N2 and any residual O2 to form TiNxOy.
12. A method as defined in claim 1, further comprising sintering the Al alloy layer in H2 at 450 degrees Celsius for 30 minutes.
13. A method as defined in claim 1, comprising forming on the TiNxOy layer a layer of an Al alloy selected from the group consisting of Al-Si, Al-Cu and Al-Ti.
14. A method for forming a contact structure on a silicon surface, the method comprising:
sputter depositing a first Ti layer to a thickness of between 100 angstroms and 1000 angstroms on the silicon surface;
heating the first Ti layer in an O2-depleted N2 ambient to a temperature between 600 degrees Celsius and 1100 degrees Celsius for a duration between 2 seconds and 100 seconds to cause Ti adjacent to the silicon surface to react with silicon at the surface to form TiSi2 and to cause exposed Ti to react with N2 and any residual O2 to form TiNxOy overlying the TiSi2;
sputter depositing a second Ti layer to a thickness between 100 angstroms and 1000 angstroms on the TiNxOy;
heating the second Ti layer in an O2-depleted N2 ambient to a temperature between 600 and 1100 degrees Celsius for a duration between 2 seconds and 100 seconds to cause exposed Ti to react with N2 and any residual O2 to form additional TiNxOy overlying the existing TiNxOy; and forming an Al alloy layer on the TiNxOy layer.
15. A method for forming a contact structure on a silicon surface, the method comprising:
sputter depositing a first Ti layer to a thickness between 100 angstroms and 1000 angstroms on the silicon surface;
heating the first Ti layer in an O2-depleted N2 ambient to a temperature between 600 degrees Celsius and 800 degrees Celsius for a duration between 2 seconds and 100 seconds to cause Ti adjacent to the silicon surface to react with silicon at the surface to form TiSi2 and to cause exposed Ti to react with N2 and any residual O2 to form TiNxOy overlying the TiSi2;
removing TiNxOy to expose the TiSi2;
sputter depositing a second Ti layer to a thickness between 100 angstroms and 1000 angstroms on the TiSi2; and heating the second Ti layer in an O2-depleted N2 ambient to a temperature between 600 degrees Celsius and 1100 degrees Celsius for a duration between 2 seconds and 100 seconds to cause exposed Ti to react with N2 and any residual O2 to form TiNxOy overlying the TiSi2; and forming an Al alloy layer on the TiNxOy layer.
16. A method as defined in claim 15, further comprising heating the TiSi2 to a temperature between 600 degrees Celsius and 1100 degrees Celsius for a duration between 2 seconds and 100 seconds to consolidate the TiSi2 after removing the unreacted Ti and before depositing the second layer of Ti.
17. A method for forming a contact structure on a silicon surface, the method comprising:
forming a TiSi2 layer in intimate contact with the silicon surface:
sputter depositing a Ti layer to a thickness between 100 angstroms and 1000 angstroms on the TiSi2; and heating the Ti layer in an O2-depleted N2 ambient to a temperature between 600 degrees Celsius and 1100 degrees Celsius for a duration between 2 seconds and 100 seconds to cause exposed Ti to react with N2 and any residual O2 to form TiNxOy overlying the TiSi2; and forming an Al alloy layer on the TiNxOy layer.
18. A multilayer contact structure for making electrical contact to a silicon surface, the contact structure comprising:
a TiSi2 layer in intimate contact with the silicon surface;
a TiNxOy layer on the TiSi2 layer: and an Al alloy layer on the TiNxOy layer.
19. A contact structure as defined in claim 18, wherein the TiNxOy layer is approximately 10% O and approximately 50%
N.
20. A contact structure as defined in claim 18, wherein the Al alloy of the Al alloy layer is selected from the group consisting of Al-Si, Al-Cu and Al-Ti.
CA000574384A 1988-08-10 1988-08-10 Multilayer contact structure Expired - Fee Related CA1275332C (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5858184A (en) * 1995-06-07 1999-01-12 Applied Materials, Inc. Process for forming improved titanium-containing barrier layers

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5858184A (en) * 1995-06-07 1999-01-12 Applied Materials, Inc. Process for forming improved titanium-containing barrier layers
US6007684A (en) * 1995-06-07 1999-12-28 Applied Materials, Inc. Process for forming improved titanium-containing barrier layers

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