JPS58166770A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the dissipation and scatter of P atoms in a metal silicide film when a heat treatment is to be performed to attain diffusion of As atoms implanted by ion implantation by a method wherein the upper part of the doped silicide film is covered with a nitrogen compound film. CONSTITUTION:At the semiconductor device, the surfaces of the gate electrodes 21, 22 of the MOS type semiconductor device formed of the doped silicide film doped with the P atoms are covered with the nitrogen (N2) compound films 23, 24 of the silicide of a high melting point metal of molybdenum (Mo), etc. By covering the doped silicide film with the nitrogen compound of the silicide of the high melting point metal like this, the dissipation and scatter of the P atoms contained in said doped silicide film to be generated when the substrate is heated for formation of a PSG film at the formation process of the semiconductor device to be performed thereafter are prevented, and moreover the dissipation and scatter of said P atoms from the upper part of the substrate when the substrate is thermally treated after As ion implantation is performed for formation of source regions 25, 26 and a drain region 27 are also prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to improvements in semiconductor devices, particularly in semiconductor devices using doped silicide films for wiring films and gate electrodes connecting circuit elements.

(b) Background of the technology Recently, in MO3 type semiconductor devices, a gate electrode made of metal silicide of a compound of 81 and molybdenum (Mo) or the like, or a wiring made of a metal silicide film connecting circuit elements of the MO8 type semiconductor device. Phosphorus (P), arsenic (As),
Doped metal silicide films into which impurities such as boron (B) are introduced are being used.

(C) Prior Art and Problems FIG. 2 is a diagram showing a circuit diagram of a semiconductor device having a structure using such a doped metal silicide film, and FIG. 2 is a cross-sectional view thereof. 1st. Figure 2 shows an MOS type inverter circuit using an enhancement type MOS transistor 1 as a driver and a depletion type MOS transistor 2 as a load. 510g1ll14 for isolation between elements on substrate 3
is formed, and furthermore, a gate 81 is formed in the area defined by the 8102 film.
02 film 5 is formed. And the gate electrode of transistor 2 on the load side and the gate electrode of transistor 2 on the driver side
A connection hole 6 for connecting the first drain region to the second drain region is formed. Then, on the substrate, a gate electrode 7 of a driver side transistor and a gate electrode 8 of a load side transistor, which are made of a molybdenum silicide film doped with phosphorus CP>, are formed in a predetermined pattern.
Arsenic f is applied to the self-line using poles 7 and 8 as masks.
As) atoms are ion-implanted into the source region 9.10. and a drain region [11] are formed. By doping P into the metal silicide film in this way, the resistivity of the gate electrode 7.8 is lowered, and sodium ions (Na+) in the air (Km') pass through and enter the substrate. In addition, the connection between the drain region 11 and the gate electrode 8 is made good.

However, in the semiconductor device having the conventional structure described above, the P atoms added to the gate electrode of the semiconductor device are removed during the subsequent process of forming a PSG film to protect the surface of the semiconductor device, or the As atoms are added to the gate electrode of the semiconductor device. After ion implantation, As atoms escape to the outside during the heat treatment step for introducing As atoms to a predetermined depth. If the As atoms doped into the doped metal silicide film escape in this way, the resistivity of the gate electrode increases and the formed semiconductor device does not function properly, or the gate electrode 8 and drain region 11 The disadvantage is that the connection is insufficient.

((1) Purpose of the Invention The present invention eliminates the above-mentioned drawbacks and uses ion-implanted A to form a PSG film for protecting the surface of a semiconductor device, or for forming a source/drain region.
The object of the present invention is to provide a semiconductor device having a structure in which PIl molecules in a metal silicide film do not escape during heat treatment performed for the purpose of diffusing s atoms.

(e) Structure of the Invention In order to achieve the above object, the semiconductor device of the present invention has a semiconductor element formed on a silicon substrate, and a gate electrode constituting the semiconductor element or a wiring film connecting the semiconductor elements is doped. A semiconductor device formed of a doped silicide film is characterized in that an upper part of the doped silicide film is covered with a nitrogen compound film.

Furthermore, the present invention is characterized in that a nitride silicide film is used in place of the nitrogen compound film.

Further, the present invention is characterized in that a metal nitride film is used in place of the nitride silicide film.

(f') 91 of inventions! EXAMPLE An example of the semiconductor device of the present invention will be described in detail below with reference to the drawings.

FIG. 8 is a cross-sectional view showing the structure of the semiconductor device of the present invention;
6 to 6 are cross-sectional views showing the steps of manufacturing the semiconductor device of the present invention, FIG. 7 is a schematic diagram of a manufacturing apparatus used in forming the semiconductor device of the present invention, and FIG. 8 is a semiconductor device of the present invention. FIG. 9 is a diagram showing the concentration distribution state of impurity atoms when impurities are introduced during the manufacturing of the device. FIG. 9 is a diagram showing the state where impurities are introduced during the manufacturing of the semiconductor device of the present invention.

First, as shown in FIG. 8, the difference between the semiconductor device of the present invention and the conventional device is that the gate voltage W of the Mo5s semiconductor device is doped with P atoms and is formed of a doped silicide film.
The surface of i21 and 22 is a nitrogen 31i (Ng) compound film 28, which is a silicide of a high melting point metal such as molybdenum (MO).
24. By coating the doped silicide film with a high-melting-point metal silicide nitrogen compound, the P atoms contained in the doped silicide film can be absorbed into the PSG film in the subsequent semiconductor device formation process. They do not escape even when the substrate is heated during formation, and they also escape on the substrate when the substrate is heat treated after As ion implantation to form the source regions 25, 26 and drain regions 27. Things will disappear.

To explain the manufacturing process of such a semiconductor device step by step, first, as shown in FIG. 4, a 5102 film 82 for the number of elements #1 is formed on a P-type Si substrate 81 by thermal oxidation of the substrate. Thereafter, a Sing film 33 for a gate is formed on the nucleus plate by chemical vapor deposition (CVD). A connection hole 101 for connecting the drain region of the enhancement MOS transistor to be formed on the substrate and the gate electrode of the depletion MOS transistor is then opened using photolithography and plasma etching. Thereafter, the substrate 81 is placed on a sample mounting table 85 in a reaction chamber 84 of a sputtering apparatus shown in FIG. On the other hand, on the target installation stand 86 in the room facing the substrate, there is an MO
Good targets 37 and 81 Good targets 88
After the reaction chamber is evacuated by opening the pulp 102, the bulge 102 is closed 1; a mixed gas of argon (Ar) gas and phosphine (PHa) gas
8) Gate of Fungistar *
Form as a pole. Thereafter, the pulp 103 for introducing the mixed gas of Ar gas and PH3 gas mentioned above is closed, and the pulp 104 is opened to introduce a mixed gas of Ar and N2 in which N2 gas is mixed in a volume ratio of 5% to Ar gas.

Introduce. Then, a nitrogen compound film of MO silicide is continuously formed on the above-mentioned 9P-doped M2 silicide film. Thereafter, the substrate was taken out of the reaction chamber, and a photoresist film was coated on the substrate, and the photoresist film was formed into a predetermined pattern using a plasma etching method. Using the patterned photoresist film as a mask, carbon tetrafluoride (
The MO silicide nitrogen compound film and the P-doped MO silicide film are etched into a predetermined pattern by plasma etching using CF4) and oxygen (02) as reaction gases. In FIG. 5, 21° and 22 are gate electrodes made of a P-doped MO silicide film of the MOS transistor formed in this way, and 23.2
4 is a protective film made of a nitrogen compound of MO silicide.

Thereafter, as shown in FIG. 6, using the aforementioned gate electrodes 21 and 22 as a mask, As atoms are ion-implanted onto the substrate in the direction of the arrow, and then heat-treated. A drain region 27 is formed.

Although not shown in the subsequent part, after forming the PSG film on the substrate,
After connecting holes for connecting circuit elements formed in the Si crystal plate are opened, Al metal is vapor deposited and the Al metal is formed into a predetermined pattern to form a semiconductor device.

Here, FIG. 8 shows a P-doped M on a 81 substrate.

Sample AiS using the semiconductor device formation method of the present invention in which a silicide film is formed and a MO silicide nitrogen compound film is formed on it: A sample AiS using the semiconductor device formation method of the present invention in which a silicide film is formed and a MO silicide nitrogen compound film is formed on it: The state after heat treatment of sample B used is shown. In the figure, a solid line 41 shows the state of the P concentration distribution in the P-doped MO silicide film after the heat treatment of sample A, and a dotted line 42 shows the state of the P concentration distribution in the P-doped MO silicide film after the heat treatment of sample B. Shows the distribution of concentration. As shown in the figure, in the semiconductor device of the present invention, the concentration of P in the gate '+kn is almost constant, but in the conventional semiconductor device, P escapes at temperatures above 900°C, and the concentration of P in the gate '+kn is almost constant.
It can be seen that the M degree is decreasing. In addition, sample A is shown in Figure 9.
The figure shows the P concentration profile/L'43 in a 1ψ○ silicide film when heat treated at a temperature of 00°C for 20 minutes, but almost no facilitation is observed.

By coating the upper part of the P-doped MO silicide film with a nitrogen compound film of MO silicide, escape of the doped 9P atoms is prevented. When used as an electrode or a wiring film to connect the gate electrode and drain region of two types of MOS transistors forming an inverter, the specific resistance of the gate electrode and the wiring film does not change. A highly reliable semiconductor device can be obtained.

Furthermore, in the above embodiments, the P-doped MO silicide film was coated with a nitrogen compound of M○ silicide.
In addition, instead of MO, tung 7 ten (W), titanium (Tj-), and pyri! A high melting point metal such as v('ra) may also be used. Alternatively, an MO silicide film may be used in which impurities such as AB and B are introduced instead of P.

Also, instead of MO silicide film and nitrogen compound film, high melting point mep/L such as nitrogen and MO, nitrogen and W, nitrogen and Ta
A silicide film doped with impurities may be covered with a compound film of / and nitrogen. In addition, although the above embodiments have been described using the gate electrode as an example, it is also possible to cover a wiring film connecting semiconductor elements using a doped silicide film with a nitride silicide film or a metal nitride film. There is an effect.

(B) Effects of the invention As described above, according to the W4 structure of the semiconductor device of the present invention, the conductivity of the silicide film in the metal silicide film connecting between the gate electrode and the circuit assembly of the semiconductor device is improved. This prevents the doped impurities from escaping, resulting in the advantage that a highly reliable semiconductor device can be obtained.

Further, although the semiconductor device of the present invention has been described using an MO8 type semiconductor device as an example, the ρJ function can also be applied to a Paibov type semiconductor device in which wiring is formed using the metal silicide film described above.

[Brief Description of the Drawings] Fig. 1 is a circuit diagram of a conventional semiconductor device, Fig. 2 is a sectional view showing the structure of a conventional semiconductor device, and Fig. 8 is a sectional view showing an embodiment of the semiconductor device of the present invention. 4 to 6 are cross-sectional views showing the manufacturing process of the semiconductor device of the present invention, FIG. 7 is a diagram of an apparatus used for manufacturing the semiconductor device of the present invention, and FIGS. 8 and 9 are cross-sectional views showing the manufacturing process of the semiconductor device of the present invention. FIG. 3 is a diagram showing the impurity distribution of a silicide film used in the semiconductor device of FIG. In the figure, l is an enhancement type transistor, 2 is a depletion type transistor,
3, 31 is 81 substrate, 4, 82 is 5102 film, 5.33
uge-1sio, membrane, 6.101c connection hole,? ,8,
21.22 is a gate electrode, 9.10° 25.26 is a source region, 11.27 is a drain region, 34 is a reaction chamber, 3
5 is a sample installation stand, 86 is a target installation stand, 87 is MO
Metal, 88 is Si, target, 102.103
．． 104 is a diagram showing the impurity profile of pulp and 41°42.43 is a P-doped silicide film. Figure 1 2110 Figure 3 1b iJ 2
6th 4th rj! J Figure 6 Figure 7 03 - Section 81 Knee Beard - Medium C)? Figure 9' 0 0.2 0.4 0.6P's team is attacked by a beast; attack 7 (door m)

Claims (1)

[Claims] α) A semiconductor element is formed on a V-reconverter plate, and a gate electrode constituting the semiconductor element or a wiring film connecting between the semiconductor elements is formed of a doped silicide film. 1. A semiconductor device characterized in that an upper part of the doped silicide film is covered with an i1 compound film. (2) The semiconductor device according to claim (1), wherein the nitrogen compound film is a nitride silicide film. (8) The semiconductor device according to claim 0, wherein the nitrogen compound is a metal nitride film.