JP2574384B2 - Data stream generator - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data stream generator that handles input and output to and from a storage device in a system that processes a large amount of data in a stream.

2. Description of the Related Art Conventionally, the end of a data stream indicates the end by setting a flag when a device that reads data finishes reading all data in a specified address space.

As another method, data already stored in a storage device together with an end code is sent as a stream.

However, when the flag is set to indicate the end, processing is performed until the last data of the stream is sent from the data sending unit of the data stream generator and reaches the data writing unit of the data stream generator. Since various processes are performed by the apparatus, the processing apparatus must process the data, and then set a flag indicating that the processing apparatus itself has finished processing the final data and has output the data.
For this reason, the processing device is provided with a circuit for enabling this operation. However, in many cases, the processing device itself does not need to know the end of the stream, and the provision of the circuit is useless for the processing device itself. In addition, there are cases where the processing devices are connected and used in any number of stages. In such a case, the circuits must be provided in each of them. Therefore, there is a problem that the apparatus becomes expensive.

Further, when data stored in the storage device together with the end code is transmitted as a stream, the range of the stream is fixed, and it is difficult to flexibly change the range of the stream.

The present invention solves the above-described problems of the conventional apparatus. It is necessary to allow data in an arbitrary continuous area of a storage device to flow as a stream and a processing device that receives the stream to detect the end of the stream. The purpose is to provide a device without.

Means for Solving the Problems The present invention takes as input a start address and an end address of a continuous area that specifies data stored without including an end code in an arbitrary continuous area, from the start address to the end address. Is read from the continuous area, a specific end code is added thereto, and a data sending unit that sends the data stream as a data stream to a processing device that sequentially processes the input data stream is distinguished from the data and the end code by the processing device. A data writing unit that sequentially inputs a data stream including the end code that has been sequentially processed without writing, and writes data of the data stream that is sequentially input from a designated write start address until the end code is input. Achieves the above object by a data stream generator provided with .

According to the present invention, the data sending section generates an end code at the end of the stream to be sent, the processing device transfers the end code as normal data without being aware of the end code, and sends the end code to the data writing section. When a code is input, the data writing unit recognizes that the stream has ended, and stops writing to the storage device.

Embodiment Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a data stream generator and peripheral devices according to an embodiment of the present invention.

In FIG. 1, reference numeral 3 denotes a data stream generator for generating a data stream, which includes a data sending unit 30 for sending data and a data writing unit 31 for writing data. Reference numeral 1 denotes a host machine which is connected to a data sending section 30 and a data writing section 31 of the data stream generator 3 by an addressing line 50. Reference numeral 2 denotes a storage device for storing data, and an address data line 52 through a data bus 51.
Is connected to the data sending unit 30 and is connected to the data writing unit 31 by the address data line 53. The data sending unit 30 is connected to the processing device 4 through a stream output line 54, and the data writing unit 31 is connected to the processing device 4 through a stream input line 55. 40 and 41 are an input buffer and an output buffer in the processing device 4. Reference numeral 56 denotes a processing end signal line for notifying the host machine 1 of the end of the processing.

FIG. 2 is a block diagram showing a detailed structure of the data sending unit 30 in FIG.

In the figure, an address counter 301 is a counter to which a reading start address is sent from the host machine 1 via an addressing line 50. The end address storage latch 302 is a latch into which the read end address is sent from the host machine 1 via the addressing line 50.
The end code storage latch 303 is a latch into which a read end code is sent from the host machine 1 through the addressing line 50. Reference numeral 304 denotes a comparator which compares the value of the address counter 301 with the value of the end address storage latch 302 and sends the result to the data selector 305. Data selector 305
Is a selector that switches between the data transmitted from the storage device 2 through the address data line 52 and the end code in accordance with the result of the comparator 304, and outputs the data from the stream output line 54.

FIG. 3 is a block diagram showing a detailed structure of the data writing unit 31 in FIG.

In the figure, a write start address is sent to the address counter 311 from the host machine 1 via the address designation line 50. In the end code storage latch 312,
An end code is sent from the host machine 1 through the addressing line 50.

A comparator 313 compares the end code stored in the end code storage latch 312 with the stream data sent from the stream input line 55. A latch 314 temporarily holds data input from the stream input line 55 and writes the data to the storage device 2 through the address data line 53.

The output of the address counter (311) returns to the addressing line (50) in order to know the address when the host machine (1) has finished writing.

The operation of the above configuration will be described below.

Through the addressing line 50 by the host machine 1,
The read start address, the read end address, and the end code are input to the address counter 301, the end address storage latch 302, and the end code storage latch 303 of the data sending unit 30, respectively. Further, the host machine 1 inputs a write start address and an end code to the address counter 311 and the end code storage latch 312 of the data writing unit 31 via the address designation line 50, respectively. here,
The end codes input to the data sending unit 30 and the data writing unit 31 are the same.

When all of the above data is input, the data sending unit 30
Sends the read start address to the storage device 2 via the address data line 52, reads the data existing at that address through the address data line 52, and
From 305, the data is output to the processing device 4 through the stream output line 54. Next, the same operation is performed by incrementing the address counter 301. By repeating the above operation, the data is sent to the processing device 4 as a stream.

There are two cases where such an operation stops. One is when the input buffer 40 of the processing device 4 is full. At this time, the address bus 301 is left as it is, the data bus 51 is released, and when the input buffer 40 becomes empty, When the bus 51 can be acquired again, the address counter 301 is incremented and the above operation is repeated again.

The other is a case where the comparator 304 detects a match between the value of the address counter 301 and the value of the end address storage latch 302. In this case, the data at the address indicated by the address counter 301 is sent as the last data to the stream output line 5.
After that, the end code stored in the end code storage latch 303 is output to the stream output line 54.
Is completed.

The data writing unit 31 includes an output buffer 41 of the processing device 4.
When data is input to, the data bus 51 is obtained,
If acquired, the data in the output buffer 41 is read into the latch 314, the address indicated by the address counter 311 is sent to the storage device 2 through the address data line 53, and the content of the data in the latch 314 is written to that address.
Next, the same operation is performed by incrementing the address counter 311. By repeating the above operation,
The processed data is written to the storage device 2 one after another.

There are two cases where this operation is stopped. One is when the output buffer 41 becomes empty.In this case, the address counter 311 is left as it is, the data bus 51 is released, and when data is input to the output buffer 41, the data bus 51 is re-established. Acquire and repeat the above operations.

The other is that the comparator 313 has an end code storage latch 312
And the data input from the stream input line 55 match. In this case, the write operation is terminated, and the processing is terminated by the host machine 1 via the processing end signal line 56. To inform. The host machine 1 includes an address counter 311 of the data writing unit 31.
And the address at the end of writing can be known.

As described above, in the present embodiment, the processing device 4
Since there is no need to detect the end of the data stream, the hardware configuration is simplified. For the same reason, by setting a new address in the data stream generator 3, the next stream can be poured as it is without resetting the processing device 4.

Note that the end code may be fixed and stored in a ROM (ROM) and not sent from the host machine 1.

Effect of the Invention As described above, the data stream generator according to the present invention has a function of flowing an end code to the end of the stream, and detects the end of the stream by detecting the end code. It is not necessary to be aware of the end code, that is, the end of the stream can be easily detected without providing a means for detecting the end of the stream. Further, since the end code is not previously stored in the data stored in the storage device, the range to be transmitted as a stream is not fixed, and the range to be transmitted can be flexibly changed. .

[Brief description of the drawings]

FIG. 1 is a block diagram mainly showing a data stream generator according to one embodiment of the present invention, FIG. 2 is a block diagram of a data sending section of the data stream generator, and FIG. 3 is data of the data stream generator. It is a block diagram of a writing part. DESCRIPTION OF SYMBOLS 1 ... Host machine, 2 ... Storage device, 3 ... Data stream generator, 30 ... Data sending part, 31 ... Data writing part, 4 ... Processing device, 40 ... Input buffer, 41 ...
... Output buffer, 50 ... Address designation line, 51 ... Data bus, 52,53 ... Address data line, 54 ... Stream output line, 55 ... Stream input line, 56 ... Process end signal line, 301 ... ... Address counter, 302 ... End address storage latch, 303 ... End code storage latch, 304 ... Comparator, 305 ... Data selector, 311 ... Address counter, 312 ... End code storage latch, 313 ... Comparison Bowl, 31
4 …… Latch.

 ────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Kenichi Ueda 1006 Kazuma Kadoma, Kadoma City, Osaka Inside Matsushita Electric Industrial Co., Ltd. (56) References JP-A-57-85135 (JP, A)

Claims (1)

(57) [Claims] An input of a start address and an end address of a continuous area for specifying data stored in an arbitrary continuous area without including an end code, and the data from the start address to the end address is input to the continuous area. And a data sending unit that sends a data stream to a processing device that sequentially processes the input data stream as a data stream, and that the data and the end code are sequentially processed without distinguishing between the data and the end code. A data writing unit for sequentially inputting the data stream including the end code, and writing data of the data stream sequentially input from the specified write start address until the end code is input, Data stream generator.