JP2553646B2 - Color subcarrier generator - Google Patents

Description

FIELD OF THE INVENTION The present invention relates to a color subcarrier generator for a component VTR.

Conventional technology In the component VTR for broadcasting, when the video signal recorded in the field is transmitted to the studio as a composite video signal and applied to the TBC device (time axis correction device) on the studio side, the composite signal to be composited on the transmission side The color subcarrier of must be following the jitter of the horizontal synchronizing signal in the video signal.

As a conventional example of such a color subcarrier generating device, there is a device configured as a PLL circuit as shown in FIG. In the figure, 2 is a phase comparator (PC), 3 is a low pass filter (LPF), 4 is a variable frequency oscillator (VCO), and 18 and 19 are frequency dividers with frequency division ratios of 1 / N and 1/4, respectively. Is.

In the conventional color subcarrier generating device configured as described above, the oscillation output SO (= 4fsc =
Nfh) (fsc is a color sub-carrier frequency and fh is a horizontal frequency) is 1 / N in the 1 / N frequency divider 18 (N in the case of an NTSC signal)
= 910), and the divided output Ph ′ is the phase comparator 2
Then, the phase is compared with the horizontal synchronizing signal Ph separated from the reproduced video signal, and the comparison output is supplied to the variable frequency oscillator 4 through the low pass filter 3. With the above PLL 20, the oscillation output SO of the variable frequency oscillator 4 is synchronized with the horizontal synchronizing signal Ph. Further, this oscillation output SO is divided into 1/4 by the 1/4 divider 19 and the divided output SC (= fsc) synchronized with the horizontal synchronizing signal Ph
Is obtained.

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention However, in the conventional configuration as described above, when a large phase difference occurs between the reproduction synchronization signal Ph and the frequency-divided output Ph ′ due to the skew generated when the reproduction head of the VTR is switched, reproduction is performed. Until you lock in (synchronize)
The phase of the color subcarrier, which is the frequency-divided output CS of the 1/4 frequency divider 19, is also shifted. Due to the phase shift of the color subcarrier, there is a problem that color unevenness may occur in the upper part of the monitor screen even through the TBC circuit on the studio side depending on the amount of skew.

In view of the above problems, the present invention does not cause color unevenness in the upper part of the monitor screen even through the TBC circuit on the studio side,
An object of the present invention is to provide a color subcarrier generating device that can obtain a good image.

Means for Solving the Problem In order to achieve this object, according to the present invention, an output obtained by dividing an oscillation output of a variable frequency oscillating means by a dividing means and a horizontal synchronizing signal separated from a reproduced video signal are phase comparing means. Phase comparison is performed, the variable frequency oscillating means is controlled by the comparison output to configure the PLL means, and the horizontal synchronizing signal after head switching resets or presets the frequency dividing means to correct the skew error, and the frequency dividing means LALT signal generating means for generating an alternating signal (referred to as LALT signal) for each horizontal scanning line from the output signal of, and the phase inversion of the output of the dividing means (the same frequency as the color subcarrier) based on the LALT signal. It is a color subcarrier generating device including a phase inverting means.

Further, according to the present invention, the output obtained by dividing the oscillation output of the variable frequency oscillating means by the dividing means and the horizontal synchronizing signal separated from the reproduced video signal are phase-compared by the phase comparing means, and the comparison output outputs the variable frequency. The oscillation means is controlled, the PLL means is configured, and the skew detection means for monitoring the horizontal synchronization signal generation interval is provided. When the skew is detected by the skew detection means, the frequency division means is reset by the subsequent horizontal synchronization signal. Alternatively, a skew error is preset to correct the skew error, and an LALT signal generating means for generating an alternating signal (called a LALT signal) for each horizontal scanning line from the output signal of the frequency dividing means, and a frequency dividing means based on the LALT signal from the frequency dividing means. It is a color sub-carrier generation device comprising phase inversion means for inverting the phase of the frequency-divided output (the same frequency as the color sub-carrier).

With the above-described configuration, the present invention forcibly resets the frequency divider before and after the head switching time point at which the skew occurs, so that the frequency division output Ph 'and the horizontal synchronization signal Ph due to the skew are generated.
The phase difference between and is strongly eliminated, and the phase fluctuation of the PLL circuit due to skew is eliminated. Further, in the present invention, a frequency-divided signal having the same frequency as that of the color subcarrier, which does not invert the phase for each horizontal scanning line, is obtained from the frequency divider, and the LALT signal (1H
The color subcarrier is obtained by inverting the phase based on the alternating signal).

First Embodiment FIG. 1 is a block diagram of a color subcarrier generator synchronized with a horizontal synchronizing signal in the first embodiment of the present invention. In FIG. 1, the SW circuit 1 is normally connected to the H side and the phase comparator 2 (PC) compares the phase of the horizontal synchronizing signal Ph separated from the reproduced video signal with the phase of the frequency division output Ph '. This comparison output is supplied to the variable frequency oscillator 4 (VCO) through the low pass filter 3 (LPF). The oscillation output SO (= 4fsc = Nfh) of the variable frequency oscillator 4 (fsc is the color sub-carrier frequency and fh is the horizontal frequency) is 1 / N in the 1 / N frequency divider 5 (in the case of NTSC, it is , N = 910), and the divided output Ph ′ is created and applied to the phase comparator 2.
With the PLL 20 having the above configuration, the oscillation output SO of the variable frequency oscillator 4 is synchronized with the horizontal synchronizing signal Ph. The skew detector 6 is composed of a mono multivibrator (MM) 7, and based on the head switching signal (Head SW),
Generates SW drive pulse (SW) and connects it to the L side of SW circuit 1. The 1 / N frequency divider 5 is reset by the horizontal synchronizing signal Ph that arrives while the SW circuit 1 is connected to the L side. L
The ALT signal generation circuit 8 is a circuit that generates an LALT signal that alternates every 1H, and includes a toggle circuit 9 and a latch circuit 10. The phase inversion circuit 11 is composed of, for example, an exclusive OR (EXOR) 12, and based on the LALT signal, phase inverts the fsc signal of the 1/4 frequency division output created by the 1 / N frequency divider 5 to generate a color sub signal. This is a circuit that obtains a carrier wave (SC).

Detailed timing will be described with reference to FIG. Normal VT
The skew due to R is generated by the horizontal synchronizing signal before and after head switching as shown in the figure. Therefore, the MM7 creates a SW signal as shown in FIG. 7C, extracts the horizontal sync signal immediately after head switching from the horizontal sync signal shown in FIG. Reset the N divider 5. When the phase of PLL20 is synchronized,
The horizontal synchronizing signal Ph shown in (a) and the frequency division output P shown in (e)
Although h'has the same phase as Ph'1, Ph'2, Ph'5, Ph'6, it causes a phase shift like Ph'3 in the skew generation region. However, when a reset pulse is applied to the 1 / N frequency divider 5, the phase shift is instantly corrected like Ph'4. In this way, a PLL loop that is not affected by skew is constructed.

Next, the operation of the LALT signal generation circuit will be described. As shown in (f), the pulse T1 generated at the substantially center of the adjacent horizontal synchronizing signals Ph is obtained from the 1 / N frequency divider 5 and supplied to the toggle circuit 9 to generate the pulse as shown in (g). Get the Toggle signal. Further, from the 1 / N frequency divider 5 to the horizontal synchronization signal P as shown in (h)
Generate pulse T2 near h and use the latch circuit 10 to
The gle signal is latched by the pulse T2 to obtain the LALT signal shown in (i). By doing so, it is possible to obtain a LALT signal that alternates stably every 1H even if there is a skew.

Here, the internal structure of the 1 / N frequency divider 5 is shown in FIG. 1 / N
Since the frequency divider 5 is a 910 frequency divider, the frequency divider 5 has 10
It is composed of a bit counter 13 and a decoder 14. The 10-bit counter 13 is a counter that divides the clock input SO and outputs each stage state (1/2, 1/4, ...
..., 1/1024) is supplied to the decoder 14 as an address. When the address value becomes 909 as a decimal number, the decoder 14 outputs a DEC pulse and supplies it to the LOAD terminal of the 10-bit counter 13, and when the next clock arrives, each stage of the 10-bit counter 13 Is set to 0 to configure the 910 frequency divider. Moreover, each stage of the 10-bit counter 13 can be forcedly set to 0 by a reset signal from the outside. 10-bit counter 13
Stage output (1/4) is used as the fsc signal at the same frequency as the color subcarrier. Also, P used in FIG.
The h'signal, the pulse T1 and the pulse T2 are generated by the decoder 14. The fsc signal is a signal that repeats L, H, L, H every 2 clocks, and 4 clocks are one sequence. However, since the division ratio N of the 1 / N frequency divider 5 is 910, 910/4
= 222.5, which is indivisible. That is, the DEC signal disturbs the above sequence every time it is loaded (every 1H).

As shown by the diagonal lines in FIG. 4B, the low duty of the fsc signal is widened every 1H. In this explanation, the DEC shown in (A) is shown when the PLL circuit is locked.
It is assumed that the signal occurs near the horizontal sync signal Ph. By the way, in the operation of the phase inverting circuit 12 shown in FIG. 1, as shown in FIGS. 4 (C) and 4 (D), the phase of the fsc signal is inverted by the LALT signal to produce the SC signal. By doing so, a phase-continuous SC signal can be obtained even from an fsc signal having a phase discontinuity point. Furthermore, since the starting phase of the fsc signal immediately after the DEC signal is fixed every 1H, the 1 / N frequency divider 5 is reset in the skew generation area, and the number of clocks in the 1H section changes. , A stable color subcarrier SC with phase inversion every 1H is always obtained.

In the above description, the case where the 1 / N frequency divider 5 is reset has been described, but the same effect can be obtained even if the frequency divider is set to a certain value.

Next, an embodiment of another skew detector different from the skew detector shown in FIG. 1 will be described with reference to FIGS. The skew detector 6 is a mono multivibrator (M.
M.) 15, 16 and a latch circuit 17. As shown in FIG. 6, the horizontal synchronizing signal Ph is supplied to the MM15 and is triggered by the rising edge of the horizontal synchronizing signal to generate a pulse Pa slightly shorter than the 1H section. MM16 is a pulse that is triggered by the trailing edge of pulse Pa and straddles the next horizontal sync signal.
Pb is created. The latch circuit 17 latches the pulse Pb to the horizontal synchronizing signal at the rising edge to obtain the SW signal as shown in FIG. This SW signal is a pulse which falls at the horizontal synchronizing signal Ph immediately after the skew is generated, and usually becomes a pulse which rises after one horizontal scanning period. By using the circuit configured as described above as the skew detector 6 of FIG. 1, the horizontal synchronizing signal Ph immediately after the occurrence of skew can be used as the reset of the frequency divider. Even if the above-mentioned configuration is used, the same effects of the present invention as in FIG. 1 can be obtained.

EFFECTS OF THE INVENTION As described above, according to the present invention, it is possible to obtain a color subcarrier that faithfully follows the jitter of the reproduced video signal from the VTR even if there is a skew. When the TBC circuit is passed through, a problem such as uneven color on the upper part of the monitor screen does not occur and a good image can be obtained.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a waveform diagram required for explaining the operation of FIG. 1, FIG. 3 is a diagram showing a main part of a frequency divider, and FIG. 4 is FIG. , FIG. 5 is a waveform diagram required for explaining the operation, FIG. 5 is a block diagram showing a second embodiment of the skew detecting means, FIG. 6 is a waveform diagram required for explaining the operation of FIG. 5, and FIG. It is a block diagram of a prior art example. 4 ... Variable frequency oscillator, 5 ... Divider, 13 ... 10-bit counter, 14 ... Decoder, 2 ... Phase comparator, 20 ...
… PLL, 6… Skew detector, 7, 15, 16… Mono multivibrator, 17… Latch circuit, 1… SW circuit, 8…
... LALT signal generating means, 11 ... phase inverting means, 9 ... toggle circuit, 10 ... latch circuit.

Claims (4)

(57) [Claims] 1. An output obtained by dividing an oscillation output of a variable frequency oscillating means by a frequency dividing means and a horizontal synchronizing signal separated from a reproduced video signal are phase-compared by a phase comparing means, and the variable frequency oscillation is made by the comparison output. Means for controlling PLL means, and resetting or presetting the frequency dividing means by the horizontal synchronizing signal after head switching to correct skew error, and every horizontal scanning line from the output signal of the frequency dividing means. LALT signal generating means for generating a signal (referred to as LALT signal) that alternates with, and phase inverting means for inverting the phase of the output of the frequency dividing means (the same frequency as the color subcarrier) based on the LALT signal. A color sub-carrier generator characterized by obtaining a sub-carrier. 2. The LALT signal generating means is composed of a toggle circuit and a latch circuit, and while the PLL means is locked to the horizontal synchronizing signal, it divides the first pulse signal at the timing substantially in the center of the adjacent horizontal synchronizing signals. The first pulse signal is supplied to the toggle circuit by the frequency dividing means to obtain the toggle means, and the second pulse signal at the timing near the horizontal synchronizing signal from the frequency dividing means is supplied to the latch circuit. 2. The color subcarrier generator according to claim 1, wherein the toggle signal is latched as a latch clock to generate a LALT signal. 3. An output obtained by dividing the oscillation output of the variable frequency oscillating means by the frequency dividing means and a horizontal synchronizing signal separated from the reproduced video signal are phase-compared by phase comparison means, and the variable frequency oscillation is made by the comparison output. When the skew is detected by the skew detecting means and the skew detecting means monitors the generation interval of the horizontal synchronizing signal, the means is controlled and the PLL means is constituted. LALT signal generating means for resetting or presetting the frequency dividing means to correct a skew error, and generating a signal (referred to as LALT signal) alternating every horizontal scanning line from the output signal of the frequency dividing means, and the LALT signal. A color subcarrier generating device comprising a phase inverting means for inverting the phase of the frequency-divided output (the same frequency as the color subcarrier) from the frequency dividing means based on the above 4. The LALT signal generating means is composed of a toggle circuit and a latch circuit, and in a state where the PLL means is locked to the horizontal synchronizing signal, the first pulse signal at the timing substantially in the center of the adjacent horizontal synchronizing signals is divided. The first pulse signal is supplied to the toggle circuit by the frequency dividing means to obtain the toggle signal, and the second pulse signal from the frequency dividing means at the timing near the horizontal synchronizing signal is supplied to the latch circuit. 4. The color subcarrier generator according to claim 3, wherein the toggle signal is latched as a latch clock to generate a LALT signal.