JP2552514Y2 - Hybrid integrated circuit - Google Patents

Hybrid integrated circuit

Info

Publication number
JP2552514Y2
JP2552514Y2 JP6912591U JP6912591U JP2552514Y2 JP 2552514 Y2 JP2552514 Y2 JP 2552514Y2 JP 6912591 U JP6912591 U JP 6912591U JP 6912591 U JP6912591 U JP 6912591U JP 2552514 Y2 JP2552514 Y2 JP 2552514Y2
Authority
JP
Japan
Prior art keywords
substrate
lid
integrated circuit
hybrid integrated
fixed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP6912591U
Other languages
Japanese (ja)
Other versions
JPH0521454U (en
Inventor
伸一 豊岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP6912591U priority Critical patent/JP2552514Y2/en
Publication of JPH0521454U publication Critical patent/JPH0521454U/en
Application granted granted Critical
Publication of JP2552514Y2 publication Critical patent/JP2552514Y2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【考案の詳細な説明】[Detailed description of the invention]

【0001】[0001]

【産業上の利用分野】本考案は混成集積回路に関し、特
に高集積化あるいは小型化に伴う多数の外部リード端子
を有した混成集積回路の外部リード端子の固定構造に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit, and more particularly, to a structure for fixing external lead terminals of a hybrid integrated circuit having a large number of external lead terminals accompanying high integration or miniaturization.

【0002】[0002]

【従来の技術】一般的に混成集積回路は図3に示す如
く、基板(11)上に形成された導電路(12)に複数
の回路素子(13)を固着して所望機能の回路を形成
し、基板(11)の周端部に延在された導電路(12)
に外部リード端子(14)を半田等のろう材により固着
接続して電子部品として種々の機器に用いられている。
2. Description of the Related Art Generally, as shown in FIG. 3, in a hybrid integrated circuit, a plurality of circuit elements (13) are fixed to a conductive path (12) formed on a substrate (11) to form a circuit having a desired function. And a conductive path (12) extending around the peripheral end of the substrate (11).
The external lead terminals (14) are fixedly connected to each other with a brazing material such as solder or the like, and are used as electronic components in various devices.

【0003】一方、最近では複数のメモリーIC等の搭
載により外部回路と接続するための複数の外部リード端
子が基板の少なくとも二側辺あるいは四側辺から導出さ
せた混成集積回路が存在する。基板(11)に金属基板
(絶縁樹脂コートされたもの)を用いた混成集積回路で
あっては、外部リード端子の形状は基板(11)のエッ
ヂとのショートを防止すべく、導電路(12)と接続さ
れる接続面と外部回路との接続面とが略平行となる様に
L字型に折曲げ形成されている。
On the other hand, recently, there is a hybrid integrated circuit in which a plurality of external lead terminals for connecting to an external circuit by mounting a plurality of memory ICs or the like are led out from at least two sides or four sides of a substrate. In the case of a hybrid integrated circuit using a metal substrate (coated with an insulating resin) on the substrate (11), the shape of the external lead terminals is set so as to prevent a short circuit with the edge of the substrate (11). ) Is bent in an L-shape so that the connection surface to be connected to the external circuit is substantially parallel to the connection surface to be connected to the external circuit.

【0004】そして、外部リード端子(14)の接合部
分の固着強度を向上させるために基板(11)とケース
材(15)との空間部分にエポキシ樹脂等の樹脂を充填
(16)している。
The space between the substrate (11) and the case material (15) is filled with a resin such as an epoxy resin (16) in order to improve the fixing strength of the joint of the external lead terminals (14). .

【0005】[0005]

【考案が解決しようとする課題】図3に示すような混成
集積回路であっては、上述したような封止樹脂層で外部
リード端子の接合部を強化する必要性はない。なぜなら
ば、外部リード端子の接合面積を十分に確保でき固着強
度が低下することがないからである。しかしながら、複
数のメモリーIC等を搭載した高集積化の混成集積回路
であっては、小型化に伴い外部リード端子間、即ち、リ
ード端子固着パッドピッチが著しく接近して十分な強度
が得られず作業中等において剥離する問題があった。特
にパッドピッチが1.78mm以下のものでは多少の外
力が加わっただけで剥離する場合がある。
In the hybrid integrated circuit as shown in FIG. 3, there is no need to strengthen the joint of the external lead terminals with the sealing resin layer as described above. This is because the bonding area of the external lead terminals can be sufficiently secured and the fixing strength does not decrease. However, in a highly integrated hybrid integrated circuit on which a plurality of memory ICs and the like are mounted, a sufficient pitch between external lead terminals, that is, a lead terminal fixing pad pitch is remarkably reduced due to miniaturization, and sufficient strength cannot be obtained. There was a problem of peeling during operation or the like. In particular, when the pad pitch is 1.78 mm or less, peeling may occur only by application of a slight external force.

【0006】かかる、リード端子の接合部分の剥離を防
止するために、従来例で述べた如く、ケース材と基板間
の空間に樹脂を充填しリード端子の固着部分を強固にし
て剥離を防止している。しかし、外部リード端子が基板
の二側辺あるいは四側辺から導出される高集積化の混成
集積回路では、外部リード端子が導出された一辺毎に樹
脂を充填し、硬化させる夫々の工程が必要であり、外部
リード端子の接合部分を補強する工程だけで数時間必要
となり作業工程を著しく煩雑としていた。
[0006] In order to prevent the peeling of the joint portion of the lead terminal, as described in the conventional example, the space between the case material and the substrate is filled with a resin so that the fixed portion of the lead terminal is strengthened to prevent the peeling. ing. However, in a highly integrated hybrid integrated circuit in which the external lead terminals are derived from two or four sides of the substrate, it is necessary to fill and cure the resin for each side from which the external lead terminals are derived, respectively. This requires several hours only in the step of reinforcing the joints of the external lead terminals, which significantly complicates the working process.

【0007】又、従来構造の混成集積回路では、ケース
材固着前に外部リード端子を基板上に半田付けする必要
があるために、リード端子固着時に発生した半田ボール
が基板中央方向へ飛び込んで不良となる不具合が生じる
場合がある。
Further, in the hybrid integrated circuit having the conventional structure, it is necessary to solder the external lead terminals onto the substrate before the case material is fixed, so that the solder balls generated at the time of fixing the lead terminals jump into the center of the substrate and have a defect. May occur.

【0008】[0008]

【課題を解決するための手段】本考案は、上述した課題
に鑑みて為されたものであり、基板上に形成された所望
形状の導電路と、前記導電路上に搭載された複数の回路
素子と、前記基板に固着され前記回路素子を密封封止す
る蓋体と、前記基板の終端部に固着され且つ前記蓋体と
所定の間隔離間配置された枠材と、前記離間領域に前記
導電路を延在して形成した固着パッドに固着された外部
回路と接続するための複数の接続体と、前記離間領域に
充填され前記接続体の接続部分を封止固定する封止樹脂
層とを具備することを特徴としている。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and has a conductive path having a desired shape formed on a substrate and a plurality of circuit elements mounted on the conductive path. A lid fixed to the substrate and hermetically sealing the circuit element; a frame fixed to the terminal end of the substrate and arranged at a predetermined distance from the lid; and a conductive path formed in the separation region. A plurality of connecting bodies for connecting to an external circuit fixed to a fixing pad formed by extending the sealing pad, and a sealing resin layer filled in the separation region to seal and fix a connecting portion of the connecting body. It is characterized by doing.

【0009】また、この考案に係わる混成集積回路にお
いて、前記固着パッドは少なくとも前記基板の相対向す
る側辺終端付近に形成されたことを特徴としている。さ
らに、この考案に係わる混成集積回路において、前記接
続体として外部リード端子を用いたことを特徴としてい
る。
Further, in the hybrid integrated circuit according to the present invention, the fixing pad is formed at least near the end of the opposite side of the substrate. Further, in the hybrid integrated circuit according to the present invention, an external lead terminal is used as the connection body.

【0010】[0010]

【作用】以上のように構成される混成集積回路において
は、混成集積回路基板上に固着される外部リード端子の
固着部分は、回路素子を密封封止する蓋体と基板の終端
部に固着された枠材との離間領域に配置されることにな
り、かかる離間領域に封止樹脂層を充填するだけで外部
リード端子の固着部分の補強が行える。その結果、外部
リード端子が基板の二側辺以上の辺から導出する場合で
あっても、1回の樹脂封止工程で全て外部リード端子の
固着部分を補強できることになる。
In the hybrid integrated circuit constructed as described above, the fixed portion of the external lead terminal fixed on the hybrid integrated circuit board is fixed to the lid for hermetically sealing the circuit element and the terminal end of the board. Thus, the fixed portion of the external lead terminal can be reinforced only by filling the sealing region with the sealing region. As a result, even when the external lead terminals are led out from two or more sides of the substrate, all the fixed portions of the external lead terminals can be reinforced by one resin sealing step.

【0011】[0011]

【実施例】以下に図1及び図2に示した実施例に基づい
て本考案を説明する。図1および図2に示す如く、本考
案の混成集積回路は、基板(1)と、その基板(1)上
に形成された導電路(2)と、導電路(2)上に搭載さ
れた複数の回路素子(3)と、それらの回路素子(3)
を密封封止する蓋体(4)と、基板(1)の終端部に固
着された枠材(5)と、枠材(5)と蓋体(4)間の離
間領域の基板(1)上に固着された外部リード端子
(6)と、離間領域の空間部分に充填された封止樹脂層
(7)とから構成されている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the embodiments shown in FIGS. As shown in FIGS. 1 and 2, the hybrid integrated circuit of the present invention is mounted on a substrate (1), a conductive path (2) formed on the substrate (1), and a conductive path (2). A plurality of circuit elements (3) and their circuit elements (3)
(4) for hermetically sealing, a frame (5) fixed to the terminal end of the substrate (1), and a substrate (1) in a space between the frame (5) and the lid (4). It comprises an external lead terminal (6) fixed thereon, and a sealing resin layer (7) filled in a space portion of the separated area.

【0012】基板(1)はセラミックス基板あるいは金
属基板等の通常混成集積回路に用いられている基板が用
いられる。本実施例では、熱放散性、ノイズ等を考慮し
てアルミニウム基板が用いられている。かかるアルミニ
ウム基板の一主面上に所望形状の導電路(2)が形成さ
れている。この導電路(2)は銅箔とエポキシ樹脂ある
いはポリイミド樹脂とがあらかじめ一体化されたクラッ
ド材を基板(1)上に貼着した後、銅箔を周知の方法に
よりエッチングして形成される。
As the substrate (1), a substrate usually used for a hybrid integrated circuit such as a ceramic substrate or a metal substrate is used. In this embodiment, an aluminum substrate is used in consideration of heat dissipation, noise, and the like. A conductive path (2) having a desired shape is formed on one main surface of the aluminum substrate. The conductive path (2) is formed by attaching a clad material in which a copper foil and an epoxy resin or a polyimide resin are integrated in advance on the substrate (1), and then etching the copper foil by a known method.

【0013】かかる導電路(2)の所望位置にはトラン
ジスタ、抵抗、コンデンサーあるいはメモリーIC等の
複数の回路素子(3)が固着搭載され、近傍の導電路と
電気的に接続されている。それらの複数の回路素子
(3)は樹脂製の蓋体(4)で密封封止される。蓋体
(4)はエポキシ系樹脂によって略箱状に形成され、上
述したように回路素子(3)を全て密封するように基板
(1)上に固着される。また、蓋体(4)は基板(1)
の外寸よりも小さく形成されており、基板(1)上に蓋
体(4)を固着した場合に基板(1)の終端辺と蓋体
(4)間では基板(1)の一部分が枠状に露出されるこ
とになる。
A plurality of circuit elements (3) such as transistors, resistors, capacitors or memory ICs are fixedly mounted at desired positions of the conductive path (2), and are electrically connected to nearby conductive paths. The plurality of circuit elements (3) are hermetically sealed with a resin lid (4). The lid (4) is formed in a substantially box shape by an epoxy resin, and is fixed on the substrate (1) so as to seal all the circuit elements (3) as described above. The lid (4) is the substrate (1)
When the lid (4) is fixed on the substrate (1), a part of the substrate (1) is formed between the terminal side of the substrate (1) and the lid (4). Will be exposed.

【0014】さらに、基板(1)の終端辺には枠状の枠
材(5)が固着され、この枠材(5)と蓋体(4)間に
は所定間隔の離間部分が形成されることになる。これら
蓋体(4)と枠材(5)とは夫々分離した個別の部品で
あってもよいが、基板(1)上に固着する場合蓋体
(4)と枠材(5)とは同時工程で固着するために本実
施例では夫々のコーナ部で連結体(8)によって一体化
されている。
Further, a frame-shaped frame member (5) is fixed to the terminal side of the substrate (1), and a predetermined space is formed between the frame member (5) and the lid (4). Will be. The lid (4) and the frame material (5) may be separate and separate parts, respectively. However, when they are fixed on the substrate (1), the lid (4) and the frame material (5) are In the present embodiment, each of the corners is integrated by a connecting body (8) for fixing in the process.

【0015】ところで、上述した離間部分に複数の外部
リード端子(6)が配置される。即ち、導電路(2)が
延在されるその先端部の固着パッド(2A)は蓋体
(4)と枠材(5)とで形成される離間領域部分に延在
配置されている。更に述べると、固着パッド(2A)は
基板(1)の少なくとも相対向する二側辺あるいは四側
辺に延在形成され、集積密度及び基板サイズによってそ
れらが選択される。本実施例では基板(1)の四側辺か
ら外部リード端子(6)が導出されるように固着パッド
(2A)が形成されている。
By the way, a plurality of external lead terminals (6) are arranged in the above-mentioned separated portion. That is, the fixing pad (2A) at the tip end where the conductive path (2) extends is arranged to extend to the separated region formed by the lid (4) and the frame member (5). More specifically, the fixing pads (2A) are formed to extend at least on two opposite sides or four sides of the substrate (1), and they are selected according to the integration density and the substrate size. In this embodiment, the fixing pads (2A) are formed so that the external lead terminals (6) are led out from the four sides of the substrate (1).

【0016】かかる固着パッド(2A)上に外部リード
端子(6)が半田付けされる。このとき、回路素子
(3)は蓋体(4)によってあらかじめ密封封止されて
いるため、リード端子の半田付け際に半田ボールが発生
しても何ら問題は生じない。一方、蓋体(4)と枠材
(5)間の離間領域に固着された外部リード端子(6)
の固着部分はエポキシ樹脂等の封止樹脂層(7)が充填
され固着部分の強度が補強される。この場合、基板
(1)の各辺に設けられたリード端子(6)の固着部分
は全て同一方向に配置され、且つ蓋体(4)と枠材
(5)の離間領域に配置される構造となるために封止樹
脂層(7)の充填・硬化を夫々同一工程で行うことがで
きる。
An external lead terminal (6) is soldered on the fixing pad (2A). At this time, since the circuit element (3) is hermetically sealed in advance by the lid (4), no problem occurs even when solder balls are generated at the time of soldering the lead terminals. On the other hand, an external lead terminal (6) fixed in a space between the lid (4) and the frame member (5)
Is fixed with a sealing resin layer (7) such as an epoxy resin to reinforce the strength of the fixed portion. In this case, the fixed portions of the lead terminals (6) provided on each side of the substrate (1) are all arranged in the same direction, and are arranged in a space between the lid (4) and the frame member (5). Therefore, the filling and curing of the sealing resin layer (7) can be performed in the same step.

【0017】[0017]

【考案の効果】以上に詳述した如く、本考案の構造によ
れば、基板の少なくとも二側辺以上の周端部から外部リ
ード端子が導出された構造であっても、外部リード端子
の固着部分を補強する封止樹脂層を1回の工程で充填・
硬化が行え極めて作業性を向上することができる。
As described in detail above, according to the structure of the present invention, even if the external lead terminals are led out from at least two peripheral edges of the substrate, the external lead terminals are fixed. Filling the sealing resin layer to reinforce the part in one process
Curing can be performed and workability can be greatly improved.

【0018】また、本考案の構造では、外部リード端子
を半田付けする際に半田ボールが発生したとしても回路
素子が蓋体によって密封封止されていることにより、半
田ボールによる回路素子のショートを完全に防止するこ
とができる。
Further, in the structure of the present invention, even if a solder ball is generated when the external lead terminal is soldered, the short circuit of the circuit element due to the solder ball can be prevented because the circuit element is hermetically sealed by the lid. It can be completely prevented.

【図面の簡単な説明】[Brief description of the drawings]

【図1】図1は本考案の混成集積回路を示す平面図であ
る。
FIG. 1 is a plan view showing a hybrid integrated circuit of the present invention.

【図2】図2は図1のA−A断面図である。FIG. 2 is a sectional view taken along line AA of FIG.

【図3】図3は従来の混成集積回路を示す要部断面図で
ある。
FIG. 3 is a sectional view of a main part showing a conventional hybrid integrated circuit.

【符号の説明】[Explanation of symbols]

(1) 基板 (2) 導電路 (3) 回路素子 (4) 蓋体 (5) 枠材 (6) リード端子 (7) 封止樹脂層 (1) Substrate (2) Conductive path (3) Circuit element (4) Lid (5) Frame material (6) Lead terminal (7) Sealing resin layer

Claims (3)

(57)【実用新案登録請求の範囲】(57) [Scope of request for utility model registration] 【請求項1】 基板上に形成された所望形状の導電路
と、 前記導電路上に搭載された複数の回路素子と、 前記基板に固着され前記回路素子を密封封止する蓋体
と、 前記基板の終端部に固着され且つ前記蓋体と所定の間隔
離間配置された枠体と、前記離間配置された蓋体と枠体との間隔で構成され、前
記蓋体の周囲を環状に囲む離間領域と、 前記離間領域の基板表面に、前記導電路を延在して形成
した固着パッドと、 前記固着パッドに固着された、 外部回路と接続するため
の複数の接続体と、 前記離間領域に充填され前記接続体の接続部分を封止固
定する封止樹脂層とを具備したことを特徴とする混成集
積回路。
A conductive path having a desired shape formed on a substrate; a plurality of circuit elements mounted on the conductive path; a lid fixed to the substrate and hermetically sealing the circuit element; A frame fixed to the terminal end of the frame and arranged at a predetermined distance from the lid, and a gap between the lid and the frame spaced apart from each other;
A spaced area surrounding the lid body in a ring shape, and the conductive path is formed to extend on the substrate surface in the spaced area.
A fixed pad, a plurality of connecting members fixed to the fixing pad, for connecting to an external circuit, and a sealing resin layer filled in the separation region to seal and fix a connecting portion of the connecting member. A hybrid integrated circuit characterized by:
【請求項2】 前記固着パッドは少なくとも前記基板の
相対向する側辺終端付近に形成されたことを特徴とする
請求項1記載の混成集積回路。
2. The hybrid integrated circuit according to claim 1, wherein said fixing pads are formed at least near the ends of the opposite sides of said substrate.
【請求項3】 前記接続体として外部リード端子を用い
たことを特徴とする請求項1記載の混成集積回路。
3. The hybrid integrated circuit according to claim 1, wherein an external lead terminal is used as said connection body.
JP6912591U 1991-08-29 1991-08-29 Hybrid integrated circuit Expired - Fee Related JP2552514Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6912591U JP2552514Y2 (en) 1991-08-29 1991-08-29 Hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6912591U JP2552514Y2 (en) 1991-08-29 1991-08-29 Hybrid integrated circuit

Publications (2)

Publication Number Publication Date
JPH0521454U JPH0521454U (en) 1993-03-19
JP2552514Y2 true JP2552514Y2 (en) 1997-10-29

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Application Number Title Priority Date Filing Date
JP6912591U Expired - Fee Related JP2552514Y2 (en) 1991-08-29 1991-08-29 Hybrid integrated circuit

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JP (1) JP2552514Y2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5718766Y2 (en) * 1978-01-26 1982-04-20

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Publication number Publication date
JPH0521454U (en) 1993-03-19

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