JP3063713B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device configured by mounting a semiconductor chip on a tape carrier.

[0002]

2. Description of the Related Art Hitherto, a package has been proposed in which the size of an interposer is made equal to the size of a semiconductor chip to achieve high-density mounting. Such a package is generally called a CSP (Chip Size Package), and the following three types are used depending on the type of interposer to be used and the bonding method.

FIG. 8 is a sectional view showing the structure of a conventional CSP. First, the CSP shown in FIG. 8A uses a build-up board 4 'as an interposer.
In the figure, a semiconductor chip 1 has a chip terminal 2,
The build-up substrate 4 'is formed by alternately bonding substrates 4b and 4b' made of ceramics or the like and wiring layers 4a and 4a '. Then, these wiring layers 4a, 4
a ′ and lands 8 are through-hole plating 6a, 6
It is electrically connected via a ′.

Accordingly, the semiconductor chip 1 is mounted on the build-up substrate 4 'in a state where the chip terminals 2 are connected to the bump electrodes 10 via the bumps 3 and the wiring layers 4a and the like. The gap with 4 ′ is sealed by a resin layer 5 made of epoxy or the like.

As described above, in the CSP according to FIG. 8A, the size of the package can be reduced by using the build-up substrate 4 'having a size substantially equal to the size of the semiconductor chip 1. Although high-density mounting can be achieved, there is a problem that a build-up board is generally expensive.

The CSP shown in FIG. 8B uses a polyimide tape 4b as an interposer, and connects the chip terminal 2 and the wiring layer 4a by a method called a wire bonding method. . 8A, the same components as those in FIG. 8A indicate the same components, and the semiconductor chip 1 is mounted on the tape carrier 4 while being fixed by an adhesive 13.

Further, the tape carrier 4 is made of polyimide.
The chip terminal 2 is constituted by a tape 4b and a wiring layer 4a formed thereon. The chip terminal 2 is electrically connected to the wiring layer 4a via a wire 12, and the wiring layer 4a is connected to a bump electrode via a through hole. 10a is electrically connected. Therefore, the CSP according to FIG. 8B can be provided at low cost by using the tape carrier 4, but the area L occupied by the wire 12 increases,
There is a problem that the outer shape of the package becomes large.

Further, the CSP shown in FIG. 8C uses a polyimide tape 4b as an interposer, and is constructed by a method called a tape carrier system. 8B, the same components as those in FIG. 8B indicate the same components, but the chip terminal 2 is electrically connected to the wiring layer 4a on the tape carrier 4 via the bump 3, and the FIG. 8B differs from FIG. 8B in that it is electrically connected to the bump 10a via the through hole of the tape 4b. Therefore, the package can be made smaller because no wires are used, but the tape carrier 4 is distorted due to volume shrinkage due to the curing of the resin layer 5, the height electrode position of the bump electrode 10a shifts, and mounting failure is likely to occur. There is a problem.

[0009]

As described above, conventionally, (a) the price is high, (b) the outer shape of the package is large, and (c) the tape carrier is distorted and mounting defects are likely to occur. there were. An object of the present invention is to solve such a problem, and it is an object of the present invention to provide a semiconductor device which is inexpensive and small, and suppresses distortion of a tape carrier.

[0010]

In order to achieve the above object, a semiconductor device according to the present invention comprises a semiconductor chip having chip terminals, a thin plate made of resin, and one surface of this thin plate. A tape carrier composed of a wiring layer, bumps connecting chip terminals to the wiring layer, a resin layer provided at least between the semiconductor chip and the tape carrier, and wiring via a through hole formed in a thin plate In a semiconductor device having a bump electrode connected to a layer, the other surface of the thin plate is covered with a metal layer having a thickness greater than that of the thin plate so as not to be electrically connected to the bump electrode. It is a thing. With this configuration, the present invention can suppress the deformation of the tape carrier.

[0011]

Next, one embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a sectional view and a plan view showing one embodiment of the present invention. 8, the same reference numerals as those in FIG. 8 indicate the same or equivalent ones. In the present embodiment, the copper tape which is a metal layer is provided on the surface of the polyimide tape 4b opposite to the wiring layer 4a. There is a great feature in that the foil 7 is provided.

The other structure is the same as that of FIG. 8. As is clear from the cross section taken along the line AA ', the chip terminals 2 of the semiconductor chip 1 are composed of bumps 3, wiring layers 4a, through holes / plates 6, and lands 8. Through the bump electrode 10
Is electrically connected to The copper foil 7 is covered with a solder resist 9 to prevent corrosion and the like.

It is more effective to set the thickness of each part as follows. The wiring layer 4a is formed of copper having a thickness of 20 to 25 [mu] m, and after plating its surface with nickel, it is further plated with gold or tin. Further, the thickness of the polyimide tape 4b is set to 50 to 75 μm, and in such a case, the thickness of the copper foil 7 is set to a thickness equal to or larger than the polyimide tape 4b (for example, 50 to 200 μm).
m). Then, it is possible to prevent the tape carrier 4 from being deformed even when the resin layer 5 is hardened and the volume is reduced. Then, the through-hole plating 6 is formed on the wiring layer 4.
It is made of copper in order to establish electrical connection between a and the bump electrode 10. The resin layer 5 between the semiconductor chip 1 and the tape carrier 4 depends on the size of the bump 3.
Has a thickness of about 120 μm.

With the above configuration, even if the resin layer 5 contracts due to baking, the conventional tape carrier 4 deforms the semiconductor chip 1 by about 80 to 100 μm. About 10-30μ in form
m.

FIG. 2 is a sectional view showing a state where the thickness of the wiring layer 4a in FIG. 1 is increased. In FIG.
Are the same or equivalent. In this case, the strength of the tape carrier 4 is further increased by setting the thickness of the wiring layer 4a to 50 to 200 μm, which is almost equal to that of the copper foil 7. As a result, for example, the deformation amount of about 10 to 30 μm in FIG.
μm or less

FIG. 3 is a sectional view and a plan view showing a state where the connecting portion 11 is provided in FIG. In the figure,
The same reference numerals in FIG. 1 indicate the same or equivalent ones. Here, the chip electrode 10 is connected to a ground terminal (GND).
It is assumed that Then, as is apparent from the cross-sectional view taken along the line BB ', by electrically connecting the grounding terminal and the copper foil 7 via the connecting portion 11, the copper foil 7 functions as a ground plane, so that high-frequency characteristics are obtained. Can be improved.

FIG. 4 is a sectional view and a plan view showing another embodiment of the present invention. In the figure, the same reference numerals as those in FIG.
As is apparent from the cross-sectional view taken along the line CC ′, the bump electrode 10 is directly connected to the wiring layer 4a without the intermediation of lands, through holes and plating.
1 is different from the configuration of FIG.

It is effective to set the thickness of each part in the same manner as in FIG. That is, the wiring layer 4a is formed of copper having a thickness of 20 to 25 μm, the surface of which is plated with nickel, and further plated with gold or tin. Further, if the thickness of the polyimide tape 4b is 50 to 75 μm, and in such a case, the thickness of the copper foil 7 is not less than the polyimide tape 4b (for example, 50 to 200 μm), the resin layer It is possible to prevent the tape carrier 4 from being deformed even when the volume of the tape carrier 5 is reduced by curing.

As a result, even if the resin layer 5 shrinks due to baking, the conventional tape carrier 4 is deformed by about 80 to 100 μm toward the semiconductor chip 1 in the conventional tape carrier 4, but in the present embodiment, it is deformed by about 10 to It can be reduced to 30 μm.

FIG. 5 is a sectional view showing a state where the thickness of the wiring layer 4a in FIG. 4 is increased. In FIG.
2 indicate the same or equivalent ones, and the thickness of the wiring layer 4a is 50 to 200 μm as in FIG.
By doing so, a stronger strength can be obtained than in the case of FIG. For example, in FIG.
m was reduced to about 15 μm or less.

FIG. 6 is a sectional view showing still another embodiment of the present invention. In the figure, the same reference numerals as those in FIG. 1 indicate the same or equivalent ones, and in the present embodiment, a stronger strength can be obtained by bending the edge of the tape carrier 4.

FIG. 7 is a plan view and a perspective view showing the tape carrier 4 shown in FIG. As shown in the figure, the package shown in FIG. 6 can be easily formed by cutting off four corners of a rectangular tape carrier and bending the projected four sides.

As the material used for the interposer, a thin plate made of another resin may be used as long as the material satisfies conditions such as heat resistance and durability equal to or higher than those of the polyimide tape 4b.

[0024]

As described above, according to the present invention, the warpage of the tape carrier can be easily suppressed by forming the reinforcing metal layer on the surface of the tape carrier opposite to the wiring layer. Further, the present invention can be realized only by providing a metal layer having a desired thickness on the tape carrier, and therefore can be provided at a low cost.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view and a plan view showing one embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a state where the thickness of a wiring layer 4a in FIG. 1 is increased.

FIG. 3 is a cross-sectional view and a plan view in a case where a connecting portion 11 is provided in FIG.

FIG. 4 is a sectional view and a plan view showing another embodiment of the present invention.

FIG. 5 is a cross-sectional view showing a state where the thickness of a wiring layer 4a is increased in FIG.

FIG. 6 is a cross-sectional view showing another embodiment of the present invention.

7 is a plan view and a perspective view showing the tape carrier 4 according to FIG.

FIG. 8 is a sectional view showing a conventional example.

[Description of Signs] 1 ... Semiconductor chip, 2 ... Chip terminal, 3 ... Bump, 4 ...
Tape carrier, 4a: wiring layer, 4b: polyimide tape, 5: resin layer, 6: through-hole plating, 7: copper foil, 8: land, 9: solder resist, 10: bump electrode.

Claims (5)

(57) [Claims] A semiconductor chip having chip terminals; a thin plate made of resin; and a tape carrier formed of a wiring layer formed on one surface of the thin plate; and a bump connecting the chip terminals to the wiring layer. A semiconductor device comprising: at least a resin layer provided between the semiconductor chip and the tape carrier; and a bump electrode connected to the wiring layer via a through hole formed in the thin plate. A semiconductor device, wherein the other surface of the thin plate is covered with a metal layer having a thickness greater than that of the thin plate so as not to be electrically connected to the bump electrode. 2. The semiconductor device according to claim 1, wherein a ground terminal of the semiconductor chip and the metal layer are electrically connected. 3. The semiconductor device according to claim 1, wherein the metal layer is formed of copper. 4. The semiconductor device according to claim 1, wherein said metal layer has a thickness of 50 to 200 μm. 5. The semiconductor device according to claim 1, wherein the edge of the tape carrier is bent, and the edge and the edge of the semiconductor chip are bonded via the resin layer.