JP2550725Y2 - Molding equipment for semiconductor devices - Google Patents

Molding equipment for semiconductor devices

Info

Publication number
JP2550725Y2
JP2550725Y2 JP1991114106U JP11410691U JP2550725Y2 JP 2550725 Y2 JP2550725 Y2 JP 2550725Y2 JP 1991114106 U JP1991114106 U JP 1991114106U JP 11410691 U JP11410691 U JP 11410691U JP 2550725 Y2 JP2550725 Y2 JP 2550725Y2
Authority
JP
Japan
Prior art keywords
forming
semiconductor device
lead
outer leads
outer lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1991114106U
Other languages
Japanese (ja)
Other versions
JPH0550744U (en
Inventor
敏 松林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsui High Tech Inc
Original Assignee
Mitsui High Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsui High Tech Inc filed Critical Mitsui High Tech Inc
Priority to JP1991114106U priority Critical patent/JP2550725Y2/en
Publication of JPH0550744U publication Critical patent/JPH0550744U/en
Application granted granted Critical
Publication of JP2550725Y2 publication Critical patent/JP2550725Y2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Wire Processing (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【考案の詳細な説明】[Detailed description of the invention]

【0001】[0001]

【産業上の利用分野】本考案は半導体装置の成形加工装
置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a molding device for semiconductor devices.

【0002】[0002]

【従来の技術】半導体装置は、プレス加工あるいはエッ
チング法により形成された多数のリードを有するリード
フレームのダイパット上に半導体チップを搭載し、半導
体チップのボンディングパッドとリードフレームのイン
ナーリードとをボンディングワイヤによって結線した
後、インナーリードより内側を樹脂やセラミック等の封
止材料で封止し、アウターリードなどリードフレームの
露出部に半田等の低融点金属を被着し、アウターリード
の外周部など不要部を切断して所定の長さとし、該アウ
ターリードを所望の形状に成形加工することにより製作
される。
2. Description of the Related Art In a semiconductor device, a semiconductor chip is mounted on a die pad of a lead frame having a large number of leads formed by press working or etching, and a bonding pad of the semiconductor chip and an inner lead of the lead frame are bonded with a bonding wire. After sealing, the inside of the inner lead is sealed with a sealing material such as resin or ceramic, and low-melting point metal such as solder is applied to the exposed part of the lead frame such as the outer lead. The outer lead is formed by cutting a portion to a predetermined length and forming the outer lead into a desired shape.

【0003】半導体装置の実装は、アウターリードの片
面を実装面に接触させ低融点金属被着膜をリフローさせ
て行われる。その実装を容易とし、またその自動作業を
より安定化するためや、半導体装置から突き出たアウタ
ーリードの変形防止のためにアウターリードは特開昭6
3−296359号公報に記載されているようなJ字状
またはガルウィング状等所望の形に成形される。
A semiconductor device is mounted by bringing one surface of an outer lead into contact with a mounting surface and reflowing a low-melting metal deposition film. The outer leads are disclosed in Japanese Patent Application Laid-Open No.
It is formed into a desired shape such as a J-shape or a gull-wing shape as described in JP-A-3-296359.

【0004】[0004]

【考案が解決しようとする課題】ところで、半導体装置
は昨今ますます高密度集積化および小型高機能化の要請
がつよく、これに対応して多ピン化され、またリードフ
レームは薄厚みとなっている。かかる半導体装置ではア
ウターリードは板厚が薄くまたリード間の間隔が狭く、
アウターリードを所望の形に加工成形する場合に、当該
アウターリードが成形途中で捻じれや偏向等現象を生じ
てアウターリード同志が接触したり変形したりして不良
品となる。
[Problems to be Solved by the Invention] In recent years, semiconductor devices have been increasingly demanded for high-density integration and miniaturization and high functionality. In response to this, the number of pins has been increased, and lead frames have become thinner. I have. In such a semiconductor device, the outer leads have a small thickness and a small space between the leads,
When the outer leads are processed and formed into a desired shape, the outer leads may be twisted or deflected during the molding, causing the outer leads to come into contact with each other or deform, resulting in a defective product.

【0005】本考案は板厚が薄くまたアウターリードの
間隔が狭くても当該アウターリードの成形加工が問題な
く行える半導体装置の成形加工装置を目的とする。
SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor device forming apparatus capable of forming outer leads without problems even if the thickness of the outer leads is small and the interval between the outer leads is small.

【0006】[0006]

【課題を解決するための手段】本考案の要旨は、封止型
半導体装置から突出したアウターリードの成形加工装置
において、成形パンチに設けた成形曲面の頂部に、被加
工アウターリードの案内部を設けたことを特徴とする半
導体装置の成形加工装置にある。
The gist of the present invention is to provide an apparatus for forming an outer lead projecting from a sealed type semiconductor device, wherein a guide portion for an outer lead to be processed is provided on the top of a forming curved surface provided on a forming punch. The semiconductor device forming and processing apparatus is provided.

【0007】[0007]

【作用】本考案では、半導体装置のアウターリードを加
工する成形パンチの成形曲面に、アウターリードを案内
ガードする案内部を間隔をおいて設け、成形時にアウタ
ーリードの個々をそれぞれ独立的に成形パンチ内を案内
するから、アウターリードは極薄であっても捻じれや例
えば横向きに偏向することなく所定の形に一様に成形加
工される。
In the present invention, guide portions for guiding and guarding the outer leads are provided at intervals on the molding curved surface of the molding punch for processing the outer leads of the semiconductor device, and each of the outer leads is independently formed at the time of molding. Since the inner leads are guided inside, even if the outer leads are extremely thin, they are uniformly formed into a predetermined shape without twisting or, for example, deflecting laterally.

【0008】またアウターリードの前述のように個々に
成形パンチ内を案内されるから、リード間隔が狭くとも
当該アウターリードは接触し合うことなく成形される。
Further, since the outer leads are individually guided in the forming punch as described above, the outer leads are formed without contact even if the lead interval is small.

【0009】以下に、本考案について図面を参照し1実
施例に基ずき詳細に説明する。図面において1は半導体
装置で、この実施例では樹脂封止されたもので、アウタ
ーリード2が2方に突き出ている。アウターリード2の
先端部分は実装の利便化ため所望形状例えばJ字状に成
形加工される。
Hereinafter, the present invention will be described in detail based on one embodiment with reference to the drawings. In the drawings, reference numeral 1 denotes a semiconductor device, which is resin-sealed in this embodiment, and has outer leads 2 projecting in two directions. The tip portion of the outer lead 2 is formed into a desired shape, for example, a J-shape for convenience of mounting.

【0010】図1〜図2を参照して、この実施例ではJ
字状成形加工に適用した場合について述べる。3は半導
体装置の受台、4はアウターリード2の成形ダイであ
る。5は成形パンチで前記ダイ4に対向して配置され、
該成形パンチ5をダイ4側に進行させアウターリード2
の成形加工を行うものであり、図示しない駆動装置に接
続されている。
Referring to FIGS. 1 and 2, in this embodiment, J
A case where the present invention is applied to a letter-shaped forming process will be described. Reference numeral 3 denotes a pedestal for the semiconductor device, and reference numeral 4 denotes a molding die for forming the outer lead 2. Reference numeral 5 denotes a forming punch which is arranged to face the die 4,
The forming punch 5 is advanced to the die 4 side and the outer lead 2
And is connected to a driving device (not shown).

【0011】成形パンチ5にはアウターリード2をJ字
状に曲げ成形するための成形曲面6が形成されている。
7はアウターリード2を個別に成形パンチ5内で案内す
る案内部で、図1に示すように成形曲面6の頂部に沿っ
て設けられている。案内部7はこの実施例ではアウター
リード2の個々に対応して設けたが、これに限らずアウ
ターリード2の例えば2〜3本毎に設けてもよい。
The forming punch 5 has a forming curved surface 6 for bending the outer lead 2 into a J-shape.
A guide 7 guides the outer leads 2 individually in the forming punch 5 and is provided along the top of the forming curved surface 6 as shown in FIG. In this embodiment, the guide portions 7 are provided for each of the outer leads 2, but the present invention is not limited to this, and the guide portions 7 may be provided for, for example, every two or three outer leads 2.

【0012】8はストリッパーで、受台2に対して進退
自在であって該受台2と協働して、アウターリード2を
成形加工の際に半導体装置1の封止部を挟持するもので
ある。
Reference numeral 8 denotes a stripper which is capable of moving back and forth with respect to the receiving table 2 and cooperates with the receiving table 2 to hold the sealing portion of the semiconductor device 1 when the outer lead 2 is formed. is there.

【0013】次に、本考案の装置を用いての半導体装置
1のアウターリード2のJ字状曲げ成形加工について述
べる。半導体装置1が受台3に載置され、ストリッパー
8を降下させ受台3と協働して挟持される。 この際、
半導体装置1の側端から突出しているアウターリード2
はリードフレームの多ピン化や薄厚化により強度が下が
って捻じれや、偏り等の変形を生じやすくなっており、
またリード間隔が狭くなっていることからアウターリー
ド2同志が接触し易くなって、この悪い現象は成形加工
の際に起こり易いのであるが、本考案では成形パンチ5
にアウターリード2を案内ガードする案内部7を間隔を
おいて設けているので、アウターリード2は捻じれや偏
りを生じることなく安定して且つ一様に成形される。
Next, the J-shaped bending of the outer lead 2 of the semiconductor device 1 using the apparatus of the present invention will be described. The semiconductor device 1 is placed on the pedestal 3, the stripper 8 is lowered, and the semiconductor device 1 is clamped in cooperation with the pedestal 3. On this occasion,
Outer lead 2 protruding from a side end of semiconductor device 1
The strength of the lead frame is reduced due to the increase in the number of pins and the thickness of the lead frame, and it is easy to cause deformation such as twisting and bias,
Also, since the outer leads 2 are likely to come into contact with each other due to the narrow lead interval, this bad phenomenon is likely to occur during molding.
Since the guide portions 7 for guiding and guarding the outer leads 2 are provided at intervals, the outer leads 2 are formed stably and uniformly without causing twisting or deviation.

【0014】実施例ではアウターリードをJ字状に成形
する場合について述べたが、これに限らずガルウィング
状等所望の形状に成形加工する場合にも適用でき同様の
作用効果が得られる。
In the embodiment, the case where the outer lead is formed into a J-shape has been described. However, the present invention is not limited to this case, and the present invention can be applied to a case where the outer lead is formed into a desired shape such as a gull-wing shape, and the same operation and effect can be obtained.

【0015】[0015]

【考案の効果】本考案の装置は、半導体装置1のアウタ
ーリード2を成形加工する際、成形パンチ5が被加工ア
ウターリード2の案内機能を有しているので、薄厚みで
リード間隔が狭いものでも問題を起こすことなく成形さ
れる。
According to the device of the present invention, when forming the outer lead 2 of the semiconductor device 1, the forming punch 5 has a function of guiding the outer lead 2 to be processed. Anything can be molded without problems.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本考案の1実施例における成形パンチを示す
図。
FIG. 1 is a view showing a forming punch in one embodiment of the present invention.

【図2】本考案の1実施例における成形加工装置を示す
図。
FIG. 2 is a diagram showing a molding apparatus according to an embodiment of the present invention.

【図3】本考案の1実施例においての半導体装置を示す
図。
FIG. 3 is a diagram showing a semiconductor device according to one embodiment of the present invention;

【符号の説明】[Explanation of symbols]

1 半導体装置 2 アウターリード 3 受台 4 ダイ 5 成形パンチ 6 成形曲面 7 案内部 8 ストリッパー DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Outer lead 3 Cradle 4 Die 5 Molding punch 6 Molding curved surface 7 Guide part 8 Stripper

Claims (1)

(57)【実用新案登録請求の範囲】(57) [Scope of request for utility model registration] 【請求項1】 封止型半導体装置から突出したアウター
リードの成形加工装置において、成形パンチに設けた成
形曲面の頂部に、被加工アウターリードの案内部を設け
たことを特徴とする半導体装置の成形加工装置。
1. An apparatus for forming an outer lead protruding from a sealed semiconductor device, wherein a guide portion for an outer lead to be processed is provided on a top of a forming curved surface provided on a forming punch. Forming equipment.
JP1991114106U 1991-12-12 1991-12-12 Molding equipment for semiconductor devices Expired - Fee Related JP2550725Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1991114106U JP2550725Y2 (en) 1991-12-12 1991-12-12 Molding equipment for semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1991114106U JP2550725Y2 (en) 1991-12-12 1991-12-12 Molding equipment for semiconductor devices

Publications (2)

Publication Number Publication Date
JPH0550744U JPH0550744U (en) 1993-07-02
JP2550725Y2 true JP2550725Y2 (en) 1997-10-15

Family

ID=14629275

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1991114106U Expired - Fee Related JP2550725Y2 (en) 1991-12-12 1991-12-12 Molding equipment for semiconductor devices

Country Status (1)

Country Link
JP (1) JP2550725Y2 (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03280455A (en) * 1990-03-29 1991-12-11 Seiko Epson Corp Device for shaping outer lead of semiconductor device

Also Published As

Publication number Publication date
JPH0550744U (en) 1993-07-02

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