JP2525201B2 - Method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to the structure of a semiconductor device.

[Conventional technology]

Conventional semiconductor devices, particularly semiconductor memory devices such as SRAMs, have a structure as shown in FIG. 3 due to the area limitation of the memory cells.

The first transistor formed on the P-type Si substrate 301 is separated from the adjacent second transistor by the element isolation oxide film 302. In the first transistor, 303 is a gate oxide film, 304 is a gate electrode wiring material, 305 is a low concentration N type impurity diffusion layer, 306 is an insulating film sidewall, 307 is a high concentration N type impurity diffusion layer (source / drain), 308 is a refractory metal silicide.

Adjacent second transistor gate electrode wiring material 30
4'is connected to the source or drain 307 of the first transistor via the N-type impurity diffusion layer 312.

[Problems to be solved by the invention]

However, in the above-mentioned conventional technique, the second gate electrode wiring material is connected to the source or the drain of the first transistor through the impurity diffusion layer, and in that case, the second gate electrode wiring material and the impurity diffusion layer are connected. There is a problem that the contact resistance is large, which deteriorates the current driving capability of the transistor.

The present invention solves such a problem, and reduces the resistance involved in the connection between the gate electrode wiring material of the second transistor and the source or drain of the first transistor, and simplifies the manufacture of a semiconductor device. A manufacturing method is provided.

[Means for solving problems]

The present invention provides a method for manufacturing a semiconductor device having a MOS transistor having a gate electrode containing polysilicon as a constituent element on a semiconductor substrate, the step of forming a polysilicon layer on the semiconductor substrate, patterning the polysilicon layer. Forming a first wiring layer and the gate electrode by separating the impurity layer, which is a constituent element of the MOS transistor, in the semiconductor substrate sandwiched by the gate electrode and the first wiring layer from the first wiring layer. Forming the insulating film on the first wiring layer, the gate electrode, and the semiconductor substrate, etching the insulating film to form a side surface at an end of the first wiring layer and the gate electrode. A step of forming a wall, a step of forming a refractory metal layer on the first wiring layer, the gate electrode and the side wall Ion-implanting silicon of the refractory metal layer on the sidewalls, heat-treating the semiconductor substrate, and refining the predetermined first wiring layer, the silicon of the gate electrode or the semiconductor substrate and the ion-implanted silicon. The method is characterized by including a step of reacting with a metal layer to form a silicide and a step of removing the unreacted refractory metal layer.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a sectional view showing the structure of a semiconductor device of the present invention.

The first transistor formed on the P-type Si substrate 101 is separated from the adjacent second transistor by the element isolation oxide film 102. In the first transistor, 103 is a gate oxide film, 104 is a gate electrode wiring material, and 105 is a low concentration N
Type impurity diffusion layer, 106 is an insulating film sidewall such as an oxide film or a nitride film, and 107 is a high-concentration N type impurity diffusion layer (source.
104 'is a gate electrode wiring material of the adjacent second transistor, and 106' is an insulating film sidewall provided on the sidewall of 104 '. Incidentally, in the present invention, the gate electrode wiring material is polycrystalline silicon in which N-type impurities are implanted.

In the figure, the gate electrode wiring material 104 'of the second transistor and the source or drain 107 of the first transistor are the gate electrode wiring material 104' of the second transistor and the source or drain 107 of the first transistor. And a refractory metal silicide (WSi ₂ , TiSi ₂ , CoSi _2, etc.) 108 selectively formed on the insulating film sidewall 106 ′.

Next, an example of a method for manufacturing a semiconductor device of the present invention will be described in detail with reference to FIGS.

Step (1) ... FIG. 2 (a) On the P-type Si substrate 201, an element isolation oxide film 202, a gate oxide film 203, a gate electrode wiring material 204, by a known technique.
204 'A low-concentration N-type impurity diffusion layer 205 and insulating film sidewalls 206, 206' such as an oxide film and a nitride film are formed.

Step (2) ... FIG. 2 (b) A high concentration N-type impurity diffusion layer (source / drain) 207 is formed by ion implantation of a high concentration N-type impurity and heat treatment at 900 to 1000 ° C.

Step (3) ... Fig. 2 (c) The refractory metal 209 such as Ti, W, Mo, Co is sputtered to form 200
Form up to 1000Å.

Step (4) ... FIG. 2 (d) Using the resist pattern 210, one of the refractory metals 209
Part (gate electrode wiring material 20 of the second transistor)
On the insulating film sidewall 206 'on the side wall of 4')
Si ion 211 is ion-implanted at 10 to 20 kev.

Step (5) ... FIG. 2 (e) By performing heat treatment at 650 ° C. to 750 ° C. with a halogen lamp, the gate electrode wiring material 20 of the first transistor 20
The refractory metal 209 on the upper part of 4 ′ and on the source / drain 207 forms a refractory metal silicide 208. At the same time, since the refractory metal on the insulating film sidewall 206 'contains Si in the step (4), refractory metal silicide is also formed. Further, the refractory metal on the insulating film sidewall 206 of the first transistor or the element isolation oxide film remains unreacted and does not form refractory metal silicide.

Step (6) ... Fig. 2 (f) Unreacted metal is removed using a selective etching solution such as a mixed solution of water, hydrogen peroxide and ammonia, and heat treatment is carried out for a short time with a halogen lamp of 800 to 900 ° C.

As a result, the gate electrode wiring material 204 'of the second transistor and the source or drain of the first transistor are each formed of a refractory metal film selectively formed on the upper portion and the insulating film sidewall 206'. Connected by a compound. In the first transistor, the gate electrode wiring material 204 ′ and the refractory metal silicide on the source / drain 207 are separated by the insulating film sidewall 206.

〔The invention's effect〕

As described above, according to the invention, the source or drain of the first transistor is connected to the gate electrode wiring material of the adjacent second transistor by the metal silicide, so that the resistance involved in the connection is Small enough to ignore. And, by the simplified method, it is possible to provide a method for manufacturing a semiconductor device in which the current driving capability of the transistor is not deteriorated.

[Brief description of drawings]

FIG. 1 is a sectional view showing the structure of a semiconductor device of the present invention, FIGS. 2 (a) to (f) are sectional views showing an example of a manufacturing process of the semiconductor device of the present invention, and FIG. 3 is a conventional semiconductor device. Sectional view showing the structure of FIG. 101,201,301 ...... P-type Si substrate 102,202,302 …… Element isolation oxide film 103,203,303 …… Gate oxide film 104,204,304 …… (for first transistor) gate electrode wiring material 104 ′, 204 ′, 304 ′ …… (second transistor) Gate electrode wiring material 105,205,305 …… Low-concentration N-type impurity diffusion layer 106,106 ′, 206,206 ′, 306,306 ′ …… Insulating film sidewall 107,207,307 …… Source / drain 108,208,308 …… Refractory metal silicide 209 …… Refractory metal 210: Resist pattern 211: Si ion 312: N-type impurity diffusion layer

Claims (1)

(57) [Claims] 1. A method of manufacturing a semiconductor device having a MOS transistor having a gate electrode containing polysilicon as a constituent element on a semiconductor substrate, the step of forming a polysilicon layer on the semiconductor substrate, and patterning the polysilicon layer. And a step of forming a first wiring layer and the gate electrode, an impurity layer which is a constituent element of the MOS transistor in the semiconductor substrate sandwiched between the gate electrode and the first wiring layer and the first wiring layer A step of forming them separately, a step of forming an insulating film on the first wiring layer, the gate electrode, and the semiconductor substrate; and etching the insulating film on the end portions of the first wiring layer and the gate electrode. A step of forming a side wall, a step of forming a refractory metal layer on the first wiring layer, the gate electrode and the side wall; The step of ion-implanting silicon into the refractory metal layer on the sidewall, the semiconductor substrate is heat-treated, and the predetermined first wiring layer, the silicon of the gate electrode or the semiconductor substrate and the ion-implanted silicon are removed. A method of manufacturing a semiconductor device, comprising: a step of reacting with a melting point metal layer to form a silicide; and a step of removing the unreacted refractory metal layer.