JP2524967Y2 - ワイヤボンデイング実装体 - Google Patents
ワイヤボンデイング実装体Info
- Publication number
- JP2524967Y2 JP2524967Y2 JP1987058381U JP5838187U JP2524967Y2 JP 2524967 Y2 JP2524967 Y2 JP 2524967Y2 JP 1987058381 U JP1987058381 U JP 1987058381U JP 5838187 U JP5838187 U JP 5838187U JP 2524967 Y2 JP2524967 Y2 JP 2524967Y2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- insulating film
- lead
- lead frame
- wire bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987058381U JP2524967Y2 (ja) | 1987-04-17 | 1987-04-17 | ワイヤボンデイング実装体 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987058381U JP2524967Y2 (ja) | 1987-04-17 | 1987-04-17 | ワイヤボンデイング実装体 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63165846U JPS63165846U (US07655688-20100202-C00086.png) | 1988-10-28 |
| JP2524967Y2 true JP2524967Y2 (ja) | 1997-02-05 |
Family
ID=30888901
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987058381U Expired - Lifetime JP2524967Y2 (ja) | 1987-04-17 | 1987-04-17 | ワイヤボンデイング実装体 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2524967Y2 (US07655688-20100202-C00086.png) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53105970A (en) * | 1977-02-28 | 1978-09-14 | Hitachi Ltd | Assembling method for semiconductor device |
| JPS58143541A (ja) * | 1982-02-22 | 1983-08-26 | Hitachi Ltd | 半導体装置 |
| JPS622626A (ja) * | 1985-06-28 | 1987-01-08 | Nec Corp | 半導体装置 |
-
1987
- 1987-04-17 JP JP1987058381U patent/JP2524967Y2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63165846U (US07655688-20100202-C00086.png) | 1988-10-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6933610B2 (en) | Method of bonding a semiconductor die without an ESD circuit and a separate ESD circuit to an external lead, and a semiconductor device made thereby | |
| JPH1084074A (ja) | 半導体パッケージ | |
| KR100202760B1 (ko) | 반도체장치 | |
| JP2524967Y2 (ja) | ワイヤボンデイング実装体 | |
| JPH04144269A (ja) | 混成集積回路装置 | |
| JP2885786B1 (ja) | 半導体装置の製法および半導体装置 | |
| JP2788011B2 (ja) | 半導体集積回路装置 | |
| JPS63293963A (ja) | 樹脂封止型半導体装置 | |
| JP3169072B2 (ja) | 半導体装置 | |
| JPH0770666B2 (ja) | 集積回路装置実装パツケ−ジ | |
| JPS6141246Y2 (US07655688-20100202-C00086.png) | ||
| KR20030083561A (ko) | 수지밀봉형 반도체장치 | |
| JPS62226636A (ja) | プラスチツクチツプキヤリア | |
| JPH09326463A (ja) | 樹脂封止型半導体装置 | |
| US6323541B1 (en) | Structure for manufacturing a semiconductor die with copper plated tapes | |
| JP2522455B2 (ja) | 半導体集積回路装置 | |
| KR0159965B1 (ko) | 히트싱크가 내장된 반도체 패키지 | |
| JPH0455333B2 (US07655688-20100202-C00086.png) | ||
| JPH0513490A (ja) | 樹脂封止型半導体装置 | |
| JP2968769B2 (ja) | 樹脂封止型半導体装置 | |
| JPS6095958A (ja) | 半導体装置 | |
| KR0122905Y1 (ko) | 반도체 패키지 | |
| JP2752950B2 (ja) | 半導体装置およびその製造方法 | |
| JPH03218059A (ja) | 半導体装置 | |
| JPS63141329A (ja) | Ｉｃパツケ−ジ |
