JP2517882B2 - Solid-state imaging device - Google Patents
Solid-state imaging deviceInfo
- Publication number
- JP2517882B2 JP2517882B2 JP61307474A JP30747486A JP2517882B2 JP 2517882 B2 JP2517882 B2 JP 2517882B2 JP 61307474 A JP61307474 A JP 61307474A JP 30747486 A JP30747486 A JP 30747486A JP 2517882 B2 JP2517882 B2 JP 2517882B2
- Authority
- JP
- Japan
- Prior art keywords
- region
- conductivity type
- type
- conductivity
- signal charge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/70—Circuitry for compensating brightness variation in the scene
- H04N23/73—Circuitry for compensating brightness variation in the scene by influencing the exposure time
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は例えばビデオカメラ、電子スチルカメラに使
用して好適な電子シャッタ機構を有する固体撮像装置に
関する。The present invention relates to a solid-state image pickup device having an electronic shutter mechanism suitable for use in, for example, a video camera or an electronic still camera.
本発明は例えばビデオカメラ、電子スチルカメラに使
用して好適な電子シャッタ機構を有する固体撮像装置で
あって、第１の導電型の半導体基板と、この第１の導電
型の半導体基板上に形成された第２の導電型の領域と、
この第２の導電型の領域の表面側に形成された信号電荷
蓄積領域とを有してなる固体撮像装置において、第１の
導電型の半導体基板に所定電圧を供給し、信号電荷蓄積
領域に蓄積される信号電荷を第１の導電型の半導体基板
に掃き出させ得る様にしたことにより、この固体撮像装
置において露出時間制御を行い得る様にし、これを例え
ばビデオカメラに使用するときは機械的シャッタ装置を
不要にし、ビデオカメラの小型、軽量、低価格化を図る
ことができる様にしたものである。The present invention is a solid-state imaging device having an electronic shutter mechanism suitable for use in, for example, a video camera or an electronic still camera, which is formed on a first conductive type semiconductor substrate and on this first conductive type semiconductor substrate. A second conductivity type region,
In a solid-state imaging device having a signal charge storage region formed on the surface side of the second conductivity type region, a predetermined voltage is supplied to the first conductivity type semiconductor substrate, and the signal charge storage region is provided. By allowing the accumulated signal charges to be swept out to the semiconductor substrate of the first conductivity type, exposure time control can be performed in this solid-state image pickup device. It is possible to reduce the size, weight and cost of a video camera by eliminating the need for a dynamic shutter device.
従来、固体撮像装置においては、この固体撮像装置に
おいて電気的手段による露出制御を行い、これを例えば
ビデオカメラに使用する場合には、従来一般に使用され
る機械的シャッタ装置を不要にし、ビデオカメラの小
型、軽量、低価格化を図り得る様にすることが要請され
ていた。ここに長短２種類の露出時間を選択し得る様に
なされた固体撮像装置については既に提案されている。
この固体撮像装置は、一方の露出時間を１フレーム期間
と同一時間の1/30秒とし、他方の露出時間を垂直ブラン
キング期間と同一時間の約1/2000秒とするものである。
即ち、この固体撮像装置は、露出時間として1/30秒が選
択されたときは、１フレーム期間の間に受光部に蓄積さ
れた信号電荷をそのまま映像信号として読み出し、また
露出時間として1/2000秒が選択されたときは、垂直ブラ
ンキング期間前に蓄積された信号電荷についてはこれを
すべて垂直レジスタに読み出し、高速転送して掃き出し
てしまい、新ためて垂直ブランキング期間中に蓄積され
た信号電荷のみを映像信号として読み出し得る様になし
たものである。Conventionally, in a solid-state image pickup device, exposure control is performed by electric means in the solid-state image pickup device, and when this is used in a video camera, for example, a mechanical shutter device generally used in the past is not required, It has been demanded that the size, weight, and price be reduced. Here, a solid-state image pickup device capable of selecting two types of exposure time, long and short, has already been proposed.
In this solid-state imaging device, one exposure time is 1/30 second of the same time as one frame period, and the other exposure time is about 1/2000 second of the same time as the vertical blanking period.
That is, when 1/30 second is selected as the exposure time, this solid-state imaging device reads out the signal charge accumulated in the light receiving portion as a video signal as it is during one frame period, and 1/2000 as the exposure time. When seconds are selected, all the signal charges accumulated before the vertical blanking period are read out to the vertical register, transferred at high speed and swept out, and the signal newly accumulated during the vertical blanking period is read out. Only the charges can be read out as a video signal.
しかしながら、斯る従来の固体撮像装置においては、
露出時間として僅か２種類の時間しか選択できず、この
ため、これを例えばビデオカメラに使用したとしても、
斯るビデオカメラに使用される機械的シャッタ装置を不
要とすることはできないという不都合があった。However, in such a conventional solid-state imaging device,
You can only select two different exposure times, so even if you use it for a video camera,
There is an inconvenience that the mechanical shutter device used in such a video camera cannot be eliminated.
また斯る従来の固体撮像装置においては、垂直ブラン
キング期間前に蓄積された信号電荷を掃き出す場合に垂
直レジスタにおいて高速転送を行う必要があり、このた
め、余分な電力を消費するという不都合があった。Further, in such a conventional solid-state image pickup device, it is necessary to perform high-speed transfer in the vertical register when sweeping out the signal charges accumulated before the vertical blanking period, which causes a disadvantage that extra power is consumed. It was
本発明は、斯る点に鑑み、電気的な制御により露出時
間を所望の時間に可変制御することができる様にすると
共にこのための消費電力も小さくなる様にした固体撮像
装置を提供することを目的とする。In view of the above, the present invention provides a solid-state imaging device that can variably control an exposure time to a desired time by electrical control and that consumes less power. With the goal.
本発明による固体撮像装置は、例えば第１図〜第３図
に示す様に、第１の導電型の半導体基板（１）と、この
第１の導電型の半導体基板（１）上に形成された第２の
導電型の領域（２）と、この第２の導電型の領域（２）
の表面側に形成されたこの第１の導電型の信号電荷蓄積
領域（３）とを有してなる固体撮像装置において、この
第１の導電型の信号電荷蓄積領域（３）の表面にこの第
２の導電型の表面領域（７）が形成され、この第１の導
電型の半導体基板（１）に所定電圧を供給し、この信号
電荷蓄積領域（３）に蓄積される信号電荷を第１の導電
型の半導体基板（１）に掃き出させ得るようにしたもの
である。The solid-state imaging device according to the present invention is formed on a first conductive type semiconductor substrate (1) and the first conductive type semiconductor substrate (1) as shown in FIGS. 1 to 3, for example. A second conductivity type region (2) and the second conductivity type region (2)
In the solid-state imaging device having the signal charge storage region (3) of the first conductivity type formed on the surface side of the signal charge storage region (3) of the first conductivity type. A second conductivity type surface region (7) is formed, a predetermined voltage is supplied to the first conductivity type semiconductor substrate (1), and signal charges accumulated in the signal charge accumulation region (3) The semiconductor substrate (1) of conductivity type 1 can be swept out.
また、本発明固体撮像装置は第１の導電型の半導体基
板（１）と、この第１の導電型の半導体基板（１）上に
形成された第２の導電型の領域（２）と、この第２の導
電型の領域（２）の表面側に形成されたこの第１の導電
型の信号電荷蓄積領域（３）とを有してなる固体撮像装
置において、第１の導電型の信号電荷蓄積領域（３）と
この第２の導電型の領域（２）との間にこの信号電荷蓄
積領域（３）よりも低不純物濃度の領域（６）が形成さ
れ、この第１の導電型の半導体基板（１）に所定電圧を
供給し、この信号電荷蓄積領域（３）に蓄積される信号
電荷をこの第１の導電型の半導体基板（１）に掃き出さ
せ得るようにしたものである。Further, the solid-state imaging device of the present invention includes a first conductivity type semiconductor substrate (1), and a second conductivity type region (2) formed on the first conductivity type semiconductor substrate (1). In the solid-state imaging device having the signal charge storage region (3) of the first conductivity type formed on the surface side of the region (2) of the second conductivity type, the signal of the first conductivity type is provided. A region (6) having a lower impurity concentration than the signal charge storage region (3) is formed between the charge storage region (3) and the second conductivity type region (2). The semiconductor substrate (1) of (1) is supplied with a predetermined voltage so that the signal charges stored in the signal charge storage region (3) can be swept out to the semiconductor substrate (1) of the first conductivity type. is there.
また本発明固体撮像装置は第１の導電型の半導体基板
（１）と、この第１の導電型の半導体基板（１）上に形
成された第２の導電型の領域（２）と、この第２の導電
型の領域（２）の表面側に形成されたこの第１の導電型
の信号電荷蓄積領域（３）とを有してなる固体撮像装置
において、この第１の導電型の信号電荷蓄積領域（３）
の表面にこの第２の導電型の表面領域（７）が形成さ
れ、この第１の導電型の信号電荷蓄積領域（３）と、こ
の第２の導電型の領域（２）との間にこの信号電荷蓄積
領域（３）よりも低不純物濃度の領域（６）が形成さ
れ、この第１の導電型の半導体基板（１）に所定電圧を
供給し、この信号電荷蓄積領域（３）に蓄積される信号
電荷をこの第１の導電型の半導体基板（１）に掃き出さ
せ得るようにしたものである。Further, the solid-state imaging device of the present invention includes a first conductivity type semiconductor substrate (1), a second conductivity type region (2) formed on the first conductivity type semiconductor substrate (1), In the solid-state imaging device having the signal charge storage region (3) of the first conductivity type formed on the surface side of the region (2) of the second conductivity type, the signal of the first conductivity type is provided. Charge storage area (3)
The surface region (7) of the second conductivity type is formed on the surface of, and between the signal charge storage region (3) of the first conductivity type and the region (2) of the second conductivity type. A region (6) having an impurity concentration lower than that of the signal charge storage region (3) is formed, a predetermined voltage is supplied to the first conductivity type semiconductor substrate (1), and the signal charge storage region (3) is supplied to the region. The accumulated signal charges can be swept out to the semiconductor substrate (1) of the first conductivity type.
斯る本発明に依れば、第１の導電型の半導体基板
（１）に所定電圧VHを供給し、信号電荷蓄積領域（３）
に蓄積される信号電荷を第１の導電型の半導体基板
（１）に掃き出させ得る様になされているので、１フレ
ーム期間中又は１フィールド期間中の任意の時点に所定
電圧VHを有するパルス信号P1を第１の導電型の半導体基
板（１）に供給することによって、先に信号電荷の読み
出しが行われた時点からこのパルス信号P1が供給された
時点までに蓄積された信号電荷を第１の導電型の半導体
基板（１）に掃き出し、その後、次の読み出し時点まで
に蓄積される信号電荷を映像信号として読み出すことが
できる。従って、本発明に依れば、このパルス信号P1を
第１の導電型の半導体基板（１）に供給する時点を可変
することによって露出時間を可変し、所望の露出時間と
することができる。According to such an aspect of the present invention, a predetermined voltage V H is supplied to the semiconductor substrate (1) of the first conductivity type, and the signal charge storage region (3)
Since the signal charges stored in the first conductivity type semiconductor substrate (1) can be swept out, a predetermined voltage V H is provided at any time point during one frame period or one field period. By supplying the pulse signal P 1 to the semiconductor substrate (1) of the first conductivity type, the signal accumulated from the time when the signal charge was previously read to the time when the pulse signal P 1 was supplied. The electric charges can be swept out to the semiconductor substrate (1) of the first conductivity type, and then the signal electric charges accumulated by the next reading time can be read out as a video signal. Therefore, according to the present invention, the exposure time can be changed to a desired exposure time by changing the time point at which the pulse signal P 1 is supplied to the first conductivity type semiconductor substrate (1). .
また、本発明によれば、第１の導電型の信号電荷蓄積
領域（３）の表面に形成した第２導電型の表面領域
（７）によって信号電荷蓄積領域（３）の電位が変動し
にくくなるため、電荷の掃き出しをより低振幅の電圧で
完全に行うことができる。また本発明によれば信号電荷
蓄積領域（３）と第２の導電型の領域（２）との間の低
不純物濃度の領域（６）の存在により信号電荷蓄積領域
（３）におけるポテンシャルの谷と第２の導電型の領域
（２）におけるポテンシャルの山との距離を大きくし、
これにより第１の導電型の半導体基板（１）の電位変化
を効率よく第２の導電型の領域（２）に伝えることがで
きる。即ち、より低振幅の電圧で信号電荷の掃き出しを
完全に行うことができる。Further, according to the present invention, the potential of the signal charge storage region (3) hardly changes due to the second conductivity type surface region (7) formed on the surface of the first conductivity type signal charge storage region (3). Therefore, the charge can be completely swept out with a voltage having a lower amplitude. Further, according to the present invention, the presence of the low impurity concentration region (6) between the signal charge storage region (3) and the second conductivity type region (2) causes a potential valley in the signal charge storage region (3). And the distance between the potential peak in the second conductivity type region (2) are increased,
As a result, the potential change of the first conductivity type semiconductor substrate (1) can be efficiently transmitted to the second conductivity type region (2). That is, the signal charges can be completely swept out with a voltage having a lower amplitude.
以下、第１図〜第３図を参照して本発明固体撮像装置
の一実施例につき本発明をインターライン転送方式を採
用する固体撮像装置に適用した場合を例にして説明しよ
う。Hereinafter, one embodiment of the solid-state image pickup device of the present invention will be described with reference to FIGS. 1 to 3 by taking the case where the present invention is applied to a solid-state image pickup device adopting an interline transfer system as an example.
この第１図において、（１）はＮ型シリコン基板を示
し、本例においては、このＮ型シリコン基板（１）を基
体としてこのＮ型シリコン基板（１）上に受光部
（４）、垂直レジスタ部（５）、水平レジスタ部（図示
せず）及び出力部（図示せず）を設け、所謂インターラ
イン転送方式のCCD形撮像装置として構成する。In FIG. 1, (1) shows an N-type silicon substrate, and in this example, the N-type silicon substrate (1) is used as a base and the light-receiving portion (4) is vertically arranged on the N-type silicon substrate (1). A register unit (5), a horizontal register unit (not shown), and an output unit (not shown) are provided to constitute a so-called interline transfer type CCD image pickup device.
この場合、Ｎ型シリコン基板（１）の表面側にＰ型領
域（２）を例えばエピタキシャル成長法によって形成す
ると共に、更にこのＰ型領域（２）の表面側にN-型領域
（６）を形成する。そして、受光部（４）は、このN-型
領域（６）の表面領域に浅いP++型領域（７）を形成す
ると共にこのP++型領域（７）の下方に信号電荷蓄積領
域を構成するN+型領域（３）を形成することによって構
成する。また、この場合、P++型領域（７）及びN+型領
域（３）に隣接してチャンネルストッパ部を構成するP+
型領域（８）を形成すると共に、P++型領域（７）上にS
iO2による絶縁層（９）を形成する。In this case, a P type region (2) is formed on the surface side of the N type silicon substrate (1) by, for example, an epitaxial growth method, and an N − type region (6) is further formed on the surface side of the P type region (2). To do. Then, the light receiving part (4) forms a shallow P ++ type region (7) in the surface region of the N − type region (6) and a signal charge storage region below the P ++ type region (7). Is formed by forming an N + type region (3) that constitutes In this case, it constitutes a channel stopper portion adjacent to the P ++ type region (7) and the N + -type region (3) P +
Form the type area (8) and add S on the P ++ type area (7).
An insulating layer (9) of iO 2 is formed.
この場合、信号電荷蓄積領域を構成するＮ型領域
（３）の表面にP++型領域（７）を形成したので、このP
++型領域（７）の表面領域により、信号電荷蓄積領域
（３）の電位が変動しにくくなり、後述する信号電荷の
掃き出しをより低振幅の電圧で完全に行うことができ
る。In this case, since the P ++ type region (7) is formed on the surface of the N type region (3) which constitutes the signal charge storage region, this P
The surface area of the ++ type area (7) makes it difficult for the potential of the signal charge storage area (3) to fluctuate, and the sweeping out of the signal charge described later can be completely performed with a voltage of lower amplitude.
また、この信号電荷蓄積領域のN+型領域（３）とＰ型
領域（２）との間の、この信号電荷沈積領域（３）より
も、低不純物濃度のN-型領域（６）の存在により後述す
る信号電荷蓄積領域（３）におけるポテンシャルの谷と
Ｐ型領域（２）におけるポテンシャルの山との距離を大
きくし、これによりＮ型シリコン基板（１）の電位変化
を効率よく、Ｐ型領域（２）に伝えることができる。即
ちより低振幅の電圧で信号電荷の掃き出しを完全に行う
ことができる。Further, between the N + type region (3) and the P type region (2) of the signal charge storage region, the N − type region (6) having a lower impurity concentration than the signal charge deposition region (3) is formed. Due to the presence, the distance between the potential valley in the signal charge storage region (3) and the potential peak in the P-type region (2), which will be described later, is increased, thereby efficiently changing the potential of the N-type silicon substrate (1), It can be conveyed to the mold area (2). That is, it is possible to completely sweep out the signal charge with a voltage having a lower amplitude.
また垂直レジスタ部（５）は、読み出しゲート領域を
構成するＰ型領域（10）に隣接して信号電荷転送領域を
構成するN+型領域（11）を形成すると共に、このN+型領
域（11）上にSiO2によりなる絶縁層（９）及びSi3N4よ
りなる絶縁層（12）を介してポリシリコンよりなる転送
電極（13）を形成することによって構成する。この場
合、この転送電極（13）の一端を読み出しゲート電極
（13A）として兼ねる様にする。また信号電荷転送領域
を構成するN+型領域（11）の下方にスミアを防止するた
めのＰ型領域（14）を形成すると共に、転送電極（13）
の上方に絶縁層（９）を介して遮光用のアルミニウム層
（15）を設ける。尚、この第１図には２個の転送電極
（13）（13）のみを示しているが、本例においては、従
来周知の様に４相駆動方式によりこの垂直レジスタ部
（５）を駆動し得る様に所定数の転送電極を配置する。
また水平レジスタ部及び出力部については図示せずも、
従来周知の様に構成する。Further, the vertical register portion (5) forms an N + type region (11) forming a signal charge transfer region adjacent to the P type region (10) forming a read gate region, and at the same time, the N + type region ( 11) on which a transfer electrode (13) made of polysilicon is formed via an insulating layer (9) made of SiO 2 and an insulating layer (12) made of Si 3 N 4 . In this case, one end of the transfer electrode (13) also serves as the read gate electrode (13A). Further, a P-type region (14) for preventing smear is formed below the N + -type region (11) forming the signal charge transfer region, and the transfer electrode (13) is formed.
A light-shielding aluminum layer (15) is provided above the insulating layer (9). Although only two transfer electrodes (13) and (13) are shown in FIG. 1, in this example, the vertical register section (5) is driven by a four-phase driving method as is well known in the art. A predetermined number of transfer electrodes are arranged so as to be possible.
Further, although not shown, the horizontal register section and the output section,
It is constructed as well known in the art.
また本例においては、直流電源（16）及び（17）の夫
々の負電圧端子とＰ型領域（２）とを共通接続して接地
すると共に、直流電源（16）及び（17）の夫々の正電圧
端子をスイッチ回路（18）の一方及び他方の固定接点
（18A）及び（18B）に夫々接続し、このスイッチ回路
（18）の可動接点（18C）をＮ型シリコン基板（１）に
接続する。この場合、直流電源（16）の出力電圧VLは、
この電圧VLをＮ型シリコン基板（１）に供給した場合、
第２図に実線Ｘで示す様にＰ型領域（２）のポテンシャ
ルが表面のP++型領域（７）のポテンシャルよりも稍低
くなり、信号電荷蓄積領域（３）において信号電荷を蓄
積できると共に有効なブルーミング抑制を行うことがで
きる電圧、例えば10Vとし、また直流電源（17）の出力
電圧VHはこの電圧VHをＮ型シリコン基板（１）に供給し
た場合に第２図に破線Ｙで示す様にＰ型領域（２）のポ
テンシャルが信号電荷蓄積領域（３）のポテンシャルよ
りも低くなり、信号電荷蓄積領域（３）に蓄積された信
号電荷をＮ型シリコン基板（１）に掃き出すことができ
る電圧、例えば30Vとする。またスイッチ回路（18）は
制御信号入力端子（19）を介して供給される制御信号に
よってスイッチング制御できる様にする。Further, in this example, the negative voltage terminals of the DC power supplies (16) and (17) and the P-type region (2) are commonly connected and grounded, and the DC power supplies (16) and (17) are connected to each other. The positive voltage terminal is connected to one and the other fixed contacts (18A) and (18B) of the switch circuit (18), respectively, and the movable contact (18C) of this switch circuit (18) is connected to the N-type silicon substrate (1). To do. In this case, the output voltage V L of the DC power supply (16) is
When this voltage V L is supplied to the N-type silicon substrate (1),
As shown by the solid line X in FIG. 2, the potential of the P-type region (2) is slightly lower than the potential of the P + + -type region (7) on the surface, and signal charges can be stored in the signal charge storage region (3). A voltage capable of effectively suppressing blooming is set to, for example, 10 V, and the output voltage V H of the DC power supply (17) is a broken line in FIG. 2 when this voltage V H is supplied to the N-type silicon substrate (1). As indicated by Y, the potential of the P-type region (2) becomes lower than the potential of the signal charge storage region (3), and the signal charge stored in the signal charge storage region (3) is transferred to the N-type silicon substrate (1). The voltage that can be swept out, for example, 30V. Further, the switch circuit (18) can be switching-controlled by the control signal supplied through the control signal input terminal (19).
この様に構成された本例の固体撮像装置においては、
Ｎ型シリコン基板（１）の直流電源（16）の出力電圧10
Vを印加しておき、読み出しゲート電極（13A）に第３図
Ａに示す様な読み出しパルスP2を供給すると、信号電荷
蓄積領域（３）に蓄積された信号電荷は垂直レジスタ部
（５）に読み出される。そこで本例においては、１フィ
ールド周期で垂直帰線期間内にこの読み出しパルスP2を
読み出しゲート電極（13A）に供給する様にする。In the solid-state imaging device of this example configured as above,
Output voltage of DC power supply (16) of N type silicon substrate (1) 10
When V is applied and the read pulse P 2 as shown in FIG. 3A is supplied to the read gate electrode (13A), the signal charge accumulated in the signal charge accumulation region (3) is applied to the vertical register section (5). Read out. Therefore, in this example, the read pulse P 2 is supplied to the read gate electrode (13A) within the vertical blanking period in one field cycle.
そして、また読み出しパルスP2を読み出しゲート電極
（13A）に供給した後、１フィールド期間内の任意の時
刻にスイッチ回路（18）を制御して、Ｎ型シリコン基板
（１）に第３図Ｂに示す様に電圧30Vのパルスすなわち
掃き出しパルスP1を供給すると、先の読み出しパルスP2
の供給後、この掃き出しパルスP1の供給までの期間t2の
間に信号電荷蓄積領域（３）に蓄積された信号電荷はＮ
型シリコン基板（１）に掃き出される。このため、次の
読み出しパルスP2が読み出しゲート電極（13A）に供給
されたときは、先の掃き出しパルスP1が供給された後、
この読み出しパルスP2が供給されるまでの期間t1の間に
信号電荷蓄積領域（３）に蓄積された信号電荷が垂直レ
ジスタ部（５）に読み出されることになる。Then, after the read pulse P 2 is supplied to the read gate electrode (13A) again, the switch circuit (18) is controlled at an arbitrary time within one field period so that the N-type silicon substrate (1) is formed on the N-type silicon substrate (1) of FIG. As shown in, when a pulse with a voltage of 30 V, that is, a sweep pulse P 1, is supplied, the previous read pulse P 2
Of the signal charge accumulated in the signal charge accumulation region (3) during the period t 2 after the supply of the sweep pulse P 1 until the supply of the sweep pulse P 1.
It is swept onto the mold silicon substrate (1). Therefore, when the next read pulse P 2 is supplied to the read gate electrode (13A), after the previous sweep pulse P 1 is supplied,
The signal charges accumulated in the signal charge accumulation region (3) during the period t 1 until the read pulse P 2 is supplied are read out to the vertical register section (5).
この様に本例の固体撮像装置においては、掃き出しパ
ルスP1からこの掃き出しパルスP1に後続する読み出しパ
ルスP2までの期間t1が露出時間となるので、掃き出しパ
ルスP1をＮ型シリコン基板（１）に供給する時刻を可変
とすることで所望の露出時間とすることができる。In this solid-state imaging device of the present embodiment as so read pulse duration t 1 to P 2 which follows from the sweep-out pulse P 1 to pulse P 1 This sweeping is exposure time, sweep pulses P 1 N-type silicon substrate A desired exposure time can be obtained by varying the time supplied to (1).
従って、本例の固体撮像装置によれば、これを例えば
ビデオカメラに使用するときは、機械的シャッタ装置を
不要とし、ビデオカメラの小型、軽量、低価格化を図る
ことができるという利益がある。Therefore, according to the solid-state imaging device of the present example, when the solid-state imaging device is used in, for example, a video camera, there is an advantage that a mechanical shutter device is not required, and the video camera can be reduced in size, weight and cost. .
また本例の固体撮像装置においては、信号電荷を掃き
出すのに従来の固体撮像装置の様に垂直レジスタ部
（５）を高速動作させる必要がなく、Ｎ型シリコン基板
（１）に例えば電圧30Vのパルスを供給するのみで足り
る様になされているので、露出制御を行うに必要な電力
を大幅に低減できるという利益がある。Further, in the solid-state imaging device of this example, it is not necessary to operate the vertical register section (5) at high speed in order to sweep out the signal charge, unlike the conventional solid-state imaging device, and the voltage of 30V is applied to the N-type silicon substrate (1), for example. Since only the supply of pulses is sufficient, there is an advantage that the power required for exposure control can be significantly reduced.
また本発明は上述実施例に限らず、本発明の要旨を逸
脱することなく、その他種々の構成が取り得ることは勿
論である。Further, the present invention is not limited to the above-mentioned embodiments, and it goes without saying that various other configurations can be adopted without departing from the gist of the present invention.
本発明に依れば、露出時間を可変し、所望の露出時間
にすることができるという利益があり、これを例えばビ
デオカメラに使用する場合には、機械的シャッタ装置を
不要にし、ビデオカメラの小型、軽量、低価格化を図る
ことができるという利益がある。According to the present invention, there is an advantage that the exposure time can be changed to a desired exposure time, and when this is used in, for example, a video camera, a mechanical shutter device is not required, It has the advantages of being compact, lightweight, and cost-effective.
また本発明に依れば、斯る電気的な露出制御を行うに
際し、第１の導電型の半導体基板に所定電圧を供給すれ
ば足り、従来の様に垂直レジスタ部を高速動作させる必
要がないので、消費電力を大幅に低減できるという利益
もある。Further, according to the present invention, when performing such electrical exposure control, it is sufficient to supply a predetermined voltage to the semiconductor substrate of the first conductivity type, and it is not necessary to operate the vertical register section at high speed as in the conventional case. Therefore, there is an advantage that the power consumption can be significantly reduced.
また、本発明によれば、第１の導電型の信号電荷蓄積
領域（３）の表面に形成した第２の導電型の表面領域
（７）によって信号電荷蓄積領域（３）の電位が変動し
にくくなるため、電荷の掃き出しをより低振幅の電圧で
完全に行うことができる。また本発明によれば信号電荷
蓄積領域（３）と第２の導電型の領域（２）との間の低
不純物濃度の領域（６）の存在により信号電荷蓄積領域
（３）におけるポテンシャルの谷と第２の導電型の領域
（２）におけるポテンシャルの山との距離を大きくし、
これにより第１の導電型の半導体基板（１）の電位変化
を効率よく第２の導電型の領域（２）に伝えることがで
きる。即ち、より低振幅の電圧で信号電荷の掃き出しを
完全に行うことができる。よって、偽信号や出力信号ム
ラを抑えるとともに消費電力の低減という顕著な効果を
奏する。Further, according to the present invention, the potential of the signal charge storage region (3) changes due to the second conductivity type surface region (7) formed on the surface of the first conductivity type signal charge storage region (3). Since it becomes difficult, the charge can be completely swept out with a voltage having a lower amplitude. Further, according to the present invention, the presence of the low impurity concentration region (6) between the signal charge storage region (3) and the second conductivity type region (2) causes a potential valley in the signal charge storage region (3). And the distance between the potential peak in the second conductivity type region (2) are increased,
As a result, the potential change of the first conductivity type semiconductor substrate (1) can be efficiently transmitted to the second conductivity type region (2). That is, the signal charges can be completely swept out with a voltage having a lower amplitude. Therefore, a remarkable effect of suppressing false signals and output signal unevenness and reducing power consumption is achieved.
第１図は本発明固体撮像装置の一実施例の要部を示す構
成図、第２図は第１図例における信号電荷蓄積領域を含
む厚さ方向におけるポテンシャルを示す線図、第３図は
第１図例の説明に供する線図である。 （１）はＮ型シリコン基板、（２）はＰ型領域、（３）
は信号電荷蓄積領域、（４）は受光部、（５）は垂直レ
ジスタ部、（11）は信号電荷転送領域、（16）及び（1
7）は夫々直流電源である。FIG. 1 is a configuration diagram showing a main part of an embodiment of a solid-state image pickup device of the present invention, FIG. 2 is a diagram showing a potential in a thickness direction including a signal charge storage region in FIG. 1, and FIG. It is a diagram for explaining the example of FIG. (1) is an N-type silicon substrate, (2) is a P-type region, (3)
Is a signal charge storage region, (4) is a light receiving part, (5) is a vertical register part, (11) is a signal charge transfer region, (16) and (1
7) are DC power supplies, respectively.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 米本 和也 東京都品川区北品川６丁目７番35号 ソ ニー株式会社内 (56)参考文献 特開 昭58−125961（ＪＰ，Ａ) ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kazuya Yonemoto 6-735 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation (56) Reference JP-A-58-125961 (JP, A)
Claims (3)
電型の半導体基板上に形成された第２の導電型の領域
と、該第２の導電型の領域の表面側に形成された上記第
１の導電型の信号電荷蓄積領域とを有してなる固体撮像
装置において、 上記第１の導電型の信号電荷蓄積領域の表面に上記第２
の導電型の表面領域が形成され、 上記第１の導電型の半導体基板に所定電圧を供給し、上
記信号電荷蓄積領域に蓄積される信号電荷を上記第１の
導電型の半導体基板に掃き出させ得るようにしたことを
特徴とする固体撮像装置。1. A first conductivity type semiconductor substrate, a second conductivity type region formed on the first conductivity type semiconductor substrate, and a surface side of the second conductivity type region. A solid-state imaging device having the formed first-conductivity-type signal charge storage region, wherein the second conductivity-type signal-charge storage region is formed on the surface of the first conductivity-type signal charge storage region.
Is formed on the first conductivity type semiconductor substrate, a predetermined voltage is supplied to the first conductivity type semiconductor substrate, and the signal charges accumulated in the signal charge accumulation region are swept out to the first conductivity type semiconductor substrate. A solid-state imaging device characterized in that it is made possible.
電型の半導体基板上に形成された第２の導電型の領域
と、該第２の導電型の領域の表面側に形成された上記第
１の導電型の信号電荷蓄積領域とを有してなる固体撮像
装置において、 上記第１の導電型の信号電荷蓄積領域と上記第２の導電
型の領域との間に上記信号電荷蓄積領域よりも低不純物
濃度の領域が形成され、 上記第１の導電型の半導体基板に所定電圧を供給し、上
記信号電荷蓄積領域に蓄積される信号電荷を上記第１の
導電型の半導体基板に掃き出させ得るようにしたことを
特徴とする固体撮像装置。2. A first conductivity type semiconductor substrate, a second conductivity type region formed on the first conductivity type semiconductor substrate, and a surface side of the second conductivity type region. A solid-state imaging device having the formed first-conductivity-type signal charge storage region, wherein the first-conductivity-type signal charge storage region and the second-conductivity-type region are provided between the first-conductivity-type signal charge storage region and the second-conductivity-type region. A region having a lower impurity concentration than the signal charge storage region is formed, a predetermined voltage is supplied to the semiconductor substrate of the first conductivity type, and the signal charge accumulated in the signal charge storage region is transferred to the first conductivity type. A solid-state imaging device characterized in that it can be swept onto a semiconductor substrate.
電型の半導体基板上に形成された第２の導電型の領域
と、該第２の導電型の領域の表面側に形成された上記第
１の導電型の信号電荷蓄積領域とを有してなる固体撮像
装置において、 上記第１の導電型の信号電荷蓄積領域の表面に上記第２
の導電型の表面領域が形成され、 上記第１の導電型の信号電荷蓄積領域と上記第２の導電
型の領域との間に上記信号電荷蓄積領域よりも低不純物
濃度の領域が形成され、 上記第１の導電型の半導体基板に所定電圧を供給し、上
記信号電荷蓄積領域に蓄積される信号電荷を上記第１の
導電型の半導体基板に掃き出させ得るようにしたことを
特徴とする固体撮像装置。3. A first conductivity type semiconductor substrate, a second conductivity type region formed on the first conductivity type semiconductor substrate, and a surface side of the second conductivity type region. A solid-state imaging device having the formed first-conductivity-type signal charge storage region, wherein the second conductivity-type signal-charge storage region is formed on the surface of the first conductivity-type signal charge storage region.
A conductive type surface region is formed, and a region having a lower impurity concentration than the signal charge storing region is formed between the first conductive type signal charge storage region and the second conductive type region. A predetermined voltage is supplied to the semiconductor substrate of the first conductivity type so that the signal charges stored in the signal charge storage region can be swept out to the semiconductor substrate of the first conductivity type. Solid-state imaging device.
Priority Applications (12)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61307474A JP2517882B2 (en) | 1986-12-23 | 1986-12-23 | Solid-state imaging device |
| KR1019870011443A KR970007895B1 (en) | 1986-12-23 | 1987-10-15 | Solid state imager devices and method of controlling exposure time |
| US07/110,844 US4875100A (en) | 1986-10-23 | 1987-10-21 | Electronic shutter for a CCD image sensor |
| EP87309365A EP0265271B1 (en) | 1986-10-23 | 1987-10-22 | Electronic shutter for an electronic camera and method of utilizing a CCD image sensor as electronic shutter for such a camera |
| SG1996008391A SG74557A1 (en) | 1986-10-23 | 1987-10-22 | Solid state imager devices |
| DE3752305T DE3752305T2 (en) | 1986-10-23 | 1987-10-22 | Electronic shutter for electronic camera |
| EP95202218A EP0683603B1 (en) | 1986-10-23 | 1987-10-22 | Electronic shutter for electronic camera |
| DE3751775T DE3751775T2 (en) | 1986-10-23 | 1987-10-22 | Electronic shutter for an electronic camera and method for using a CCD image sensor as an electronic shutter for such a camera |
| KR96039593A KR0140554B1 (en) | 1986-12-23 | 1996-09-13 | Solid state imager device |
| KR97000625A KR0128713B1 (en) | 1986-12-23 | 1997-01-13 | Interline transfer type solid state image pick-up device drivig method |
| HK98107004A HK1007833A1 (en) | 1986-10-23 | 1998-06-26 | Electronic shutter for an electronic camera and method of utilizing a ccd image sensor as electronic shutter for such a camera |
| HK98114853A HK1013568A1 (en) | 1986-10-23 | 1998-12-22 | Electronic shutter for electronic camera |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61307474A JP2517882B2 (en) | 1986-12-23 | 1986-12-23 | Solid-state imaging device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63158981A JPS63158981A (en) | 1988-07-01 |
| JP2517882B2 true JP2517882B2 (en) | 1996-07-24 |
Family
ID=17969514
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61307474A Expired - Lifetime JP2517882B2 (en) | 1986-10-23 | 1986-12-23 | Solid-state imaging device |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP2517882B2 (en) |
| KR (2) | KR970007895B1 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2822393B2 (en) * | 1988-07-30 | 1998-11-11 | ソニー株式会社 | Solid-state imaging device and driving method thereof |
| JP3015246B2 (en) * | 1993-10-08 | 2000-03-06 | シャープ株式会社 | Solid-state imaging device |
| KR100450670B1 (en) * | 2002-02-09 | 2004-10-01 | 삼성전자주식회사 | Image sensor having photo diode and method for manufacturing the same |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5762557A (en) * | 1980-10-02 | 1982-04-15 | Nec Corp | Solid state image pickup device and driving method therefor |
| JPS58125961A (en) * | 1982-01-21 | 1983-07-27 | Nec Corp | Driving method of charge transfer image pickup device |
| JPS58187082A (en) * | 1982-04-26 | 1983-11-01 | Matsushita Electric Ind Co Ltd | Driving method of solid-state image pickup device |
| JPS59202662A (en) * | 1983-04-30 | 1984-11-16 | Sharp Corp | Solid-state image pickup device |
-
1986
- 1986-12-23 JP JP61307474A patent/JP2517882B2/en not_active Expired - Lifetime
-
1987
- 1987-10-15 KR KR1019870011443A patent/KR970007895B1/en not_active IP Right Cessation
-
1996
- 1996-09-13 KR KR96039593A patent/KR0140554B1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR970007895B1 (en) | 1997-05-17 |
| JPS63158981A (en) | 1988-07-01 |
| KR0140554B1 (en) | 1998-06-15 |
| KR880008642A (en) | 1988-08-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0683603B1 (en) | Electronic shutter for electronic camera | |
| US3931465A (en) | Blooming control for charge coupled imager | |
| US5510285A (en) | Method for fabricating CCD image sensors | |
| JP2525781B2 (en) | Driving method for solid-state imaging device | |
| US5270531A (en) | Source follower circuit for image sensor | |
| EP0247503B1 (en) | Method of driving a solid state imager device | |
| KR930002818B1 (en) | Ccd imager | |
| KR100306305B1 (en) | Solid state imaging device and method | |
| JP2517882B2 (en) | Solid-state imaging device | |
| EP0088134B1 (en) | Solid state image pickup device | |
| JPH0759055B2 (en) | Solid-state imaging device | |
| JP2565247B2 (en) | Exposure time control method for solid-state imaging device and video camera | |
| US4780765A (en) | Solid state image pick-up device | |
| JPH04315473A (en) | Solid-state image pickup element | |
| JP2517882C (en) | ||
| JP2565247C (en) | ||
| KR950002194B1 (en) | Frame transfer style ccd image sensor | |
| JP2532645B2 (en) | Solid-state imaging device | |
| JP2594923B2 (en) | Solid-state imaging device | |
| JPH0513746A (en) | Solid-state image pickup device | |
| JP3158324B2 (en) | Driving method of solid-state imaging device | |
| JPS63308373A (en) | Charge transfer device | |
| JPH01208862A (en) | Solid-state image sensing device | |
| JPH045835A (en) | Solid-state image sensing device | |
| JP2526886B2 (en) | Solid-state imaging device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |