JP2517862Y2 - Clamp circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a clamp circuit used in a video tape recorder, a television receiver, or the like, and in particular, a plurality of video signals are clamped and then switched and output. Regarding the clamp circuit.

(B) Conventional technology A switch circuit that switches and outputs a plurality of composite video signals (for example, those generated by video tape recorders) according to control signals is available from CQ Publishing Co., Ltd. on March 20, 1985. It is described on page 891 of the published “'85 Sanyo Semiconductor Handbook”. Since the plurality of composite video signals applied to the video tape recorder electronic switch LA-7018 are supplied from various sources, their DC levels are different from each other. Therefore, it is necessary to clamp the composite video signals in order to keep the DC levels of the plurality of composite video signals constant. As such a switchable clamp circuit, one shown in FIG. 2 can be considered. In FIG. 2, if the clamp levels of the clamp circuits (1a) to (1n) are set equal and the switch (2) is selected so as to obtain a desired signal, video signals having the same DC level are output terminals (3). ) Can be obtained.

(C) Problem to be solved by the invention By the way, as the clamp circuits (1a) to (1n) shown in FIG. 2, there is no problem if a clamp circuit having a relatively small number of elements as shown in FIG. 3 which is generally used is used. . However, a feedback-type clamp circuit has recently been proposed which prevents fluctuations in the amplitude of the video signal and contraction of the sync signal that occur during clamping, but the problem is that such a clamp circuit has a large number of elements. was there. Further, in the configuration of the clamp circuit as shown in FIG. 2, since the clamp level is independently determined, there is a problem that the clamp level fluctuates due to element variations and the like. A feedback type clamp circuit is described, for example, in Japanese Utility Model Laid-Open No. 62-66464.

(D) Means for Solving the Problems The present invention has been made in view of the above points, and a first signal source for generating a video signal and a video signal from the first signal source are used for the first clamp. A first clamping transistor that is applied to the emitter through a capacitor, and a first bias circuit that applies a bias to the first clamping transistor,
A first output circuit that outputs a video signal from the emitter of the first clamping transistor according to a control signal, a second signal source that generates a video signal, and a video signal from the second signal source is a second clamp. Second clamp transistor applied to the emitter through the capacitor for the second clamp, a second bias circuit for biasing the second clamp transistor, and a video signal from the emitter of the second clamp transistor according to a control signal. A second output circuit for outputting
A detection circuit for detecting a video signal from the first or second output circuit, wherein a value of a current flowing through the first or second bias circuit is controlled according to a detection output of the detection circuit. To do.

(E) Function According to the present invention, the number of elements can be reduced because the detectors of a plurality of feedback-type clamp circuits are also used. Further, according to the present invention, since the level of the reference power source that determines the clamp level is also used, a plurality of video signals can be clamped at the same clamp level.

(F) Embodiment FIG. 1 is a circuit diagram showing an embodiment of the present invention.
Is a first signal source, (5) is a first clamping transistor whose emitter is connected to the first signal source (4) via a first clamping capacitor (6), and (7) is the first clamping transistor A first bias circuit for applying a bias to (5), ( 8 ) a first output circuit for outputting a video signal from the first signal source (4) in response to a control signal from a control terminal (9), (10) ) Is a second signal source, and (11) is an emitter whose second signal source (1
Second clamping transistor connected to (0), (13)
Is a second bias circuit for applying a bias to the second clamping transistor (11), and ( 14 ) is the second signal source (1
A second output circuit for outputting a video signal from (0) according to a control signal from a control terminal (15), (16) an output terminal from which a clamped video signal is derived, and ( 17 ) a first output circuit. And the second output circuits ( 8 ) and ( 14 ) for comparing the sync tip level of the video signal with the level of the reference power source (18) for detection.

Now, assuming that the positive video signal of the first signal source (4) is clamped and led to the output terminal (16), the first switch (19) is turned on and the second switch (20) is turned off. Then, the first output circuit ( 8 ) becomes operable and the second output circuit ( 14 ) stops operating. Then, when the synchronizing signal in the video signal from the first signal source (4) is applied to the emitter of the first clamping transistor (5) through the first clamping capacitor (6), the emitter voltage is changed. descend. Then, the base voltage of the transistor (21) forming the first output circuit ( 8 ) also drops, so that the voltage of the output terminal (16) drops. Then, the transistor (23)
Of the transistor (24) increases, the collector current of the transistor (24) increases, and the collector current of the transistor (26) forming a current mirror circuit together with the transistor (25) increases. Since the voltage at the point A of the first bias circuit (7) rises in accordance with the increase of the collector current, the emitter current of the first clamp transistor (5) increases and the first clamp capacitor (6) is charged. To be done.

Next, when a video signal other than the synchronizing signal period is generated from the first signal source (4), the base voltage of the transistor (21) rises and the current flowing through the current mirror circuit ( 22 ) increases, so that the detection circuit ( 17) ) Transistor (23) turns on and transistor (24) turns off. Therefore, the transistor (2
5) and (26) turn off, and the first clamping transistor (5) turns off because its base is grounded. As a result, the signal from the first signal source (4) is superimposed on the DC voltage charged in the first clamping capacitor (6) during the synchronization signal period, and is output via the first output circuit ( 8 ) to the output terminal. (1
6) is derived.

Therefore, the video signal from the first signal source (4) is clamped to the sync tip at a level according to the reference voltage of the reference power source (18).

Next, the case of selecting the video signal from the second signal source (10) will be described. In this case, the first switch (19) is turned off, the second switch (20) is turned on, the first output circuit ( 8 ) is stopped, and the second output circuit ( 14 ) is operated. Then, the video signal from the second signal source (10) is
It is applied to the detection circuit ( 17 ) via the output circuit ( 14 ) and detected in the same manner as in the above case. Then, the operation of the second clamping transistor (11) is controlled according to the detected output, so that a video signal clamped under the same conditions as in the above case is obtained at the output terminal (16).

Therefore, according to the circuit of FIG. 1, since the detection unit can be shared, the clamping conditions can be made the same and the number of elements can be reduced.

Although FIG. 1 illustrates the case of two inputs and one output, the present invention is not limited to this, and only by adding a clamping transistor, a clamping capacitor, a bias circuit and an output circuit, A circuit with multiple inputs and one output can be configured. Especially, as the number of inputs increases, the effect of the present invention increases.

(G) Effect of the Invention As described above, according to the present invention, it is possible to reduce the number of elements of the clamp circuit that clamps a plurality of video signals and selects and outputs them. Further, according to the present invention, since the sync chips of a plurality of video signals can be clamped at the same level, a stable clamp operation can be performed.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIGS. 2 and 3 are circuit diagrams showing a conventional clamp circuit. (4) ... First signal source, (5) ... First clamp transistor, (6) ... First clamp capacitor,
(7) ... First bias circuit, ( 8 ) ... First output circuit, (10) ... Second signal source, (11) ... Second clamp transistor, (12) ... Second clamp circuit Capacitors,
(13) …… Second bias circuit, ( 14 ) …… Second output circuit, (16) …… Output terminal, ( 17 ) …… Detection circuit.

Claims (1)

(57) [Scope of utility model registration request] 1. A first signal source for generating a video signal, a first clamping transistor to which a video signal from the first signal source is applied to an emitter via a first clamping capacitor, and the first clamp. For applying bias to the power transistor
A bias circuit, a first output circuit for outputting a video signal from the emitter of the first clamping transistor in response to a control signal, a second signal source for generating a video signal, and a video signal from the second signal source And a second clamp transistor that is applied to the emitter via the second clamp capacitor, and a second bias transistor that applies a bias to the second clamp transistor.
A bias circuit; a second output circuit for outputting a video signal from the emitter of the second clamping transistor in response to a control signal; and a detection circuit for detecting the level of the video signal from the first or second output circuit. The clamp circuit is characterized in that the output bias levels of the first and second bias circuits are controlled according to the detection output of the detection circuit.