JP2506726B2 - Method of manufacturing nonvolatile memory device - Google Patents

Method of manufacturing nonvolatile memory device

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Publication number
JP2506726B2
JP2506726B2 JP62039454A JP3945487A JP2506726B2 JP 2506726 B2 JP2506726 B2 JP 2506726B2 JP 62039454 A JP62039454 A JP 62039454A JP 3945487 A JP3945487 A JP 3945487A JP 2506726 B2 JP2506726 B2 JP 2506726B2
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JP
Japan
Prior art keywords
silicon nitride
memory device
nitride film
nonvolatile memory
flow rate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62039454A
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Japanese (ja)
Other versions
JPS63205965A (en
Inventor
幹二 平野
和夫 佐藤
毅 福富
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
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Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP62039454A priority Critical patent/JP2506726B2/en
Publication of JPS63205965A publication Critical patent/JPS63205965A/en
Application granted granted Critical
Publication of JP2506726B2 publication Critical patent/JP2506726B2/en
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Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 産業上の利用分野 本発明は、金属−窒化シリコン膜−酸化シリコン膜−
半導体(以下、MNOSと略す)型の電界効果トランジスタ
から成る不揮発性記憶装置の製造方法に関し、記憶保持
特性の優れたMNOS型不揮発性記憶装置を制御性良く、か
つ高い生産性で製造する方法を提供するものである。
TECHNICAL FIELD The present invention relates to a metal-silicon nitride film-silicon oxide film-
A method for manufacturing a nonvolatile memory device comprising a semiconductor (hereinafter abbreviated as MNOS) type field effect transistor, and a method for manufacturing a MNOS nonvolatile memory device having excellent memory retention characteristics with good controllability and high productivity. It is provided.

従来の技術 MNOS型不揮発性記憶装置は、窒化シリコン膜と酸化シ
リコン膜の界面、または窒化シリコン膜中に、半導体側
からトンネリング媒体と成り得る酸化シリコン膜を介し
て行われる電気的な電荷の注入と、その蓄積により、ト
ランジスタのしきい値電圧(Vth)を変化させ、情報を
記憶させるものであり、特にその記憶保持特性の確保
が、MNOS型不揮発性記憶装置の実用上の最大の問題とな
っている。
2. Description of the Related Art The MNOS nonvolatile memory device has an electrical charge injection from the semiconductor side through the silicon oxide film that can serve as a tunneling medium into the interface between the silicon nitride film and the silicon oxide film or into the silicon nitride film. And, by accumulating the information, the threshold voltage (Vth) of the transistor is changed to store information. In particular, securing the memory retention characteristic is the biggest practical problem of the MNOS nonvolatile memory device. Has become.

MNOS型不揮発性記憶装置の記憶保持特性は一般に次式
で表わすことができる。
The memory retention characteristic of the MNOS type nonvolatile memory device can be generally expressed by the following equation.

ただし、QN;窒化シリコン中に蓄積された電荷量、J0;
トンネリングで半導体基板中に流れる電流、JN:熱的な
励起により、トラップ間または窒化シリコンの伝導帯ま
たは価電子帯との間の遷移を経てゲート電極に流れる電
流である。
However, Q N ; Amount of charge accumulated in silicon nitride, J 0 ;
Current that flows in a semiconductor substrate by tunneling, J N : current that flows in a gate electrode through a transition between traps or a conduction band or a valence band of silicon nitride due to thermal excitation.

上式よりわかるように、記憶保持特性をよくするため
には、基板およびゲート電極に流出する電荷成分J0およ
びJNをできるだけ小さくすればよいが、J0およびJNは、
パラメータとして、酸化シリコン膜の厚さ、電荷の蓄積
されたトラップの分布、蓄積された電荷量、酸化シリコ
ン−半導体界面および、酸化シリコン膜−窒化シリコン
膜界面の状態にも依存するが、とりわけ、ゲート絶縁膜
である窒化シリコン膜の電気伝導度に顕著な依存性があ
り、この電気伝導度が低ければ低いほど、MNOS型不揮発
性記憶装置の記憶保持特性は改善される。
As can be seen from the above equation, in order to improve the memory retention characteristics, the charge components J 0 and J N flowing out to the substrate and the gate electrode should be made as small as possible, but J 0 and J N are
The parameters also depend on the thickness of the silicon oxide film, the distribution of traps in which charges are accumulated, the amount of accumulated charges, the state of the silicon oxide-semiconductor interface, and the state of the silicon oxide film-silicon nitride film interface. There is a significant dependence on the electrical conductivity of the silicon nitride film that is the gate insulating film, and the lower the electrical conductivity, the better the memory retention characteristics of the MNOS nonvolatile memory device.

発明が解決しようとする問題点 しかしながら、電荷トラップ量と窒化シリコン膜の電
気伝導度とはほぼ比例関係にあり、例えば十分なΔVth
(しきい値電圧の変化量)を得ようとすると、電荷トラ
ップ量の多い、すなわち、電気伝導度の高い窒化シリコ
ン膜を用いねばならず、従来構造では大幅な記憶保持特
性の改善が期待できないのが現状である。
Problems to be Solved by the Invention However, the amount of charge traps and the electrical conductivity of the silicon nitride film are in a substantially proportional relationship, and for example, a sufficient ΔVth
In order to obtain (amount of change in threshold voltage), a silicon nitride film with a large amount of charge traps, that is, a high electric conductivity must be used, and a significant improvement in memory retention characteristics cannot be expected with the conventional structure. is the current situation.

本発明の第1の目的は、この問題に対し、 MNOS型不揮発性記憶装置の記憶保持特性を著しく向上
させる製造方法を提供しようとするものである。
A first object of the present invention is to provide a manufacturing method for remarkably improving the memory retention characteristic of the MNOS type nonvolatile memory device with respect to this problem.

問題点を解決するための手段 この目的達成のため、本発明は、窒化シリコン膜を形
成させる際に、化学組成比の異なる比較的電気伝導度の
高い窒化シリコン膜と比較的電気伝導度の低い窒化シリ
コン膜を積層させる工程を含む不揮発性記憶装置の製造
方法である。そして、積層される化学組成比の異なる窒
化シリコン膜は、大気下に晒すことなく常に減圧下で連
続して気相成長させることが適当である。
Means for Solving the Problems To achieve this object, according to the present invention, when forming a silicon nitride film, a silicon nitride film having a relatively high electrical conductivity and a relatively low electrical conductivity having different chemical composition ratios are provided. A method for manufacturing a non-volatile memory device including a step of stacking a silicon nitride film. It is appropriate that the laminated silicon nitride films having different chemical composition ratios are continuously vapor-phase grown under reduced pressure without being exposed to the atmosphere.

作用 本発明によれば、化学組成比が異なる比較的電気伝導
度の高い窒化シリコン膜と比較的電気伝導度の低い窒化
シリコン膜を、減圧下で連続して積層させることによ
り、大気圧下または減圧下の気相成長法により形成され
た単層の窒化シリコン膜より優れた記憶保持特性を得る
ことができる。
Effect According to the present invention, a silicon nitride film having a relatively high electrical conductivity and a silicon nitride film having a relatively low electrical conductivity, which have different chemical composition ratios, are continuously laminated under a reduced pressure so that It is possible to obtain memory retention characteristics superior to those of a single-layer silicon nitride film formed by vapor deposition under reduced pressure.

実施例 以下、本発明の具体的な実施例を図面を用いて説明す
る。第1図は本発明の一実施例によって製作された半導
体装置の断面図である。第1図の装置は、まず、例え
ば、N型シリコン基板1に、ソース領域2,ドレイン領域
3を周知の選択拡散技術で形成し、選択拡散時に形成し
た酸化シリコン膜4の所定部分を通常のフォトエッチン
グで開孔した後、開孔部分に20Å程度の薄い酸化シリコ
ン膜5を800℃、酸素雰囲気中で酸化して形成する。
Examples Hereinafter, specific examples of the present invention will be described with reference to the drawings. FIG. 1 is a sectional view of a semiconductor device manufactured according to an embodiment of the present invention. In the device of FIG. 1, first, for example, a source region 2 and a drain region 3 are formed on an N-type silicon substrate 1 by a well-known selective diffusion technique, and a predetermined portion of a silicon oxide film 4 formed at the time of selective diffusion is formed by a normal method. After the holes are formed by photoetching, a thin silicon oxide film 5 having a thickness of about 20 Å is formed by oxidizing the holes at 800 ° C. in an oxygen atmosphere.

次いで、酸化シリコン膜5の上に、減圧下でジクロル
シラン(SiH2Cl2)とアンモニア(NH3)の化学反応に基
づく気相成長法によって、膜質の異なる窒化シリコン膜
6及び同7を連続して形成させる。本実施例では、初め
に、温度750℃,NH3/SiH2Cl2=5,圧力300〜400mTorrの減
圧下で比較的電気伝導度の高い第1の窒化シリコン膜6
を約200Å成長し、次に、成長終了後直ちに真空引きを
行ない、十分な真空度(例えば1mTorr以下)に達した
後、再び反応ガスを導入し、温度750℃,NH3/SiH2Cl2=5
0,圧力500〜600mTorrの減圧下で、比較的電気伝導度の
低い第2の窒化シリコン膜7を約300Å形成させた。真
空引きをすることにより、一旦反応ガスの混合比を初期
状態にすることができる。さらに、反応ガスを導入する
とき反応ガスが引き込まれることになるため、均一な反
応ガスの流量比とすることができる。これにより、大量
のMNOS型不揮発性記憶装置を製造した場合においても、
安定した記憶保持特性を実現することができる。そし
て、最後に、ゲート電極としてアルミニウム薄膜8の通
常の蒸着法により約1.0μm被着する。なお、他の工程
は、通常のMOSプロセスに従ってMNOS型不揮発性記憶装
置を形成した。
Then, the silicon nitride films 6 and 7 having different film qualities are continuously formed on the silicon oxide film 5 by a vapor phase growth method based on a chemical reaction of dichlorosilane (SiH 2 Cl 2 ) and ammonia (NH 3 ) under reduced pressure. To form. In this example, first, the first silicon nitride film 6 having a relatively high electric conductivity under a reduced pressure of 750 ° C., NH 3 / SiH 2 Cl 2 = 5, and a pressure of 300 to 400 mTorr.
For about 200Å, and then immediately after the growth is completed, evacuation is performed, and after reaching a sufficient degree of vacuum (for example, 1 mTorr or less), the reaction gas is introduced again, and the temperature is 750 ° C., NH 3 / SiH 2 Cl 2 = 5
A second silicon nitride film 7 having a relatively low electric conductivity was formed at a pressure of 500 to 600 mTorr at a pressure of about 300 Å. By evacuation, the mixing ratio of the reaction gas can be once returned to the initial state. Furthermore, since the reaction gas is drawn in when the reaction gas is introduced, a uniform flow rate ratio of the reaction gas can be obtained. As a result, even when a large number of MNOS nonvolatile memory devices are manufactured,
Stable memory retention characteristics can be realized. Finally, as the gate electrode, the aluminum thin film 8 is deposited by about 1.0 μm by the usual vapor deposition method. In the other steps, the MNOS type nonvolatile memory device was formed according to a normal MOS process.

以上のようにして得られたMNOS型不揮発性記憶装置の
記憶保持特性の一例を第2図に示す。横軸はしきい値電
圧、縦軸は蓄積された電荷の減衰率(2Vth/2logt,Vth:
しきい値電圧,t:時間)を示している。この図の直線の
傾きが小さいほど記憶保持特性が優れていることを表わ
す。第2図に示すように、本発明の製造方法により形成
された不揮発性記憶装置の記憶保持特性は、直線9の特
性を示し、この特性は、大気圧下の気相成長法のみを用
いた単層の窒化シリコン膜の場合の直線10、減圧下の気
相成長法のみを用いた単層の窒化シリコン膜の場合の直
線11のいずれの直線と比較しても、傾きが小さく、優れ
た記憶保持特性を有していることがわかる。
An example of the memory retention characteristics of the MNOS type nonvolatile memory device obtained as described above is shown in FIG. The horizontal axis is the threshold voltage, and the vertical axis is the decay rate of the accumulated charge (2Vth / 2logt, Vth:
Threshold voltage, t: time). The smaller the slope of the straight line in this figure, the better the memory retention characteristics. As shown in FIG. 2, the memory retention characteristic of the nonvolatile memory device formed by the manufacturing method of the present invention shows a characteristic of a straight line 9, and this characteristic is obtained by using only the vapor phase growth method under atmospheric pressure. Compared to any one of the straight line 10 in the case of a single-layer silicon nitride film and the straight line 11 in the case of a single-layer silicon nitride film using only the vapor phase growth method under reduced pressure, the slope is small and excellent. It can be seen that it has a memory retention characteristic.

一方、窒化シリコン膜を積層する工程を減圧下で連続
して行なった場合と、積層する際に第1層形成後一度大
気圧下に晒した場合における集積回路としての歩留りを
比較したところ、減圧下で連続して積層した場合の方が
平均して5〜10%程度、高い歩留りを示した。この差
は、大気圧下に晒した場合、微小ダスト等による微粒子
の付着により局部的な界面状態の異常が発生したり、ま
た、大気圧にふれることにより表面状態に化学的組成変
化が起こったことが主な原因である。よって、窒化シリ
コン膜を減圧下で連続して積層することにより、制御性
の良い、かつ生産性の高い半導体記憶装置の製造が可能
となる。
On the other hand, when comparing the yields as an integrated circuit in the case where the step of laminating the silicon nitride film is continuously performed under reduced pressure and the case where the step of exposing the layer to the atmospheric pressure once after forming the first layer is compared, the yield is reduced. In the case where the layers were successively laminated below, a higher yield was shown, on the order of 5 to 10% on average. The difference is that when exposed to atmospheric pressure, local abnormalities in the interface occur due to the adhesion of fine particles such as fine dust, and the chemical composition changes in the surface state due to exposure to atmospheric pressure. That is the main reason. Therefore, by successively stacking the silicon nitride films under reduced pressure, it is possible to manufacture a semiconductor memory device with good controllability and high productivity.

窒化シリコン膜成長時の温度、反応ガス流量比は、本
実施例以外に、減圧下で温度700℃〜800℃、流量比(NH
3/SiH2Cl2)が第1層形成時0.1〜100、第2層形成時10
〜1000の条件下で多種の窒化シリコン膜を積層して検討
を行なったが、いずれの場合でも本発明の効果が見い出
された。本実施例では、化学組成比の異なる2層の窒化
シリコン膜を積層した例を示したが、3層以上の窒化シ
リコン膜を減圧下で積層させてもよい。
The temperature and the reaction gas flow rate ratio during the growth of the silicon nitride film are not limited to those in this example, and the temperature is 700 ° C. to 800 ° C. under a reduced pressure and the flow rate ratio (NH
3 / SiH 2 Cl 2 ) is 0.1 to 100 when the first layer is formed, 10 when the second layer is formed.
Various types of silicon nitride films were stacked under the conditions of up to 1000, and the study was conducted. In any case, the effect of the present invention was found. In this embodiment, an example is shown in which two layers of silicon nitride films having different chemical composition ratios are laminated, but three or more layers of silicon nitride films may be laminated under reduced pressure.

また、本実施例ではソース,ドレインを選択拡散で形
成したPチャネル型のMNOS型不揮発性記憶装置を形成す
る場合について説明を行なってきたが、Nチャネル型の
MNOS型不揮発性記憶装置でも使用できる。また、ゲート
電極としてポリシリコン,タングステンシリサイド等の
高融点金属を用いて、本発明の製造方法によりゲート絶
縁膜を作製して、周知のセルフアライン技術によりソー
ス,ドレインを形成してもよい。
In this embodiment, the case of forming the P-channel type MNOS nonvolatile memory device in which the source and the drain are formed by selective diffusion has been described.
It can also be used in the MNOS type non-volatile storage device. Alternatively, a high-melting point metal such as polysilicon or tungsten silicide may be used as the gate electrode to form a gate insulating film by the manufacturing method of the present invention, and the source and drain may be formed by a known self-alignment technique.

発明の効果 以上のように、本発明はMNOS型不揮発性記憶装置のゲ
ート絶縁膜である窒化シリコン膜を形成する際に、化学
的組成の異なる比較的電気伝導度の高い窒化シリコン膜
と比較的電気伝導度の低い窒化シリコン膜を減圧下で連
続して積層することにより、大気圧下のみ、または減圧
下のみで形成する単層の窒化シリコン膜を用いたMNOS型
不揮発性記憶装置に比べ、記憶保持特性の著しく優れた
ものを作製することができ、かつ、多層の窒化シリコン
膜を形成する際に制御性の良い、生産性の高い製造を行
なうことができ、MNOS型不揮発性記憶装置の高性能化,
高生産性化に大きく寄与するものである。
As described above, according to the present invention, when forming a silicon nitride film that is a gate insulating film of a MNOS type nonvolatile memory device, a silicon nitride film having a relatively high chemical conductivity and a relatively high electrical conductivity is used. Compared to the MNOS nonvolatile memory device using a single-layer silicon nitride film formed only under atmospheric pressure or only under reduced pressure by successively stacking silicon nitride films having low electric conductivity under reduced pressure, A MNOS nonvolatile memory device can be manufactured which has excellent memory retention characteristics and can be manufactured with good controllability and high productivity when forming a multilayer silicon nitride film. High performance,
This greatly contributes to high productivity.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例で得られた半導体装置の断面
図、第2図は本発明の効果を説明するための特性図であ
る。 1……シリコン基板、2,3……ソース及びドレイン、4
……酸化シリコン膜、5……極薄酸化シリコン膜、6,7
……窒化シリコン膜、8……アルミニウム膜。
FIG. 1 is a sectional view of a semiconductor device obtained in one embodiment of the present invention, and FIG. 2 is a characteristic diagram for explaining the effect of the present invention. 1 ... Silicon substrate, 2, 3 ... Source and drain, 4
...... Silicon oxide film, 5 ... Ultra-thin silicon oxide film, 6,7
...... Silicon nitride film, 8 …… Aluminum film.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】一導電型半導体基板面に、正孔または電子
のトンネリング媒体と成り得る薄い酸化シリコン膜を形
成する工程と、前記酸化シリコン膜上に、電気伝導度の
高い窒化シリコン膜をジクロフレシラン(SiH2Cl2)と
アンモニア(NH3)の流量比NH3/SiH2Cl2=0.1〜100で気
相成長させる工程と、真空引きをする工程と、前記電気
伝導度の高い窒化シリコンの上に電気伝導度の低い窒化
シリコン膜を流量比NH3/SiH2Cl2=10〜1000で気相成長
させる工程を含み、電気伝導度の高い窒化シリコンを気
相成長させるときのジクロルシランとアンモニアの流量
比は電気伝導度の低い窒化シリコンを気相成長させると
きの流量比よりも小さいことを特徴とする不揮発性記憶
装置の製造方法。
1. A step of forming a thin silicon oxide film, which can serve as a tunneling medium for holes or electrons, on a surface of a semiconductor substrate of one conductivity type, and a silicon nitride film having a high electric conductivity is formed on the silicon oxide film. (SiH 2 Cl 2 ) and ammonia (NH 3 ) at a flow rate ratio NH 3 / SiH 2 Cl 2 = 0.1 to 100, vapor phase growth, vacuuming, and silicon nitride having high electrical conductivity. Dichlorosilane and ammonia for vapor-depositing highly conductive silicon nitride are included, including the step of vapor-depositing a silicon nitride film with low electrical conductivity at a flow rate ratio of NH 3 / SiH 2 Cl 2 = 10 to 1000. The method for manufacturing a non-volatile memory device, wherein the flow rate ratio is smaller than the flow rate ratio when vapor-depositing silicon nitride having low electric conductivity.
JP62039454A 1987-02-23 1987-02-23 Method of manufacturing nonvolatile memory device Expired - Lifetime JP2506726B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62039454A JP2506726B2 (en) 1987-02-23 1987-02-23 Method of manufacturing nonvolatile memory device

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Application Number Priority Date Filing Date Title
JP62039454A JP2506726B2 (en) 1987-02-23 1987-02-23 Method of manufacturing nonvolatile memory device

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Publication Number Publication Date
JPS63205965A JPS63205965A (en) 1988-08-25
JP2506726B2 true JP2506726B2 (en) 1996-06-12

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JPH09161628A (en) * 1995-12-13 1997-06-20 Shibafu Eng Kk Contact material for vacuum valve and manufacture thereof
JP4849711B2 (en) * 2000-10-31 2012-01-11 ルネサスエレクトロニクス株式会社 Manufacturing method of semiconductor integrated circuit device
JP4151229B2 (en) 2000-10-26 2008-09-17 ソニー株式会社 Nonvolatile semiconductor memory device and manufacturing method thereof
JP5311851B2 (en) * 2007-03-23 2013-10-09 株式会社半導体エネルギー研究所 Semiconductor device

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* Cited by examiner, † Cited by third party
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