JP2504538Y2 - LED array device - Google Patents
LED array deviceInfo
- Publication number
- JP2504538Y2 JP2504538Y2 JP1990406069U JP40606990U JP2504538Y2 JP 2504538 Y2 JP2504538 Y2 JP 2504538Y2 JP 1990406069 U JP1990406069 U JP 1990406069U JP 40606990 U JP40606990 U JP 40606990U JP 2504538 Y2 JP2504538 Y2 JP 2504538Y2
- Authority
- JP
- Japan
- Prior art keywords
- led array
- array chip
- emitting surface
- led
- light emitting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10156—Shape being other than a cuboid at the periphery
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Dot-Matrix Printers And Others (AREA)
- Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
【０００１】[0001]
【産業上の利用分野】この考案は、ＬＥＤプリントヘッ
ド及びＬＥＤ書き込み光源として使用するＬＥＤアレイ
装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LED print head and an LED array device used as an LED writing light source.
【０００２】[0002]
【従来の技術】従来のＬＥＤアレイチップは、図１２〜
１７に一例を示している。この内、図１２〜１４は、基
板の表面１にＬＥＤアレイを施したＬＥＤアレイチップ
Ｄであり、ＬＥＤ３ａの光放射面３の両方向に電極２を
取り出した例、図１５は、電極２を片側のみ取り出した
例を示している。そして、電極２に、極細金線又はアル
ミ線５により、ワイヤーボンディングする。この際に、
電極２上にボールボンディング或いはステッチボンディ
ングをして、ＬＥＤアレイチップＤに結線している。2. Description of the Related Art A conventional LED array chip is shown in FIG.
An example is shown in FIG. Of these, FIGS. 12 to 14 show an LED array chip D in which an LED array is provided on the surface 1 of the substrate, and the electrodes 2 are taken out in both directions of the light emitting surface 3 of the LED 3a. FIG. Only the extracted example is shown. Then, the electrode 2 is wire-bonded with an ultrafine gold wire or an aluminum wire 5. At this time,
The LED array chip D is connected by ball bonding or stitch bonding on the electrode 2.
【０００３】[0003]
【考案が解決しようとする課題】しかし、前記従来の技
術では、ボンディング後の形状は、図１６或いは図１７
のように、結線したワイヤにＬＥＤアレイチップＤの厚
みがプラスされた高さｈ′となり、この高さｈ′を低く
することができないという問題点がある。そこで、本考
案は、上記従来の技術の問題点に鑑みて創案されたもの
で、結線状態で高さ寸法値を小さく設計可能なＬＥＤア
レイ装置の提供を目的としている。However, in the above conventional technique, the shape after bonding is as shown in FIG. 16 or FIG.
As described above, the thickness of the LED array chip D is added to the connected wires to form a height h ', and there is a problem that the height h'cannot be lowered. Therefore, the present invention was devised in view of the problems of the above-mentioned conventional techniques, and an object thereof is to provide an LED array device capable of designing a small height dimension value in a connected state.
【０００４】[0004]
【課題を解決するための手段】上記目的を達成するため
に、本考案におけるＬＥＤアレイ装置においては、ＬＥ
Ｄアレイチップにおいて、ＬＥＤ光放射面より上部にあ
る電極を中継パターンにより光放射面領域より低い位置
で階段状に形成した電極パッドに接続したことを特徴と
している。In order to achieve the above object, in the LED array device of the present invention, LE
In the D array chip, the electrode above the LED light emitting surface is characterized in that it is connected to the electrode pad formed stepwise at a position lower than the light emitting surface area by a relay pattern.
【０００５】[0005]
【作用】ＬＥＤアレイチップのＬＥＤ光放射面は、階段
状に電極パッドが低く形成してある該電極パッドに、極
細金線又はアルミ線により、ワイヤーボンディングす
る。この際に、電極上にボールボンディング或いはステ
ッチボンディングをして、ＬＥＤアレイチップに結線す
る。The LED light emitting surface of the LED array chip is wire-bonded to the electrode pad, which is formed in a stepwise manner with a low electrode pad, with an ultrafine gold wire or an aluminum wire. At this time, ball bonding or stitch bonding is performed on the electrodes to connect to the LED array chip.
【０００６】[0006]
【実施例】実施例について図面を参照して説明する。図
１〜図１１において、図１〜図３は、第１の実施例を示
したもので、基板表面１０にＬＥＤアレイを施したＬＥ
ＤアレイチップＤであり、ＬＥＤ３１の光放射面３０の
両側に電極パッド２０を取り出したものである。ＬＥＤ
アレイチップＤの光放射面３０の両側の電極パッド２０
部分は、図３のように、該光放射面３０より所定距離低
い位置に形成し、階段状に形成されている。また、ＬＥ
ＤアレイチップＤには、光放射面３０側の電極（図示せ
ず）と電極パッド２０を中継するパターン４０が形成さ
れている。EXAMPLES Examples will be described with reference to the drawings. 1 to 11, FIGS. 1 to 3 show a first embodiment, which is an LE in which an LED array is applied to a substrate surface 10.
It is a D array chip D, and the electrode pads 20 are taken out on both sides of the light emitting surface 30 of the LED 31. LED
Electrode pads 20 on both sides of the light emitting surface 30 of the array chip D
As shown in FIG. 3, the portion is formed at a position lower than the light emitting surface 30 by a predetermined distance and has a step shape. Also, LE
On the D array chip D, a pattern 40 that relays the electrode (not shown) on the light emitting surface 30 side and the electrode pad 20 is formed.
【０００７】図４〜６は、第２の実施例を示したもの
で、電極パッド２０を片側のみに取り出したものであ
り、電極パッド２０部分は、図６のように、該光放射面
３０より所定距離低い位置に形成し、階段状に形成され
ている。この場合も第１の実施例と同様に、光放射面３
０側の電極（図示せず）と電極パッド２０を中継するパ
ターン４０が形成されている。FIGS. 4 to 6 show a second embodiment, in which the electrode pad 20 is taken out only on one side, and the electrode pad 20 portion is the light emitting surface 30 as shown in FIG. It is formed at a position lower by a predetermined distance, and is formed in a stepped shape. Also in this case, as in the first embodiment, the light emitting surface 3
A pattern 40 that relays the electrode (not shown) on the 0 side and the electrode pad 20 is formed.
【０００８】図７〜図１０は、ワイヤーボンディング状
態を示したもので、図７、８はそれぞれ第１、第２の実
施例の電極パッド２０に、極細金線又はアルミ線５０に
よりボールボンディングをした状態、図９、図１０はそ
れぞれ第１、第２の実施例の電極パッド２０上に、極細
金線又はアルミ線５０によりステッチボンディングをし
た状態で、これらによりＬＥＤアレイに結線している。
図１１は、ワイヤーボンディングしたＬＥＤアレイチッ
プＤ上にレンズ又はガラスＡを配置したもので、従来例
（上図）では、ＬＥＤアレイチップＤからレンズ又はガ
ラスＡまでの距離Ｌ０となり、下図の本考案の第１の実
施例では、光放射面３０に直上に近接させてレンズ又は
ガラスＡが配置でき、このときＬＥＤアレイチップＤか
らレンズ又はガラスＡまでの距離Ｌ１となり、Ｌ１＜Ｌ
０になる。FIGS. 7 to 10 show a wire bonding state. FIGS. 7 and 8 show ball bonding to the electrode pads 20 of the first and second embodiments by using an ultrafine gold wire or an aluminum wire 50. In this state, FIGS. 9 and 10 show the state where the fine gold wire or the aluminum wire 50 is stitch-bonded on the electrode pad 20 of the first and second embodiments, respectively, and the LED array is connected by these.
FIG. 11 shows a lens or glass A arranged on a wire-bonded LED array chip D. In the conventional example (upper figure), the distance L0 from the LED array chip D to the lens or glass A is the same. In the first embodiment, the lens or the glass A can be arranged immediately above the light emitting surface 30 so that the distance L1 from the LED array chip D to the lens or the glass A becomes L1 <L.
It becomes 0.
【０００９】[0009]
【考案の効果】本考案は、上述の通り構成されているの
で、次に記載する効果を奏する。ＬＥＤ光放射面は、電
極パッド２０が同一平面上にない構造とし、電極パッド
はＬＥＤ光放射面より低い位置に形成されているため、
ワイヤによる結線をしたとき、Ｈ＜Ｈ′（ＬＥＤチップ
厚み）となり、ＬＥＤアレイチップの高さ寸法値を小さ
く設計できる。また、Ｈ＜Ｈ′に設計できるため、ＬＥ
Ｄの光放射面近傍にレンズ、ガラス等の部材の取り付け
が可能となる。Since the present invention is constructed as described above, it has the following effects. The LED light emitting surface has a structure in which the electrode pad 20 is not on the same plane, and the electrode pad is formed at a position lower than the LED light emitting surface.
When the wires are connected, H <H '(LED chip thickness), and the height dimension value of the LED array chip can be designed small. Moreover, since LE can be designed so that H <H ',
A member such as a lens or glass can be attached near the light emitting surface of D.
【図１】ＬＥＤアレイチップの平面図である。FIG. 1 is a plan view of an LED array chip.
【図２】ＬＥＤアレイチップの正面図である。FIG. 2 is a front view of an LED array chip.
【図３】ＬＥＤアレイチップの右側面図である。FIG. 3 is a right side view of the LED array chip.
【図４】別実施例のＬＥＤアレイチップの平面図であ
る。FIG. 4 is a plan view of an LED array chip of another embodiment.
【図５】別実施例のＬＥＤアレイチップの正面図であ
る。FIG. 5 is a front view of an LED array chip of another embodiment.
【図６】別実施例のＬＥＤアレイチップの右側面図であ
る。FIG. 6 is a right side view of an LED array chip of another embodiment.
【図７】ワイヤーボンディング状態の要部側面図であ
る。FIG. 7 is a side view of a main portion in a wire bonding state.
【図８】別実施例のワイヤーボンディング状態の要部側
面図である。FIG. 8 is a side view of a main portion of another embodiment in a wire bonding state.
【図９】ワイヤーボンディング状態の要部側面図であ
る。FIG. 9 is a side view of a main portion in a wire bonding state.
【図１０】別実施例の他のワイヤーボンディング状態の
要部側面図である。FIG. 10 is a side view of a main portion of another wire bonding state of another embodiment.
【図１１】レンズ又はガラスを配置したときの従来例と
の比較図である。FIG. 11 is a comparison diagram with a conventional example when a lens or glass is arranged.
【図１２】従来例の平面図である。FIG. 12 is a plan view of a conventional example.
【図１３】従来例の正面図である。FIG. 13 is a front view of a conventional example.
【図１４】従来例の側面図である。FIG. 14 is a side view of a conventional example.
【図１５】従来の他の実施例の平面図である。FIG. 15 is a plan view of another conventional example.
【図１６】従来例のワイヤーボンディング状態の要部側
面図である。FIG. 16 is a side view of a main part of a conventional example in a wire bonding state.
【図１７】従来例の他のワイヤーボンディンブ状態の要
部側面図である。FIG. 17 is a side view of a main portion of another conventional wire bondable state.
Ｄ ＬＥＤアレイチップ １０ 基板表面 ２０ 電極パッド ３０ 光放射面 ４０ 中継パターン ５０ 極細金線又はアルミ線 D LED array chip 10 Substrate surface 20 Electrode pad 30 Light emitting surface 40 Relay pattern 50 Extra fine gold wire or aluminum wire
Claims (1)
射面より上部にある電極を中継パターンにより光放射面
領域より低い位置で階段状に形成した電極パッドに接続
したことを特徴とするＬＥＤアレイ装置。1. In an LED array chip, LED light emission is provided.
The electrode above the emitting surface is a light emitting surface with a relay pattern.
Connected to a stepped electrode pad below the area
LED array apparatus characterized by the.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990406069U JP2504538Y2 (en) | 1990-12-29 | 1990-12-29 | LED array device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990406069U JP2504538Y2 (en) | 1990-12-29 | 1990-12-29 | LED array device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0494648U JPH0494648U (en) | 1992-08-17 |
| JP2504538Y2 true JP2504538Y2 (en) | 1996-07-10 |
Family
ID=31883387
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990406069U Expired - Lifetime JP2504538Y2 (en) | 1990-12-29 | 1990-12-29 | LED array device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2504538Y2 (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63278285A (en) * | 1987-01-16 | 1988-11-15 | Fuji Xerox Co Ltd | Light-emitting diode array for optical printer and its manufacture |
| JPS63177478A (en) * | 1987-01-16 | 1988-07-21 | Fuji Xerox Co Ltd | Light-emitting diode array for optical printer |
| JPH03192779A (en) * | 1989-12-21 | 1991-08-22 | Kyocera Corp | Light emitting diode |
-
1990
- 1990-12-29 JP JP1990406069U patent/JP2504538Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0494648U (en) | 1992-08-17 |
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