JP2025513806A - ハイブリッドパターン形成－接合半導体ツール - Google Patents

ハイブリッドパターン形成－接合半導体ツール Download PDF

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Publication number
JP2025513806A
JP2025513806A JP2024559554A JP2024559554A JP2025513806A JP 2025513806 A JP2025513806 A JP 2025513806A JP 2024559554 A JP2024559554 A JP 2024559554A JP 2024559554 A JP2024559554 A JP 2024559554A JP 2025513806 A JP2025513806 A JP 2025513806A
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Japan
Prior art keywords
wafer
module
stressor film
modules
bonding
Prior art date
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Pending
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JP2024559554A
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English (en)
Japanese (ja)
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JP2025513806A5 (cg-RX-API-DMAC7.html
Inventor
シェピス，アンソニー
ウェロス，アンドリュー
コンクリン，デヴィッド
デヴィリアーズ，アントン
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Tokyo Electron US Holdings Inc
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Tokyo Electron US Holdings Inc
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Publication of JP2025513806A publication Critical patent/JP2025513806A/ja
Publication of JP2025513806A5 publication Critical patent/JP2025513806A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0402—Apparatus for fluid treatment
    • H10P72/0418—Apparatus for fluid treatment for etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0428—Apparatus for mechanical treatment or grinding or cutting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0431—Apparatus for thermal treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0431—Apparatus for thermal treatment
    • H10P72/0434—Apparatus for thermal treatment mainly by convection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0451—Apparatus for manufacturing or treating in a plurality of work-stations
    • H10P72/0468—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • H10P72/0474—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process comprising at least one lithography chamber
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/27—Structural arrangements therefor
    • H10P74/277—Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/137—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being directly on the semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
    • H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
    • H10W74/43—Encapsulations, e.g. protective coatings characterised by their materials comprising oxides, nitrides or carbides, e.g. ceramics or glasses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W80/00—Direct bonding of chips, wafers or substrates
    • H10W80/011—Manufacture or treatment of pads or other interconnections to be direct bonded
    • H10W80/016—Cleaning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W80/00—Direct bonding of chips, wafers or substrates
    • H10W80/211—Direct bonding of chips, wafers or substrates using auxiliary members, e.g. aids for protecting the bonding area
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W80/00—Direct bonding of chips, wafers or substrates
    • H10W80/301—Bonding techniques, e.g. hybrid bonding
    • H10W80/312—Bonding techniques, e.g. hybrid bonding characterised by the direct bonding of electrically conductive pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W80/00—Direct bonding of chips, wafers or substrates
    • H10W80/301—Bonding techniques, e.g. hybrid bonding
    • H10W80/327—Bonding techniques, e.g. hybrid bonding characterised by the direct bonding of insulating parts, e.g. of silicon oxide layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/791—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads
    • H10W90/792—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads between multiple chips

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Manufacturing & Machinery (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Wire Bonding (AREA)
JP2024559554A 2022-04-08 2023-02-22 ハイブリッドパターン形成－接合半導体ツール Pending JP2025513806A (ja)

Applications Claiming Priority (9)

Application Number Priority Date Filing Date Title
US202263328825P 2022-04-08 2022-04-08
US202263328823P 2022-04-08 2022-04-08
US63/328,823 2022-04-08
US63/328,825 2022-04-08
US17/885,097 2022-08-10
US17/885,038 2022-08-10
US17/885,038 US12381093B2 (en) 2022-04-08 2022-08-10 Hybrid patterning-bonding semiconductor tool
US17/885,097 US12374562B2 (en) 2022-04-08 2022-08-10 Wafer shape control for W2W bonding
PCT/US2023/013554 WO2023196061A1 (en) 2022-04-08 2023-02-22 Hybrid patterning-bonding semiconductor tool

Publications (2)

Publication Number Publication Date
JP2025513806A true JP2025513806A (ja) 2025-04-30
JP2025513806A5 JP2025513806A5 (cg-RX-API-DMAC7.html) 2026-03-05

Family

ID=88239810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024559554A Pending JP2025513806A (ja) 2022-04-08 2023-02-22 ハイブリッドパターン形成－接合半導体ツール

Country Status (5)

Country Link
US (2) US12374562B2 (cg-RX-API-DMAC7.html)
JP (1) JP2025513806A (cg-RX-API-DMAC7.html)
KR (2) KR20240170930A (cg-RX-API-DMAC7.html)
TW (2) TW202405997A (cg-RX-API-DMAC7.html)
WO (2) WO2023196061A1 (cg-RX-API-DMAC7.html)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20240371705A1 (en) * 2023-05-04 2024-11-07 Taiwan Semiconductor Manufacturing Company, Ltd. Wafer bonding apparatus and method
CN122342320A (zh) * 2023-12-04 2026-07-03 应用材料公司 用于元件制造的以定向应力调制来控制各向异性变形
US20250194165A1 (en) * 2023-12-11 2025-06-12 Applied Materials, Inc. Unification of backside stress mitigation with frontside protection in semiconductor manufacturing processing
EP4576085A1 (en) * 2023-12-22 2025-06-25 ASML Netherlands B.V. System and method for stress release in die bonding
US20250218788A1 (en) * 2023-12-28 2025-07-03 Applied Materials, Inc. Substrate stress management using direct selective area processing
US20250226265A1 (en) * 2024-01-04 2025-07-10 Tokyo Electron Limited Correcting of design and mask shape position due to die and wafer distortion for bonding
US20250259943A1 (en) * 2024-02-13 2025-08-14 Tokyo Electron Limited Die shape control for die to wafer bond enhancement
US20250308953A1 (en) * 2024-03-26 2025-10-02 Applied Materials, Inc. In-Line Validation of Substrate Bonding Surface
US20250308949A1 (en) * 2024-03-29 2025-10-02 Tokyo Electron Limited Die to wafer bonding method and apparatus with thermal contact die shape control
WO2026035902A1 (en) * 2024-08-08 2026-02-12 Kla Corporation System and method for wafer shape pairing for improved post-bonding performance
US20260215226A1 (en) * 2025-01-20 2026-07-23 Tokyo Electron Limited System and method for overlay error detection

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US7449284B2 (en) * 2004-05-11 2008-11-11 Miradia Inc. Method and structure for fabricating mechanical mirror structures using backside alignment techniques
WO2007029422A1 (ja) * 2005-09-07 2007-03-15 Nec Corporation 半導体装置の検査装置及び電源供給ユニット
US9184041B2 (en) 2013-06-25 2015-11-10 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuit with backside structures to reduce substrate warp
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FR3033643B1 (fr) * 2015-03-13 2020-07-17 Unity Semiconductor Dispositif et procede pour detecter des defauts dans des zones de liaison entre des echantillons tels que des wafers
JP6731805B2 (ja) * 2016-07-12 2020-07-29 東京エレクトロン株式会社 接合システム
JP6727069B2 (ja) * 2016-08-09 2020-07-22 東京エレクトロン株式会社 接合装置および接合システム
JP6717267B2 (ja) 2017-07-10 2020-07-01 株式会社Sumco シリコンウェーハの製造方法
US10872873B2 (en) * 2017-11-14 2020-12-22 Taiwan Semiconductor Manufacturing Co., Ltd. Method for bonding wafers and bonding tool
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CN112424908B (zh) * 2018-07-25 2025-06-13 株式会社尼康 接合方法以及接合装置
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Also Published As

Publication number Publication date
TW202405997A (zh) 2024-02-01
WO2023196060A1 (en) 2023-10-12
US20230326814A1 (en) 2023-10-12
TW202401600A (zh) 2024-01-01
KR20240169682A (ko) 2024-12-03
US12374562B2 (en) 2025-07-29
WO2023196061A1 (en) 2023-10-12
US20230326767A1 (en) 2023-10-12
KR20240170930A (ko) 2024-12-05
KR102994359B1 (ko) 2026-07-22
US12381093B2 (en) 2025-08-05

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