JP2024501878A5 - - Google Patents

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Publication number
JP2024501878A5
JP2024501878A5 JP2023540531A JP2023540531A JP2024501878A5 JP 2024501878 A5 JP2024501878 A5 JP 2024501878A5 JP 2023540531 A JP2023540531 A JP 2023540531A JP 2023540531 A JP2023540531 A JP 2023540531A JP 2024501878 A5 JP2024501878 A5 JP 2024501878A5
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JP
Japan
Prior art keywords
signal
integrated circuit
clock signal
output
reference clock
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Pending
Application number
JP2023540531A
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English (en)
Japanese (ja)
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JP2024501878A (ja
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Publication date
Priority claimed from US17/139,584 external-priority patent/US11095293B1/en
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Publication of JP2024501878A publication Critical patent/JP2024501878A/ja
Publication of JP2024501878A5 publication Critical patent/JP2024501878A5/ja
Pending legal-status Critical Current

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JP2023540531A 2020-12-31 2021-12-29 フィードバック分周器のない低電力フラクショナルアナログpll Pending JP2024501878A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US17/139,584 2020-12-31
US17/139,584 US11095293B1 (en) 2020-12-31 2020-12-31 Low-power fractional analog PLL without feedback divider
PCT/US2021/065528 WO2022147137A1 (en) 2020-12-31 2021-12-29 Low-power fractional analog pll without feedback divider

Publications (2)

Publication Number Publication Date
JP2024501878A JP2024501878A (ja) 2024-01-16
JP2024501878A5 true JP2024501878A5 (cg-RX-API-DMAC7.html) 2024-12-19

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ID=77274227

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2023540531A Pending JP2024501878A (ja) 2020-12-31 2021-12-29 フィードバック分周器のない低電力フラクショナルアナログpll

Country Status (5)

Country Link
US (2) US11095293B1 (cg-RX-API-DMAC7.html)
EP (1) EP4272315B1 (cg-RX-API-DMAC7.html)
JP (1) JP2024501878A (cg-RX-API-DMAC7.html)
CN (1) CN116671019A (cg-RX-API-DMAC7.html)
WO (1) WO2022147137A1 (cg-RX-API-DMAC7.html)

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