JP2024072563A - Composite member and manufacturing method of them - Google Patents

Abstract

To provide a plate-like member capable of mounting a plate-like member to a semiconductor element with high accuracy, and provide a manufacturing method of them.SOLUTION: A composite member 40 for a semiconductor device 20, comprises: a support layer 50; an adhesive layer 60 that is laminated onto the support layer 50; and a first conductive layer 70 that is laminated to the adhesive layer 60. The first conductive layer 70 contains a plate-like member 10. A transmission coefficient of a visible light of the support layer 50 or an open coefficient of the support layer 50 is 50% or more and 90% or less.SELECTED DRAWING: Figure 2A

Description

This disclosure relates to a composite member and a method for manufacturing the same.

In recent years, some semiconductor devices used in, for example, electrical equipment for large currents are provided with a plate-shaped member for dissipating heat from the semiconductor element. Such a plate-shaped member is located, for example, on the top surface of the semiconductor device (the side opposite the circuit board) (see Patent Document 1).

JP 2022-45072 A

Such a plate-like member is mounted on the semiconductor element after the semiconductor element is mounted on the lead frame. In this case, it is desirable to efficiently mount the plate-like member on the multiple semiconductor elements arranged on the lead frame.

This disclosure provides a plate-shaped member and a method for manufacturing the same that enable efficient mounting of the plate-shaped member on a semiconductor element.

Embodiments of the present disclosure relate to the following [1] to [12].

[1] A composite member for a semiconductor device, comprising a support layer, an adhesive layer laminated on the support layer, and a first conductive layer laminated on the adhesive layer, the first conductive layer including a plate-shaped member, and the visible light transmittance or the aperture ratio of the support layer is 50% or more and 90% or less.

[2] The composite material according to [1], wherein the support layer is a metal layer, and the support layer has a thermal expansion coefficient of 1×10 ⁻⁶ /° C. or more and 20×10 ⁻⁶ /° C. or less.

[3] The composite member according to [1], wherein the support layer is a resin layer and the thickness of the support layer is 50 μm or more and 200 μm or less.

[4] The composite member according to any one of [1] to [3], wherein the first conductive layer includes a plurality of the plate-like members.

[5] The composite member according to [4], in which the plurality of plate-like members are connected to each other by connecting portions.

[6] The composite member described in [5], in which the connecting portion is thinner than the plate-like member.

[7] The composite member according to [5] or [6], wherein the plate-like member has an upper surface, a lower surface, and a plurality of side surfaces corresponding to each side of the upper surface and the lower surface, the connecting portion is connected to at least two of the side surfaces of the plate-like member, at least two of the connecting portions are connected to each side surface, the distance between the at least two connecting portions connected to one of the side surfaces is 75 μm or more, and the at least two connecting portions are arranged in symmetrical positions with respect to the center of each side surface.

[8] The composite member according to any one of [5] to [7], wherein the plate-like member has an upper surface, a lower surface, and a plurality of side surfaces corresponding to the respective sides of the upper surface and the lower surface, the plate-like member is a rectangle including a short side and a long side in a plan view, and the connecting portion is connected to at least the side surface corresponding to the short side of the plate-like member.

[9] The composite member described in [4], in which the multiple plate-like members are independent of each other and not connected.

[10] The composite member according to any one of [1] to [7], further comprising a second conductive layer laminated on the first conductive layer.

[11] A method for manufacturing a composite member for a semiconductor device, comprising the steps of preparing a metal substrate, etching the metal substrate to obtain a first conductive layer including a plate-shaped member, and laminating a support layer on the first conductive layer via an adhesive layer, wherein the visible light transmittance of the support layer or the aperture ratio of the support layer is 50% or more and 90% or less.

[12] A method for manufacturing a composite member for a semiconductor device, comprising the steps of preparing a metal substrate, laminating a support layer on the metal substrate via an adhesive layer, and etching the metal substrate to obtain a first conductive layer including a plate-shaped member, wherein the visible light transmittance of the support layer or the aperture ratio of the support layer is 50% or more and 90% or less.

According to this disclosure, plate-shaped members can be efficiently mounted on semiconductor elements.

FIG. 1 is a plan view showing a composite member according to a first embodiment. FIG. 2A is a cross-sectional view showing a composite member according to the first embodiment (cross-sectional view taken along line IIA-IIA in FIG. 1). FIG. 2B is a cross-sectional view showing the composite member according to the first embodiment (cross-sectional view taken along line IIB-IIB in FIG. 1). 3A and 3B are plan views showing examples of the arrangement of openings in the support layer. FIG. 4 is a plan view showing a composite member according to a modified example of the first embodiment. FIG. 5 is a cross-sectional view showing the semiconductor device according to the first embodiment. 6(a) to (g) are cross-sectional views showing the manufacturing method of the composite member according to the first embodiment. 7A to 7E are cross-sectional views showing the method for manufacturing the semiconductor device according to the first embodiment. FIG. 8 is a cross-sectional view showing a composite member according to the second embodiment. 9(a) to 9(g) are cross-sectional views showing a manufacturing method for a composite member according to the second embodiment. FIG. 10 is a plan view showing a composite member according to a third embodiment. FIG. 11 is a cross-sectional view showing a composite member according to the third embodiment (cross-sectional view taken along line XI-XI in FIG. 10). 12(a) to 12(f) are cross-sectional views showing a manufacturing method for a composite member according to the second embodiment.

(First embodiment)
A first embodiment will be described with reference to Figures 1 to 7. In the following figures, the same parts are denoted by the same reference numerals, and some detailed descriptions may be omitted.

In this specification, "upper surface" refers to the surface facing away from the mounting board (not shown). "Upper surface" may also be called "front surface" or "first surface". "Lower surface" refers to the surface opposite the "upper surface" that is located on the side of the mounting board (not shown). "Lower surface" may also be called "rear surface" or "second surface". "Side surface" refers to the surface located between the "upper surface" and "lower surface" that constitutes the thickness of the component. "Planar view" refers to a view from the normal direction of the upper or lower surface.

In this specification, the X direction is a direction parallel to one side of the plate-like member 10. The Y direction is a direction perpendicular to the side of the plate-like member 10. The Z direction is parallel to the thickness direction of the composite member 40 and parallel to the normal direction of the upper surface 11 and the lower surface 12 of the plate-like member 10. The X direction, Y direction, and Z direction are perpendicular to each other.

In this specification, half-etching refers to etching the material to be etched partway in the thickness direction. The thickness of the material to be etched after half-etching is, for example, 30% to 70%, preferably 40% to 60%, of the thickness of the material to be etched before half-etching.

(Configuration of composite members)
First, an outline of a composite member for a semiconductor device according to the present embodiment will be described with reference to Figures 1 to 2B. Figures 1 to 2B are diagrams showing the composite member according to the present embodiment.

The composite member 40 shown in Figures 1 to 2B is used when manufacturing a semiconductor device 20 (Figure 5). Such a composite member 40 includes a support layer 50, an adhesive layer 60, a first conductive layer 70, and a second conductive layer 80. The adhesive layer 60 is laminated on the support layer 50. The first conductive layer 70 is laminated on the adhesive layer 60. The second conductive layer 80 is laminated on the first conductive layer 70. The visible light transmittance of the support layer 50 or the aperture ratio of the support layer 50 is 50% or more and 90% or less. The first conductive layer 70 also includes a plurality of plate-shaped members 10. The plurality of plate-shaped members 10 are connected to each other by connecting portions 71.

Next, we will explain each component that makes up the composite member 40.

The support layer 50 supports the first conductive layer 70 and the second conductive layer 80. The support layer 50 has an upper surface 51 and a lower surface 52. The upper surface 51 is the surface facing the opposite side to the adhesive layer 60. The lower surface 52 is the surface facing the adhesive layer 60. The support layer 50 has a rectangular shape in a planar view. However, the support layer 50 may have any planar shape. The support layer 50 may have a polygonal shape, such as a square, in a planar view.

The support layer 50 may be a metal layer. In this case, examples of the metal constituting the support layer 50 include copper, copper alloy, 42 alloy (Fe alloy with Ni42%), stainless steel, nickel alloy, and Invar material. The thermal expansion coefficient of the support layer 50 may be 1×10 ⁻⁶ /°C or more, or 2×10 ⁻⁶ /°C or more. The thermal expansion coefficient of the support layer 50 may be 20×10 ⁻⁶ /°C or less, or 10×10 ⁻⁶ /°C or less. By setting the thermal expansion coefficient of the support layer 50 within the above range, the thermal expansion coefficient of the support layer 50 can be made close to the thermal expansion coefficient of the semiconductor element 21. This allows the plate-like member 10 to be positioned accurately on the semiconductor element 21 when manufacturing the semiconductor device 20. In addition, when the support layer 50 is a metal layer, the thickness (Z-direction distance) T1 of the support layer 50 may be 50 μm or more, or 100 μm or more. The thickness T1 of the support layer 50 may be 300 μm or less, or may be 200 μm or less.

Alternatively, the support layer 50 may be a resin layer. In this case, examples of the resin material constituting the support layer 50 include polyethylene terephthalate (PET), polyethylene (PE), and polypropylene (PP). When polyethylene terephthalate is used as the support layer 50, the rigidity of the support layer 50 can be increased. When polyethylene or polypropylene is used as the support layer 50, the flexibility of the support layer 50 can be increased, making it easier to expand and contract the support layer 50. When the support layer 50 is a resin layer, the thickness (Z-direction distance) T1 of the support layer 50 may be 50 μm or more, or 100 μm or more. Furthermore, the thickness T1 of the support layer 50 may be 200 μm or less, or 150 μm or less.

In this embodiment, the visible light transmittance of the support layer 50 may be 50% or more and 90% or less, or 60% or more and 80% or less. For example, the material constituting the support layer 50 itself has the property of transmitting visible light. Here, the visible light transmittance means the transmittance of light having a wavelength of 400 nm or more and 700 nm or less. By setting the visible light transmittance of the support layer 50 within the above range, the transparency of the support layer 50 can be increased, and the plate-shaped member 10 can be accurately positioned on the semiconductor element 21 when manufacturing the semiconductor device 20. In addition, when the adhesive layer 60 has UV peelability, the laser light can be easily transmitted through the support layer 50. The visible light transmittance of 50% or more and 90% or less means that when the absorbance of the support layer 50 is measured using a spectrophotometer (UV-visible-infrared spectrophotometer: V-670 manufactured by JASCO Corporation), the transmittance is 50% or more and 90% or less in the entire wavelength range of 400 nm to 700 nm.

Alternatively, the support layer 50 may have a plurality of openings 53 (see FIG. 3(a)(b)). The openings 53 penetrate the support layer 50 in the thickness direction. The plurality of openings 53 may be regularly arranged in the support layer 50. The support layer 50 has a plurality of openings 53, which enhances the flexibility of the support layer 50. In this case, the opening ratio of the support layer 50 may be 50% or more and 90% or less, or 60% or more and 80% or less. This is the case, for example, when the support layer 50 is a metal layer or an opaque resin layer, and the material constituting the support layer 50 itself has a property of not transmitting visible light. By setting the opening ratio of the support layer 50 within the above range, the area occupied by the openings 53 in the support layer 50 can be made large. In this case, the plate-shaped member 10 is easily visible from the support layer 50 side. Therefore, the plate-shaped member 10 can be accurately positioned on the semiconductor element 21 when manufacturing the semiconductor device 20. Furthermore, if the adhesive layer 60 has UV peelability, the laser light can easily pass through the support layer 50. The opening rate refers to the percentage of the total area of the openings 53 in the entire area of the support layer 50.

Figures 3(a) and (b) each show an example of an opening 53 formed in the support layer 50.

As shown in FIG. 3(a), the shape of each opening 53 may be a regular hexagon. Each opening 53 has approximately the same size. The multiple openings 53 are arranged in a so-called honeycomb shape. That is, around one opening 53, six openings 53 are arranged adjacent to each side of the opening 53. By arranging the openings 53 in a honeycomb shape, it is possible to increase the strength of the entire support layer 50 while maintaining a high opening ratio of the support layer 50.

A linear peripheral member 54 is disposed between the adjacent openings 53. The width W1 of the peripheral member 54 may be, for example, 35 μm or more and 100 μm or less. The width W1 of the peripheral member 54 refers to the shortest distance between the adjacent openings 53. The width W2 of the opening 53 may be, for example, 200 μm or more and 1250 μm or less. The width W2 of the opening 53 refers to the distance between the parallel peripheral members 54 located around the opening 53. The pitch P1 between the openings 53 may be, for example, 250 μm or more and 1400 μm or less. The pitch P1 refers to the distance between the centers of the adjacent openings 53. In FIG. 3(a), the opening ratio of the support layer 50 is calculated by the formula (W2 ² /P1 ² )×100(%). The shape of the opening 53 may be a regular hexagon, or a polygonal shape such as a square or an equilateral triangle.

As shown in FIG. 3B, the shape of each opening 53 may be a circle. Each opening 53 has approximately the same size. The centers of the multiple openings 53 are arranged in a regular triangular lattice. The diameter D1 of the openings 53 may be, for example, 250 μm or more and 1200 μm or less. The pitch P2 between the openings 53 may be, for example, 300 μm or more and 1400 μm or less. The pitch P2 refers to the distance between the centers of the adjacent openings 53. In FIG. 3B, the opening ratio of the support layer 50 is calculated by the formula 90.6×(D1 ² /P2 ² )(%).

2A and 2B, the adhesive layer 60 is a flat layer formed directly on the lower surface 52 of the support layer 50. The adhesive layer 60 is a layer that bonds the first conductive layer 70 to the support layer 50. The adhesive layer 60 is also a layer that peels the support layer 50 from the first conductive layer 70 during the manufacturing process of the semiconductor device 20. The adhesive layer 60 has an upper surface 61 and a lower surface 62. The adhesive layer 60 may be provided on the entire lower surface 52 of the support layer 50.

The adhesive layer 60 may be a layer having low adhesion. For example, amorphous silicon or acrylic may be used as the adhesive layer 60. In this case, the thickness T2 of the adhesive layer 60 may be, for example, 10 μm or more and 50 μm or less.

The adhesive layer 60 may be a layer having UV peelability. In this case, the adhesive layer 60 is made of a material that generates heat and decomposes when it absorbs UV laser light, reducing or eliminating its adhesive strength. The adhesive layer 60 is made of a material that has good adhesiveness to the material of the support layer 50. The adhesive layer 60 may be made of a peelable material such as amorphous silicon, polyimide, or acrylic that has the property of absorbing UV laser light of a specific wavelength (e.g., 355 nm).

The adhesive strength of the adhesive layer 60 may be 0.05 N/25 mm or more and 1 N/25 mm or less. In this specification, the adhesive strength refers to the force required to peel the test piece from the adherend, and is specifically measured as follows. First, a strip-shaped test piece with a width of 25 mm is attached to the adherend. At this time, the test piece is pressed against the adherend with a 1 kg pressure roller (not shown). At this time, the work is performed under a standard atmosphere with a temperature of 23 ± 1 ° C and a relative humidity of 50 ± 5%. Next, while one end of the test piece is still attached to the adherend, the test piece is folded back 180 ° so that the back faces (the faces opposite the adherend faces) of the test piece overlap each other. Next, the other end of the test piece is pulled using a tensile tester at a tensile speed of 300 mm / min. After that, the average value of the adhesive force until the adherend is completely peeled off from the test piece is measured, and this value is taken as the adhesive strength (N / 25 mm). As the tensile tester, an Instron 5565 (manufactured by Instron Japan Co., Ltd.) is used. In addition, if the adhesive layer 60 has UV peelability, the above adhesive strength refers to the value after UV irradiation.

The first conductive layer 70 is bonded to the lower surface 62 side of the adhesive layer 60. The first conductive layer 70 includes a plurality of plate-shaped members 10 and a connecting portion 71 that connects the plate-shaped members 10 to each other. As shown in FIG. 1, the plate-shaped members 10 are arranged in a plurality of rows and/or columns (in a matrix) in a plan view in the support layer 50. That is, the plate-shaped members 10 are arranged in a plurality of rows and/or columns (in a matrix) in a plan view in the support layer 50. That is, the plate-shaped members 10 are arranged in a plurality of rows and columns (in a matrix) in a plan view in the X direction. The plate-shaped members 10 are arranged in a plurality of rows and columns (in a matrix) in a plan view in the Y direction. The pitch P3 between the plate-shaped members 10 may be 50 μm or more and 500 μm or less. In FIG. 1, nine plate-shaped members 10 are shown for convenience. However, the first conductive layer 70 may include 1 to 5,000 plate-shaped members 10.

The plate-shaped member 10 may function as a heat sink that dissipates heat from the semiconductor element 21 of the semiconductor device 20. The plate-shaped member 10 may also be called a heat dissipation member or a heat dissipation plate.

As shown in Figures 1 to 2B, the plate-like member 10 has an upper surface 11, a lower surface 12, and a side surface 13. The upper surface 11 is a surface parallel to the XY plane. The upper surface 11 has a rectangular shape in a plan view. However, the upper surface 11 may have any planar shape. The upper surface 11 may have, for example, a polygonal shape such as a square in a plan view, or a shape in which a part of a polygon such as a square is cut out. The upper surface 11 constitutes a heat dissipation surface exposed to the outside from the semiconductor device 20, as described later. A part of the plate-like member 10 may be thinned by half-etching from the lower surface 12 side.

The lower surface 12 is a surface parallel to the upper surface 11. The lower surface 12 has a rectangular shape in a plan view. However, the lower surface 12 may have any planar shape. The lower surface 12 may have, for example, a polygonal shape such as a square in a plan view, or a shape in which a part of a polygon such as a square is cut out. The planar shape of the lower surface 12 may be the same as the planar shape of the upper surface 11. The lower surface 12 is a surface that contacts the semiconductor element 21 via the second conductive layer 80 as described below.

The side surface 13 is a surface that intersects with the upper surface 11 and the lower surface 12. The side surface 13 may be a surface perpendicular to the upper surface 11 and the lower surface 12. The side surface 13 has a rectangular shape when viewed from its normal direction. A plurality of side surfaces 13 (four in this case) are provided corresponding to each side of the upper surface 11 and the lower surface 12. The side surface 13 is a surface that comes into contact with the sealing resin 23 as described below.

The plate-like members 10 are connected to each other via the connecting portion 71. The connecting portion 71 prevents the individual plate-like members 10 from falling off during the manufacturing process of the composite member 40. In addition, it is possible to suppress deformation of the first conductive layer 70. The connecting portion 71 is formed integrally with the plate-like member 10. The connecting portion 71 has a long and thin rod shape in a planar view. The width W3 of the connecting portion 71 may be 75 μm or more and 500 μm or less. Both ends of the connecting portion 71 are connected to the side surfaces 13 of the corresponding plate-like member 10. In FIG. 1, two connecting portions 71 are connected to each side surface 13 of the plate-like member 10. However, this is not limited to this, and one to ten connecting portions 71 may be connected to each side surface 13 of the plate-like member 10. In addition, as shown by virtual lines in FIG. 1, a connecting portion 71A may be provided that extends over the entire length of each side surface 13 of the plate-like member 10 in a planar view.

The connecting portion 71 is connected to all four side surfaces 13 of each plate-shaped member 10. The connecting portion 71 may be connected to only some of the four side surfaces 13 of each plate-shaped member 10. It is preferable that the connecting portion 71 is connected to at least two side surfaces 13 of each plate-shaped member 10. The interval P4 between at least two connecting portions 71 connected to one side surface 13 may be 75 μm or more and 1000 μm or less. The interval P4 refers to the shortest distance between adjacent connecting portions 71. It is also preferable that at least two connecting portions 71 connected to one side surface 13 are arranged in symmetrical positions with respect to the center of each side of the plate-shaped member 10. By configuring in this manner, it is possible to suppress rotation of each plate-shaped member 10 to which the connecting portion 71 is held.

As shown in FIG. 4, the connecting portion 71 may be rectangular in plan view when the plate-shaped member 10 is viewed from above. Each plate-shaped member 10 includes a pair of short sides 10a and a pair of long sides 10b. The connecting portion 71 is connected to at least two side surfaces 13 of each plate-shaped member 10. Specifically, the connecting portion 71 is connected to the side surface 13 corresponding to at least the short side 10a of the plate-shaped member 10. This makes it possible to suppress rotation of each plate-shaped member 10 to which the connecting portion 71 is held. Two connecting portions 71 are connected to each side surface 13, but one or three or more connecting portions 71 may be connected. The connecting portion 71 may be connected to the side surface 13 corresponding to the long side 10b of the plate-shaped member 10.

2B, the connecting portion 71 may be thinner than the plate-shaped member 10. The connecting portion 71 may be thinned from the lower surface 12 side of the plate-shaped member 10. The connecting portion 71 may be thinned by half etching. The thickness T3 of the connecting portion 71 may be 30 μm or more and 150 μm or less. By thinning the connecting portion 71, the contact area between the side surface 13 of the plate-shaped member 10 and the sealing resin 23 described later can be increased. In addition, the load applied to the blade when dicing the connecting portion 71 during the manufacture of the semiconductor device 20 can be reduced. In addition, by thinning the connecting portion 71 from the lower surface 12 side, it is possible to suppress the connecting portion 71 from shorting with the metal member 22, etc. within the semiconductor device 20.

The first conductive layer 70 is generally made of a metal such as copper, a copper alloy, or alloy 42 (a 42% Ni-Fe alloy). The maximum thickness (Z-direction distance) T4 of the first conductive layer 70 may be 50 μm or more and 300 μm or less.

The second conductive layer 80 is laminated on the lower surface 12 of the plate-shaped member 10. The second conductive layer 80 is also formed on each side surface 13 of the plate-shaped member 10. The second conductive layer 80 serves as a layer that bonds the plate-shaped member 10 to the semiconductor element 21. The second conductive layer 80 may also be called a bonding material or a bonding layer.

The second conductive layer 80 is also formed around the connecting portion 71. In FIG. 2B, the lower surface of the second conductive layer 80 located on the lower surface 12 of the plate-shaped member 10 is located closer to the adhesive layer 60 (the positive side in the Z direction) than the lower surface of the second conductive layer 80 located on the connecting portion 71. However, this is not limited to this, and the lower surface of the second conductive layer 80 located on the lower surface 12 of the plate-shaped member 10 may be located on the same plane as the lower surface of the second conductive layer 80 located on the connecting portion 71.

The second conductive layer 80 is a conductive layer such as a metal. The second conductive layer 80 may be a plating layer such as a solder plating layer. Alternatively, the second conductive layer 80 may be a metal paste layer such as a silver paste. The maximum thickness (Z-direction distance) T5 of the second conductive layer 80 may be 2 μm or more and 12 μm or less.

The composite member 40 does not necessarily have to include the second conductive layer 80. For example, the second conductive layer 80 may be added separately to the plate-like member 10 during the manufacturing process of the semiconductor device 20. In this case, the lower surface 12 of the plate-like member 10 may be exposed to the outside in the composite member 40.

(Configuration of Semiconductor Device)
Next, a semiconductor device fabricated using the composite member 40 according to the present embodiment will be described with reference to Fig. 5. Fig. 5 is a cross-sectional view showing the semiconductor device.

The semiconductor device (semiconductor package) 20 shown in FIG. 5 is a power semiconductor device used, for example, in electrical equipment for large currents. This semiconductor device 20 may be a QFP (Quad Flat Package) type package. As shown in FIG. 5, the semiconductor device 20 includes a first terminal 25, a second terminal 26, a semiconductor element 21, a metal member 22, a sealing resin 23, and a plate-shaped member 10.

The first terminal 25 and the second terminal 26 are each made of a plate-shaped metal member. The first terminal 25 is disposed at a distance from the second terminal 26. The surfaces of the first terminal 25 and the second terminal 26 facing the opposite side of the semiconductor element 21 are connected to a mounting board (not shown). The end of the first terminal 25 facing the opposite side of the second terminal 26 protrudes outward from the sealing resin 23. The end of the second terminal 26 facing the opposite side of the first terminal 25 protrudes outward from the sealing resin 23. The end of the second terminal 26 on the first terminal 25 side is located on the upper surface side of the end of the second terminal 26 facing the opposite side of the first terminal 25.

The semiconductor element 21 is mounted on the first terminal 25 via the first bonding layer 27. As the semiconductor element 21, various semiconductor elements that are commonly used in the past can be used, and are not particularly limited, but an integrated circuit such as a MOSFET may be used. This semiconductor element 21 has multiple electrodes. One electrode of the semiconductor element 21 and the first terminal 25 may be electrically connected via the first bonding layer 27. The first bonding layer 27 is made of a conductive material such as solder or conductive paste.

The metal member 22 electrically connects the semiconductor element 21 and the second terminal 26. The metal member 22 constitutes a connection portion. The metal member 22 may be made of a metal material with good conductivity, such as copper or aluminum. The metal member 22 may be a plate-shaped member. One end of the metal member 22 is connected to the electrode of the semiconductor element 21, and the other end is connected to the second terminal 26.

The sealing resin 23 seals the first terminal 25, the second terminal 26, the semiconductor element 21, the metal member 22, and the plate-like member 10. The sealing resin 23 may be a thermosetting resin such as a silicone resin or an epoxy resin, or a thermoplastic resin such as a PPS resin. The overall thickness T6 of the sealing resin 23 may be, for example, 300 μm or more and 2000 μm or less. In addition, one side of the sealing resin 23 (one side of the semiconductor device 20) may be, for example, 0.2 mm or more and 16 mm or less.

The plate-shaped member 10 is located on the semiconductor element 21. In this case, the plate-shaped member 10 is bonded onto the semiconductor element 21 via the second conductive layer 80. The electrodes of the semiconductor element 21 and the plate-shaped member 10 may be electrically connected via the second conductive layer 80.

The upper surface 11 of the plate-shaped member 10 is exposed to the outside from the sealing resin 23. The plate-shaped member 10 serves as a heat sink that dissipates heat from the semiconductor element 21 to the outside. In addition, the second conductive layer 80 located on the side surface 13 of the plate-shaped member 10 is in close contact with the sealing resin 23.

Otherwise, the configuration of the plate-like member 10 is the same as that shown in Figures 1 to 2B described above, so a detailed description will be omitted here.

(Method of manufacturing composite member)
Next, a method for manufacturing the plate-shaped member 10 shown in Figures 1 to 2B will be described with reference to Figures 6(a) to 6(g). Figures 6(a) to 6(g) are cross-sectional views (corresponding to Figure 2B) showing the method for manufacturing the plate-shaped member 10.

First, as shown in FIG. 6(a), a flat metal substrate 31 is prepared. This metal substrate 31 can be made of a metal such as copper, a copper alloy, or alloy 42 (a 42% Ni-Fe alloy). It is preferable to use a metal substrate 31 that has been degreased and cleaned on both sides.

Next, photosensitive resist is applied to the entire upper and lower surfaces of the metal substrate 31, and then dried. The photosensitive resist on the metal substrate 31 is then exposed through a photomask and developed. This forms the etching resist layers 32 and 33 (FIG. 6(b)). The etching resist layer 33 on the lower surface side has an opening 33b. The etching resist layer 32 on the upper surface side does not have an opening, but may have an opening. Note that the etching resist layers 32 and 33 may be, for example, a dry film resist.

Next, the metal substrate 31 is etched with an etchant using the etching resist layers 32, 33 as a corrosion-resistant film (Figure 6 (c)). The etchant can be selected appropriately depending on the material of the metal substrate 31 used. For example, when copper is used as the metal substrate 31, a ferric chloride aqueous solution is usually used as the etchant, and spray etching can be performed from both sides of the metal substrate 31. This forms the outer shape of the plate-shaped member 10. At this time, the metal substrate 31 is partially thinned from the lower surface side by half etching, and a connecting portion 71 is formed.

Next, the etching resist layers 32 and 33 are peeled off and removed (FIG. 6(d)). This results in a first conductive layer 70 including a plurality of plate-shaped members 10.

Next, the adhesive layer 60 and the support layer 50 are prepared (FIG. 6(e)). In this case, a laminate may be prepared in advance in which the adhesive layer 60 is bonded to the lower surface 52 of the support layer 50. The visible light transmittance of the support layer 50 or the aperture ratio of the support layer 50 is 50% or more and 90% or less. When the support layer 50 has a plurality of openings 53 (see FIGS. 3(a) and 3(b)), the openings 53 are formed in the support layer 50 in advance. The openings 53 may be formed, for example, by etching.

Next, the support layer 50 is laminated on the first conductive layer 70 via the adhesive layer 60 (Figure 6(f)). Specifically, the laminate consisting of the adhesive layer 60 and the support layer 50 is adhered to the first conductive layer 70. At this time, the lower surface 62 of the adhesive layer 60 is adhered to the upper surface 11 of each plate-like member 10.

Then, the second conductive layer 80 is laminated on the first conductive layer 70 (FIG. 6(g)). If the second conductive layer 80 is a solder plating layer, the second conductive layer 80 may be formed on the first conductive layer 70 by electrolytic plating. If the second conductive layer 80 is a metal paste layer such as silver paste, the second conductive layer 80 may be applied onto the first conductive layer 70.

In this manner, the composite member 40 shown in Figures 1 to 2B is obtained.

(Method of manufacturing a semiconductor device)
Next, a method for manufacturing the semiconductor device 20 shown in FIG. 5 will be described with reference to FIGS.

First, a composite member 40 is fabricated (FIG. 7(a)) by, for example, the method shown in FIGS. 6(a)-(g). An intermediate body 28 is also prepared, which has a first terminal 25, a second terminal 26, a semiconductor element 21, and a metal member 22. In this case, the semiconductor element 21 is mounted on the first terminal 25 via a first bonding layer 27. The metal member 22 electrically connects the semiconductor element 21 and the second terminal 26.

Next, the composite member 40 is bonded onto the semiconductor elements 21. In this case, the plate-like members 10 of the first conductive layer 70 are bonded to the corresponding semiconductor elements 21 via the second conductive layer 80 (FIG. 7(b)). In this embodiment, the visible light transmittance of the support layer 50 or the aperture ratio of the support layer 50 is 50% or more and 90% or less. Therefore, the plate-like members 10 of the composite member 40 can be precisely positioned on the corresponding semiconductor elements 21. This allows the plate-like members 10 to be efficiently mounted on the semiconductor elements 21.

Next, the support layer 50 and adhesive layer 60 of the composite member 40 are peeled off from the plate-like member 10 and the second conductive layer 80 (FIG. 7(c)). If the adhesive layer 60 is a layer with low adhesion, the support layer 50 and adhesive layer 60 can be peeled off as a unit. This leaves the plate-like member 10 and the second conductive layer 80 on the semiconductor element 21. Alternatively, if the adhesive layer 60 is a layer with UV peelability, a UV laser (wavelength 355 nm) is irradiated from the support layer 50 side. The irradiated laser light passes through the support layer 50 and reaches the adhesive layer 60. The adhesive layer 60 is modified by the laser light, and the adhesion strength is reduced or lost. This causes the support layer 50 and adhesive layer 60 to be peeled off from the plate-like member 10.

Next, the sealing resin 23 is formed by injection molding or transfer molding, for example, a thermosetting resin or a thermoplastic resin (FIG. 7(d)). At this time, the first terminal 25, the second terminal 26, the semiconductor element 21, the metal member 22, and the plate-like member 10 are sealed with the sealing resin 23.

Then, the first terminals 25 and second terminals 26 located between each semiconductor element 21 are diced. This separates the plate-like member 10 into individual semiconductor devices 20. At this time, the first terminals 25 and second terminals 26 between each semiconductor device 20 may be cut while rotating a blade containing, for example, artificial diamond.

In this manner, the semiconductor device 20 shown in FIG. 5 is obtained (FIG. 7(e)).

According to this embodiment, the composite member 40 includes a support layer 50, an adhesive layer 60, and a first conductive layer 70. The first conductive layer 70 includes a plate-shaped member 10. This makes it easy to mount the plate-shaped member 10 of the first conductive layer 70 on the semiconductor element 21. As a result, the semiconductor device 20 can be efficiently manufactured.

Furthermore, according to this embodiment, the visible light transmittance of the support layer 50 or the aperture ratio of the support layer 50 is 50% or more and 90% or less. This makes it easy to visually confirm the positions of the plate-shaped member 10 and the semiconductor element 21 from the support layer 50 side when joining the plate-shaped member 10 to the semiconductor element 21. As a result, the task of mounting the plate-shaped member 10 to the semiconductor element 21 can be carried out efficiently.

If the adhesive layer 60 has UV peelability, the support layer 50 and adhesive layer 60 are peeled off and removed from the plate-like member 10 and the second conductive layer 80 by irradiating them with laser light during the manufacturing process of the semiconductor device 20. In this case, the visible light transmittance of the support layer 50 or the aperture ratio of the support layer 50 is 50% or more and 90% or less, so that the laser light can easily pass through the support layer 50. Therefore, the support layer 50 and adhesive layer 60 can be easily peeled off and removed from the plate-like member 10 and the second conductive layer 80.

Furthermore, according to this embodiment, the support layer 50 may be a metal layer. The thermal expansion coefficient of the support layer 50 may be equal to or greater than 1×10 ⁻⁶ /° C. and equal to or less than 20×10 ⁻⁶ /° C. In this case, the thermal expansion coefficient of the support layer 50 can be made to approach the thermal expansion coefficient of the semiconductor element 21. This allows the plate-like member 10 and the semiconductor element 21 to be accurately positioned when the plate-like member 10 of the composite member 40 is bonded onto the corresponding semiconductor element 21.

In addition, according to this embodiment, the support layer 50 may be a resin layer. The thickness of the support layer 50 may be 50 μm or more and 200 μm or less. This allows the support layer 50 to have both flexibility and rigidity.

Also, according to this embodiment, the first conductive layer 70 may include a plurality of plate-like members 10. This allows the plurality of plate-like members 10 to be efficiently mounted on the corresponding semiconductor elements 21 during the manufacturing process of the semiconductor device 20. The plurality of plate-like members 10 may also be connected to each other by connecting portions 71. This makes it possible to suppress deformation of the first conductive layer 70.

In addition, according to this embodiment, the connecting portion 71 may be thinner than the plate-like member 10. This makes it possible to prevent the connecting portion 71 from shorting out with the metal member 22, etc., within the semiconductor device 20.

Second Embodiment
Next, a second embodiment will be described with reference to Figures 8 and 9. Figures 8 and 9 are diagrams showing the second embodiment. The embodiment shown in Figures 8 and 9 differs in the configuration of the connecting portion 71, and other configurations are substantially the same as the embodiment shown in Figures 1 to 7 described above. In Figures 8 and 9, the same parts as those in the first embodiment shown in Figures 1 to 7 are given the same reference numerals and detailed description thereof will be omitted.

Figure 8 is a cross-sectional view (corresponding to Figure 2B) showing composite member 40A according to this embodiment.

As shown in FIG. 8, the composite member 40A according to this embodiment includes a support layer 50, an adhesive layer 60, a first conductive layer 70, and a second conductive layer 80. The adhesive layer 60 is laminated on the support layer 50. The first conductive layer 70 is laminated on the adhesive layer 60. The second conductive layer 80 is laminated on the first conductive layer 70. The visible light transmittance of the support layer 50 or the aperture ratio of the support layer 50 is 50% or more and 90% or less. The first conductive layer 70 includes a plurality of plate-shaped members 10. The plurality of plate-shaped members 10 are connected to each other by connecting portions 71.

In this embodiment, the connecting portion 71 is thinned from the upper surface 11 side of the plate-like member 10. The connecting portion 71 may be thinned by half etching. By thinning the connecting portion 71 from the upper surface 11 side, it is possible to bring the lower surface side of the connecting portion 71 into contact with the semiconductor element 21, and the contact area between the connecting portion 71 and the semiconductor element 21 within the semiconductor device 20 can be increased.

The second conductive layer 80 is laminated on the lower surface 12 of the plate-shaped member 10. The second conductive layer 80 is also formed around the connecting portion 71. The second conductive layer 80 may also be present between the connecting portion 71 and the adhesive layer 60. The second conductive layer 80 may be in contact with the lower surface 62 of the adhesive layer 60. Alternatively, a space may be present between the second conductive layer 80 located on the upper surface of the connecting portion 71 and the lower surface 62 of the adhesive layer 60. Alternatively, the second conductive layer 80 may not be present between the connecting portion 71 and the adhesive layer 60, and a space may be present between the connecting portion 71 and the adhesive layer 60. In this embodiment, the second conductive layer 80 may not be provided.

Next, a method for manufacturing the composite member 40A shown in FIG. 8 will be described with reference to FIGS. 9(a)-(g). In FIGS. 9(a)-(g), the same parts as those in FIGS. 6(a)-(g) are designated by the same reference numerals and detailed descriptions are omitted.

First, prepare a metal substrate 31 (Figure 9(a)) in a manner similar to the process shown in Figure 6(a) described above.

Next, photosensitive resist is applied to the entire upper and lower surfaces of the metal substrate 31, and then dried. The photosensitive resist on the metal substrate 31 is then exposed through a photomask and developed. This forms etching resist layers 32 and 33 (FIG. 9(b)). The etching resist layer 32 on the upper surface side has an opening 32b. The etching resist layer 33 on the lower surface side does not have an opening, but may have an opening.

Then, the metal substrate 31 is etched with an etching solution using the etching resist layers 32 and 33 as a corrosion-resistant film (Figure 9(c)). At this time, the metal substrate 31 is partially thinned from the upper surface side by half etching, and a connecting portion 71 is formed.

Next, the etching resist layers 32 and 33 are peeled off and removed (FIG. 9(d)), in a manner similar to the process shown in FIG. 6(d) described above.

Next, the adhesive layer 60 and the support layer 50 are prepared in a manner similar to that shown in FIG. 6(e) above (FIG. 9(e)).

Next, in a manner similar to the process shown in FIG. 6(f) described above, the support layer 50 is laminated on the first conductive layer 70 via the adhesive layer 60 (FIG. 9(f)).

Next, the second conductive layer 80 is laminated on the first conductive layer 70 in a manner substantially similar to the process shown in FIG. 6(g) described above (FIG. 9(g)). When the second conductive layer 80 is a solder plating layer, the second conductive layer 80 may be formed on the first conductive layer 70 by electrolytic plating. When the second conductive layer 80 is a metal paste layer such as silver paste, the second conductive layer 80 may be applied on the first conductive layer 70. The second conductive layer 80 may also be formed between the connecting portion 71 and the adhesive layer 60.

In this manner, the composite member 40A shown in FIG. 8 is obtained.

(Method of manufacturing a semiconductor device)
The method for manufacturing the semiconductor device according to this embodiment may be substantially similar to the method for manufacturing the semiconductor device 20 shown in FIGS.

Third Embodiment
Next, a third embodiment will be described with reference to Figures 10 to 12. Figures 10 to 12 are diagrams showing the third embodiment. The embodiment shown in Figures 10 to 12 differs in that a connecting portion 71 is not provided, and other configurations are substantially the same as the embodiment shown in Figures 1 to 7 described above. In Figures 10 to 12, the same parts as those in the first embodiment shown in Figures 1 to 7 are given the same reference numerals, and detailed description thereof will be omitted.

Figure 10 is a plan view (corresponding to Figure 1) showing composite member 40B according to this embodiment. Figure 11 is a cross-sectional view (corresponding to Figure 2B) showing composite member 40B according to this embodiment.

As shown in Figs. 10 and 11, the composite member 40B according to this embodiment includes a support layer 50, an adhesive layer 60, a first conductive layer 70, and a second conductive layer 80. The adhesive layer 60 is laminated on the support layer 50. The first conductive layer 70 is laminated on the adhesive layer 60. The second conductive layer 80 is laminated on the first conductive layer 70. The visible light transmittance of the support layer 50 or the aperture ratio of the support layer 50 is 50% or more and 90% or less. The first conductive layer 70 includes a plurality of plate-like members 10. In this case, the plurality of plate-like members 10 are independent of each other without being connected.

In this embodiment, the plate-like members 10 are not connected to each other at the connecting portion. A space is formed between adjacent plate-like members 10. Adjacent plate-like members 10 are not directly connected to each other, but are held together via a support layer 50 and an adhesive layer 60.

The second conductive layer 80 is laminated on the lower surface 12 of the plate-shaped member 10. The second conductive layer 80 is also formed on the side surface 13 of the plate-shaped member 10. The second conductive layer 80 is not laminated on the adhesive layer 60 located between adjacent plate-shaped members 10. In this embodiment, the second conductive layer 80 does not have to be provided.

Next, a method for manufacturing the composite member 40B shown in Figures 10 and 11 will be described with reference to Figures 12(a)-(f). In Figures 12(a)-(f), the same parts as those in Figures 6(a)-(g) are given the same reference numerals and detailed descriptions will be omitted.

First, a metal substrate 31 is prepared (FIG. 12(a)) in a manner substantially similar to the process shown in FIG. 6(a) described above. A support layer 50 and an adhesive layer 60 are also prepared. In this case, a laminate may be prepared in which the adhesive layer 60 is bonded to the lower surface 52 of the support layer 50 in advance. When the support layer 50 has a plurality of openings 53 (see FIGS. 3(a) and 3(b)), the openings 53 may be formed in the support layer 50 in advance. The openings 53 may be formed, for example, by etching.

Then, the support layer 50 is laminated on the metal substrate 31 via the adhesive layer 60 (FIG. 12(b)). Specifically, the laminate consisting of the adhesive layer 60 and the support layer 50 is adhered to the metal substrate 31. At this time, the lower surface 62 of the adhesive layer 60 is adhered to the upper surface of the metal substrate 31.

Next, a photosensitive resist is applied to the entire lower surface of the metal substrate 31 and dried. The photosensitive resist on the metal substrate 31 is then exposed to light through a photomask and developed. This forms an etching resist layer 33 (Figure 12(c)). The etching resist layer 33 on the lower surface side has an opening 33b.

Next, the metal substrate 31 is etched with an etching solution using the etching resist layer 33 as a corrosion-resistant film (Figure 12 (d)). At this time, the metal substrate 31 is etched from the lower surface side, and the portions of the metal substrate 31 between the plate-like members 10 are removed. This results in a first conductive layer 70 including multiple plate-like members 10. In this first conductive layer 70, the multiple plate-like members 10 are independent of each other and are not connected.

When the support layer 50 has multiple openings 53 (see Figs. 3(a) and 3(b)), the openings 53 may be formed in accordance with the support layer 50 when etching the metal substrate 31. In this case, in the step of providing an etching resist layer 33 on the lower surface side of the metal substrate 31 (Fig. 12(c)), an etching resist layer is also provided on the upper surface 51 side of the support layer 50. This etching resist layer on the upper surface side has openings corresponding to the openings 53. Then, in the step of etching the metal substrate 31 (Fig. 12(d)), the support layer 50 may be etched to form the openings 53.

Next, the etching resist layer 33 is peeled off and removed (Figure 12 (e)).

Next, the second conductive layer 80 is laminated on the first conductive layer 70 in a manner similar to the process shown in FIG. 6(g) described above (FIG. 12(g)). When the second conductive layer 80 is a solder plating layer, the second conductive layer 80 may be formed on the first conductive layer 70 by electrolytic plating. When the second conductive layer 80 is a metal paste layer such as silver paste, the second conductive layer 80 may be applied onto the first conductive layer 70.

In this manner, the composite member 40B shown in Figures 10 and 11 is obtained.

(Method of manufacturing a semiconductor device)
The method for manufacturing the semiconductor device according to this embodiment may be substantially similar to the method for manufacturing the semiconductor device 20 shown in FIGS.

According to this embodiment, the multiple plate-like members 10 are independent of each other and are not connected to each other. In this way, since the plate-like members 10 do not have a connecting portion 71, it is possible to prevent the connecting portion 71 from shorting out with the metal member 22 or the like within the semiconductor device 20.

The components disclosed in each of the above embodiments and modifications may be combined as necessary. Alternatively, some components may be deleted from all the components shown in each of the above embodiments and modifications.

REFERENCE SIGNS LIST 10 Plate-like member 11 Upper surface 12 Lower surface 13 Side surface 20 Semiconductor device 40 Composite member 50 Support layer 51 Upper surface 52 Lower surface 53 Opening 60 Adhesive layer 61 Upper surface 62 Lower surface 70 First conductive layer 71 Connection portion 80 Second conductive layer

Claims (12)

In a composite member for a semiconductor device,
The support base and
An adhesive layer laminated to the support layer;
a first conductive layer laminated on the adhesive layer;
the first conductive layer includes a plate-shaped member,
A composite member, wherein the visible light transmittance or the opening ratio of the support layer is 50% or more and 90% or less. 2. The composite member according to claim 1, wherein the support layer is a metal layer, and the support layer has a thermal expansion coefficient of 1×10 ⁻⁶ /° C. or more and 20×10 ⁻⁶ /° C. or less. The composite member according to claim 1, wherein the support layer is a resin layer and the thickness of the support layer is 50 μm or more and 200 μm or less. The composite member according to claim 1, wherein the first conductive layer includes a plurality of the plate-like members. The composite member according to claim 4, wherein the plurality of plate-like members are connected to each other by connecting portions. The composite member according to claim 5, wherein the connecting portion is thinner than the plate-like member. the plate-like member has an upper surface, a lower surface, and a plurality of side surfaces corresponding to each side of the upper surface and the lower surface;
the connecting portion is connected to at least two of the side surfaces of the plate-like member,
At least two of the connecting portions are connected to each side surface, and the distance between the at least two connecting portions connected to one of the side surfaces is 75 μm or more;
The composite member according to claim 5 , wherein the at least two connecting portions are disposed at positions symmetrical with respect to the center of each side. the plate-like member has an upper surface, a lower surface, and a plurality of side surfaces corresponding to each side of the upper surface and the lower surface;
the plate-like member is rectangular in plan view including short sides and long sides,
The composite member according to claim 5 , wherein the connecting portion is connected to at least the side surface of the plate-like member that corresponds to the short side. The composite member according to claim 4, wherein the plurality of plate-like members are independent of each other and are not connected to each other. The composite member according to claim 1, further comprising a second conductive layer laminated to the first conductive layer. A method for producing a composite member for a semiconductor device, comprising the steps of:
Providing a metal substrate;
obtaining a first conductive layer including a plate-shaped member by etching the metal substrate;
laminating a support layer on the first conductive layer via an adhesive layer;
A method for manufacturing a composite member, wherein the support layer has a visible light transmittance or an opening rate of 50% or more and 90% or less. A method for producing a composite member for a semiconductor device, comprising the steps of:
Providing a metal substrate;
laminating a support layer on the metal substrate via an adhesive layer;
and obtaining a first conductive layer including a plate-shaped member by etching the metal substrate.
A method for manufacturing a composite member, wherein the support layer has a visible light transmittance or an opening rate of 50% or more and 90% or less.

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