JP2024019121A5 - - Google Patents
Info
- Publication number
- JP2024019121A5 JP2024019121A5 JP2023122543A JP2023122543A JP2024019121A5 JP 2024019121 A5 JP2024019121 A5 JP 2024019121A5 JP 2023122543 A JP2023122543 A JP 2023122543A JP 2023122543 A JP2023122543 A JP 2023122543A JP 2024019121 A5 JP2024019121 A5 JP 2024019121A5
- Authority
- JP
- Japan
- Prior art keywords
- retimer
- value
- values
- sample rate
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US17/876,194 | 2022-07-28 | ||
| US17/876,194 US11888963B1 (en) | 2022-07-28 | 2022-07-28 | Frame synch detection with rate adaptation |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2024019121A JP2024019121A (ja) | 2024-02-08 |
| JP2024019121A5 true JP2024019121A5 (https=) | 2026-01-13 |
Family
ID=89575470
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2023122543A Pending JP2024019121A (ja) | 2022-07-28 | 2023-07-27 | レート適合を用いたフレーム同期検出 |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US11888963B1 (https=) |
| JP (1) | JP2024019121A (https=) |
| DE (1) | DE102023119563A1 (https=) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11888963B1 (en) * | 2022-07-28 | 2024-01-30 | Cypress Semiconductor Corporation | Frame synch detection with rate adaptation |
| US20250006216A1 (en) * | 2023-06-27 | 2025-01-02 | Qorvo Us, Inc. | Systems and methods for low-power fully digital rate conversion using pre- or post- jitter noise reduction |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7583771B2 (en) * | 2006-08-22 | 2009-09-01 | Schweitzer Engineering Laboratories, Inc. | Systems and methods for resampling unreliable data |
| US7929927B2 (en) | 2007-10-29 | 2011-04-19 | Freescale Semiconductor, Inc. | Adaptive pre-distortion with interference detection and mitigation |
| JP5563469B2 (ja) * | 2007-11-16 | 2014-07-30 | テラダイン・インコーポレーテッド | サンプルレート変換システムにおける補間係数を計算するための方法及び装置 |
| US8831070B2 (en) * | 2010-06-24 | 2014-09-09 | Stichting Imec Nederland | Method and apparatus for start of frame delimiter detection |
| US9977131B2 (en) * | 2013-10-14 | 2018-05-22 | etherwhere Corporation | Fast fix using perfect reference in a satellite-based positioning system |
| US9729364B1 (en) | 2016-06-28 | 2017-08-08 | Nxp Usa, Inc. | Frequency shift keying (FSK) demodulator and method therefor |
| US9794056B1 (en) | 2016-10-03 | 2017-10-17 | Nxp Usa, Inc. | Tone rejection during synchronization in frequency shift keyed modulation systems |
| EP3370365B1 (en) * | 2017-03-02 | 2020-07-01 | Nxp B.V. | Processing module and associated method |
| US10764097B1 (en) | 2019-03-05 | 2020-09-01 | Nxp Usa, Inc. | Frequency shift keying (FSK) error detector and method therefor |
| US10819544B2 (en) | 2019-03-29 | 2020-10-27 | Nxp Usa, Inc. | Symbol demodulator with error reduction |
| US10530905B1 (en) | 2019-04-08 | 2020-01-07 | Nxp Usa, Inc. | Frame delimiter detection |
| US10880138B2 (en) | 2019-04-24 | 2020-12-29 | Nxp Usa, Inc. | Acquisition of a data packet having a short preamble |
| US10804957B1 (en) | 2019-05-09 | 2020-10-13 | Nxp Usa, Inc. | Preamble detection during acquisition |
| US10862729B1 (en) | 2019-10-08 | 2020-12-08 | Nxp Usa, Inc. | Systems and methods for digital correction with selective enabling in low intermediate frequency (IF) receivers |
| US10862728B1 (en) | 2019-10-08 | 2020-12-08 | Nxp Usa, Inc. | Systems and methods for digital correction in low intermediate frequency (IF) receivers |
| US10862505B1 (en) | 2020-02-27 | 2020-12-08 | Nxp Usa, Inc. | Arbitrary rate decimator and timing error corrector for an FSK receiver |
| EP3968049A1 (en) | 2020-09-11 | 2022-03-16 | NXP USA, Inc. | Methods and apparatus for estimating a time-of-arrival or a distance between two devices |
| EP4064568B1 (en) | 2021-03-23 | 2025-05-07 | Nxp B.V. | Type-i plls for phase-controlled applications |
| EP4064569A1 (en) | 2021-03-23 | 2022-09-28 | Nxp B.V. | Type-i plls for phase-controlled applications |
| US11888963B1 (en) * | 2022-07-28 | 2024-01-30 | Cypress Semiconductor Corporation | Frame synch detection with rate adaptation |
-
2022
- 2022-07-28 US US17/876,194 patent/US11888963B1/en active Active
-
2023
- 2023-07-25 DE DE102023119563.8A patent/DE102023119563A1/de active Pending
- 2023-07-27 JP JP2023122543A patent/JP2024019121A/ja active Pending
- 2023-12-21 US US18/393,343 patent/US12592815B2/en active Active
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