JP2023145020A - Switching power supply device - Google Patents

Abstract

To provide a switching power supply device capable of suppressing insufficient charging of a bootstrap capacitor to prevent power supply stoppage.SOLUTION: When a voltage across both ends of a boot strap capacitor CB drops, a charging control unit 171 turns ON a transistor Q3 connected in series to a discharging resistor R3 to supply an output current of an output unit 11 to the discharging resistor R3. Alternately, when a voltage across both ends of the boot strap capacitor CB drops, the charging control unit 171 controls a low side NMOS transistor Q1 to be kept in an off state. Alternately, when a voltage across both ends of the boot strap capacitor CB drops, the charging control unit 171 lowers the duty cycle of a pulse signal outputted from a switch terminal TSW.SELECTED DRAWING: Figure 1

Description

The present invention relates to a switching power supply device.

In a switching power supply device, when driving an NMOS transistor on the high side, the gate voltage needs to be higher than the source voltage. To achieve this, a bootstrap unit has conventionally been used (for example, Patent Document 1). The magnitude of the supply voltage from the bootstrap section is determined by the voltage across the bootstrap capacitor in the bootstrap section.

Japanese Patent Application Publication No. 2006-254546

Therefore, if the bootstrap capacitor is insufficiently charged and the voltage across it drops, the high-side NMOS transistor cannot be turned on and off, causing the switching power supply to stop operating and the power supply to stop. there were.

The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a switching power supply device that can suppress insufficient charging of a bootstrap capacitor and suppress power outage.

In order to achieve the above object, the switching power supply device according to the present invention has the following features [1] to [6].
[1]
A switching power supply device that controls an output section that outputs an output voltage obtained by converting an input voltage,
a low-side NMOS transistor and a high-side NMOS transistor connected in series with each other;
a control unit that controls the output unit by alternately controlling the low-side NMOS transistor and the high-side NMOS transistor to turn on;
a bootstrap unit that generates a boot voltage that is shifted from the source potential of the high-side NMOS transistor to a high voltage side by a voltage across a bootstrap capacitor in order to drive the high-side NMOS transistor;
If it is determined that the voltage across the bootstrap capacitor has decreased or is likely to decrease, a switch connected in series to the discharge resistor is turned on to supply the output current of the output section to the discharge resistor. and a charging control section.
Must be a switching power supply.
[2]
A switching power supply device that controls an output section that outputs an output voltage obtained by converting an input voltage,
a low-side NMOS transistor and a high-side NMOS transistor connected in series with each other;
a control unit that controls the output unit by alternately controlling the low-side NMOS transistor and the high-side NMOS transistor to turn on;
a bootstrap unit that generates a boot voltage that is shifted from the source potential of the high-side NMOS transistor to a high voltage side by a voltage across a bootstrap capacitor in order to drive the high-side NMOS transistor;
and a charge control unit that controls the control unit to always turn off the low-side NMOS transistor when it is determined that the voltage across the bootstrap capacitor has decreased or is likely to decrease. ,
Must be a switching power supply.
[3]
A switching power supply device that controls an output section that outputs an output voltage obtained by converting an input voltage,
a low-side NMOS transistor and a high-side NMOS transistor connected in series with each other;
a control unit that controls the output unit by alternately controlling the low-side NMOS transistor and the high-side NMOS transistor to turn on;
a bootstrap unit that generates a boot voltage that is shifted from the source potential of the high-side NMOS transistor to a high voltage side by a voltage across a bootstrap capacitor in order to drive the high-side NMOS transistor;
If it is determined that the voltage across the bootstrap capacitor has decreased or is likely to decrease, the controller is controlled to control the duty cycle of on/off control of the low-side NMOS transistor and the high-side NMOS transistor. and a charging control section that lowers the
Must be a switching power supply.
[4]
In the switching power supply device according to any one of [1] to [3],
further comprising a voltage detection unit that outputs a comparison result between the voltage across the bootstrap capacitor and a threshold voltage,
The charging control unit determines that the voltage across the bootstrap capacitor is decreasing based on the comparison result of the voltage detection unit.
Must be a switching power supply.
[5]
In the switching power supply device according to any one of [1] to [4],
comprising a determination unit that determines at least one of the following: determining whether it is startup time, determining whether the output voltage is an overvoltage, and determining whether pulse skipping is occurring;
The charging control unit determines that there is a possibility that the voltage across the bootstrap capacitor may decrease based on the determination result of the determination unit.
Must be a switching power supply.
[6]
A switching power supply device that controls an output section that outputs an output voltage obtained by converting an input voltage,
a low-side NMOS transistor and a high-side NMOS transistor connected in series with each other;
a control unit that controls the output unit by alternately controlling the low-side NMOS transistor and the high-side NMOS transistor to turn on;
a bootstrap unit that generates a boot voltage that is shifted from the source potential of the high-side NMOS transistor to a high voltage side by a voltage across a bootstrap capacitor in order to drive the high-side NMOS transistor;
a voltage detection unit that outputs a comparison result between the voltage across the bootstrap capacitor and a plurality of threshold voltages;
first charging control that turns on a switch connected in series with a discharge resistor to supply the output current of the output unit to the discharge resistor each time the voltage detection unit outputs a comparison result that the voltage is lower than the threshold voltage; a second charging control that controls the control unit to always turn off the high-side NMOS transistor; and a second charge control that controls the control unit to control the on-off of the low-side NMOS transistor and the high-side NMOS transistor. and a charge control unit that sequentially executes a combination of at least two or more of the third charge controls to reduce the charge.
Must be a switching power supply.

According to the present invention, it is possible to provide a switching power supply device that can suppress insufficient charging of a bootstrap capacitor and suppress power outage.

The present invention has been briefly described above. Furthermore, the details of the present invention will be further clarified by reading the mode for carrying out the invention (hereinafter referred to as "embodiment") described below with reference to the accompanying drawings. .

FIG. 1 is a circuit diagram showing a DC/DC converter incorporating a switching power supply device of the present invention in a first embodiment. FIG. 2 is a time chart of the on/off of the high side NMOS transistor, the on/off of the low side NMOS transistor, the potential of the switch terminal, the coil current, and the voltage across the bootstrap capacitor during normal operation. FIG. 3 is a time chart of the potential of the switch terminal, the coil current, and the voltage across the bootstrap capacitor when the duty is high and the load current is low. FIG. 4 is a time chart of the output voltage and the potential of the switch terminal shown in FIG. 1 when the output voltage exceeds the target voltage. FIG. 5 is a time chart of the potential of the switch terminal, the coil current, and the voltage across the bootstrap capacitor when current is supplied to the discharge section shown in FIG. FIG. 6 is a time chart of the on-off of the low-side NMOS transistor, the on-off of the high-side NMOS transistor, the potential of the switch terminal, the coil current, and the voltage across the bootstrap capacitor when the low-side NMOS transistor is always off. FIG. 7 is a circuit diagram showing a DC/DC converter incorporating the switching power supply device of the present invention in a second embodiment.

(First embodiment)
A first embodiment of the present invention will be described below with reference to each figure.

The DC/DC converter 1 of this embodiment supplies the load 2 with an output voltage VOUT obtained by stepping down the input voltage VIN. Input voltage VIN is supplied from DC power supply 3. The DC/DC converter 1 includes an output section 11 that step-down converts an input voltage VIN and outputs it as an output voltage VOUT, a switching power supply device 12 that supplies a pulsed input voltage VIN to the output section 11, and a bootstrap capacitor. It is equipped with CB.

The output section 11 includes a coil L1 and an output capacitor C1. Coil L1 is connected between switch terminal TSW of switching power supply device 12 and load 2. The load 2 has one end connected to the coil L1 and the other end connected to ground. The output capacitor C1 has one end connected to a connection point between the coil L1 and the load 2, and the other end connected to ground.

The switching power supply device 12 is composed of an IC chip. The switching power supply device 12 includes a low-side NMOS transistor Q1 (hereinafter sometimes abbreviated as "transistor Q1"), a high-side NMOS transistor Q2 (hereinafter sometimes abbreviated as "transistor Q2"), and a driver section (Fig. (referred to as "DRV" in 1) 131, 132, the bootstrap section 14, the output voltage detection section 15, the error detection section 16, the PWM control section 17 as a control section, the discharge section 18, and the voltage detection section A boot voltage detection section 19 is provided.

The transistors Q1 and Q2 are composed of Nch power MOSFETs (metal-oxide semiconductor field-effect transistors). The source of the low-side NMOS transistor Q1 is connected to ground, and the drain is connected to the switch terminal TSW. The high-side NMOS transistor Q2 has a source connected to the switch terminal TSW and the drain of the transistor Q1, and a drain connected to the input terminal TIN. An input voltage VIN supplied from the DC power supply 3 is input to the input terminal TIN.

As shown in FIG. 2, when the transistor Q2 is turned on and the transistor Q1 is turned off, the input voltage VIN is output from the switch terminal TSW. On the other hand, when the transistor Q2 is turned off and the transistor Q1 is turned on, a ground potential of 0V is output from the switch terminal TSW. By alternately turning on the transistors Q1 and Q2, the switch terminal TSW outputs a pulse signal (=pulse input voltage VIN) in which the H level is the input voltage VIN and the L level is 0V. By inputting this pulse signal to the output section 11 and smoothing it by the coil L1 and the output capacitor C1, it is possible to supply the load 2 with an output voltage VOUT according to the duty of the pulse signal.

Note that when switching on and off the transistors Q1 and Q2, a dead time DT is provided in which both the transistors Q1 and Q2 are turned off in order to prevent short-circuiting of the DC power supply 3. During the dead time DT, the potential of the switch terminal TSW is -0.7V, that is, a potential lower than the ground potential 0V by 0.7V of the forward voltage of the parasitic diode of the transistor Q1.

As shown in FIG. 1, the driver section 131 is a circuit that is connected to the gate of the transistor Q1 and drives the transistor Q1 to turn on and off. The driver section 131 operates in response to power supply from a gate drive power source (denoted as "LDO" in FIG. 1) 141. The driver section 131 outputs a pulse signal whose H level is the gate drive voltage VG (for example, 5V) and whose L level is the ground potential 0 to the gate of the transistor Q1. Transistor Q1 is turned on when the pulse signal output from driver section 131 is at H level, and turned off when it is at L level.

The driver section 132 is a circuit that is connected to the gate of the transistor Q2 and drives the transistor Q2 to turn on and off. When the transistor Q2 is turned on, the source potential becomes equal to the input voltage VIN. Therefore, even if the gate drive voltage VG is supplied to the gate of the transistor Q2 in the same way as the transistor Q1, the transistor Q2 cannot be kept turned on. Therefore, the driver section 132 operates upon receiving power supply from the bootstrap section 14, which will be described later. The bootstrap unit 14 is a circuit that uses the bootstrap capacitor CB to generate a boot voltage VB that is the sum of the voltage across the bootstrap capacitor CB and the potential of the switch terminal TSW (ie, the source potential of the transistor Q2). Under normal conditions, the voltage across the bootstrap capacitor CB is approximately equal to the gate drive voltage VG, as will be described later.

The driver section 132 outputs a pulse signal whose H level is the boot voltage VB and whose L level is the potential of the switch terminal TSW to the gate of the transistor Q2. When the pulse signal output from the driver section 132 is at H level, transistor Q2 is turned on, and when it is at L level, transistor Q2 is turned off.

The bootstrap section 14 includes a gate driving power source 141 and a diode D1. The gate drive power supply 141 generates and outputs a gate drive voltage VG from the input voltage VIN. The diode D1 has an anode connected to the gate driving power supply 141, and a cathode connected to one end of the bootstrap capacitor CB via the boot terminal TB. The other end of the bootstrap capacitor CB is connected to the switch terminal TSW.

When the driver section 131 supplies the gate drive voltage VG (H level pulse signal) to the gate of the transistor Q1, the transistor Q1 is turned on. When the driver section 132 supplies the potential of the switch terminal TSW (L level pulse signal) to the gate of the transistor Q2, the transistor Q2 is turned off. When the transistor Q1 is on and the transistor Q2 is off, the switch terminal TSW has a ground potential of 0V. When the switch terminal TSW reaches the ground potential of 0V, a current from the gate drive power supply 141 is supplied to the bootstrap capacitor CB via the diode D1, and the bootstrap capacitor CB is charged. As a result, as shown in FIG. 2, the voltage across the bootstrap capacitor CB increases toward the gate drive voltage VG. In particular, during the dead time DT, the potential of the switch terminal TSW is -0.7V, so the bootstrap capacitor CB is charged quickly.

Next, when the driver section 131 supplies a ground potential (an L-level pulse signal) to the transistor Q1, the transistor Q1 is turned off. When the driver section 132 supplies the boot voltage VB (H level pulse signal) to the transistor Q2, the transistor Q2 is turned on. At the time of this switching, the potential of the switch terminal TSW, that is, the source potential of the transistor Q2 rises from the ground to the input voltage VIN. However, although the bootstrap capacitor CB discharges slowly as shown in Figure 2, the voltage across it remains approximately at the gate drive voltage VG, so the boot voltage VB is always the source potential of transistor Q2 + gate drive voltage VG. , transistor Q2 continues to be on. Moreover, the current from the bootstrap capacitor CB does not flow into the gate drive power supply 141 due to the function of the diode D1.

As shown in FIG. 1, the output voltage detection section 15 outputs a detection voltage VR corresponding to the output voltage VOUT to an error detection section 16, which will be described later. The output voltage detection section 15 has resistors R1 and R2. One end of the resistor R1 is connected to ground, and the other end is connected to one end of the resistor R2. The other end of the resistor R2 is connected to the connection point between the coil L1 and the capacitor C1 (=the output of the output section 11) via the feedback terminal TFB. A detection voltage VR obtained by dividing the output voltage VOUT by the resistors R1 and R2 is output to the connection point between the resistors R1 and R2.

The error detection section 16 outputs an error signal VFB, which is an amplified error between the detection voltage VR and the reference voltage VREF, to the PWM control section 17. The reference voltage VREF is set to be equal to the detection voltage VR output from the output voltage detection section 15 when the output voltage VOUT reaches the target voltage. The PWM control section 17 controls the driver sections 131 and 132 so that the driver sections 131 and 132 output pulse signals having a duty according to the error signal VFB.

In the DC/DC converter 1 described above, there was a problem in that if the bootstrap capacitor CB was insufficiently charged, the transistor Q2 could not be turned on, and the power supply would be stopped. The causes of insufficient charging of the bootstrap capacitor CB include the following. As shown in FIG. 3, for example, when the potential difference between the input voltage VIN and the output voltage VOUT is small, the duty of the pulse signal output from the switch terminal TSW becomes high. When the duty becomes higher, the time during which the potential of the switch terminal TSW becomes Low (ground potential) becomes shorter, and the charging of the bootstrap capacitor CB becomes insufficient.

In addition, when the load current flowing through the load 2 (1/2 of the ripple current ΔIL1 of the coil L1 shown in FIG. 2) is small, when the transistor Q1 is on and the transistor Q2 is off, a reverse current flows from the capacitor C1 to the coil L1. occurs. Thereafter, when both transistors Q1 and Q2 are turned off (dead time DT), a reverse current flows to the input terminal TIN through the parasitic diode of transistor Q2. Therefore, as shown in FIG. 3, during the dead time DT, the potential of the switch terminal TSW becomes the input voltage VIN+the forward voltage of the parasitic diode 0.7V (H level). Therefore, the charging time of the bootstrap capacitor CB becomes short, and the charging of the bootstrap capacitor CB becomes insufficient.

In addition, as shown in FIG. 4, when the output voltage VOUT exceeds the target voltage, pulse skipping of the pulse signal occurs, the switching operation stops, and the switch terminal TSW becomes a high impedance state, the bootstrap capacitor CB is insufficiently charged.

Therefore, in this embodiment, the DC/DC converter 1 includes a discharging section 18, a boot voltage detecting section 19, and a charging control section 171, as shown in FIG. The discharge section 18 includes a discharge resistor R3 and a transistor Q3. Discharge resistor R3 is connected between feedback terminal TFB and the drain of transistor Q3. The transistor Q3 has a source connected to the ground, and a gate connected to a charge control section 171, which will be described later. When the transistor Q3 is turned on, the output current of the output section 11 can be supplied to the discharge resistor R3.

In this embodiment, the boot voltage detector 19 includes a first voltage detector 191, a second voltage detector 192, and a third voltage detector 193. The first to third voltage detectors 191 to 193 detect the voltage across the bootstrap capacitor CB, and combine the detected voltage across the bootstrap capacitor CB with the first to third threshold voltages (for example, the first threshold voltage = 4V, The comparison result with the second threshold voltage=3V and the third threshold voltage=2V is output to the charging control section 171.

The charging control unit 171 performs the following (A) to (C) every time the voltage across the bootstrap capacitor CB falls below the first to third threshold voltages based on the comparison results of the first to third voltage detectors 191 to 193. ) to perform control to increase the amount of charge in the bootstrap capacitor CB.

(A) The charging control section 171 turns on the transistor Q3 and causes the output current of the output section 11 to flow toward the discharge resistor R3. In this case, as is clear from the comparison between FIG. 3 and FIG. 5, the output current increases and it is possible to prevent reverse current from flowing through the coil L1. Therefore, during the dead time DT when both transistors Q1 and Q2 are off, the potential of the switch terminal TSW can be set to the L level (-0.7V). Thereby, the charging time of the bootstrap capacitor CB can be lengthened, and the amount of charging of the bootstrap capacitor CB can be increased.

(B) As shown in FIG. 6, the charging control unit 171 controls the driver unit 131 so that the transistor Q1 is always off, and the driver unit so that the transistor Q2 is turned on and off at a duty according to the error signal VFB. 132. In this case, as is clear from the comparison of FIGS. 3 and 6, there is always a dead time DT during the off period of the transistor Q2, and the potential of the switch terminal TSW can be kept at -0.7V continuously. Therefore, it is possible to lengthen the charging time of the bootstrap capacitor CB and speed up the charging, and it is possible to increase the amount of charge of the bootstrap capacitor CB.

(C) The charging control unit 171 controls the driver units 131 and 132 to forcibly reduce the duty cycle of the pulse signal output from the driver units 131 and 132. The PWM control unit 17 includes an oscillator, converts a pulse signal of the oscillation frequency of the oscillator into a duty according to the error signal VFB, and outputs it to the gates of the transistors Q1 and Q2. Therefore, when the voltage across the bootstrap capacitor CB is decreasing, the charging control section 171 lowers the frequency of the oscillator and forcibly lowers the duty cycle of the pulse signals output from the driver sections 131 and 132. That is, the duty cycle of the on/off control of the transistors Q1 and Q3 is reduced. Therefore, the charging time of the bootstrap capacitor CB can be lengthened, and the amount of charging of the bootstrap capacitor CB can be increased. Although there is a risk that the output voltage VOUT will drop if the duty cycle is forcibly reduced in this way, the worst case of power cutoff due to insufficient charging of the bootstrap capacitor CB can be avoided.

In this embodiment, the charging control unit 171 executes the first charging control described in (A) above when the voltage across the bootstrap capacitor CB falls below the first threshold voltage. Furthermore, when the voltage across the bootstrap capacitor CB falls below the second threshold voltage, the charging control unit 171 executes the second charging control described in (B) above. Furthermore, when the voltage across the bootstrap capacitor CB falls below the third threshold voltage, the charging control unit 171 executes the third charging control described in (C) above.

According to the embodiment described above, when the voltage across the bootstrap capacitor CB decreases, the output current of the output section 11 is caused to flow through the discharge resistor R3 to increase the output current and increase the amount of charge of the bootstrap capacitor CB. I can do it. Therefore, insufficient charging of the bootstrap capacitor CB can be suppressed, and power outage can be suppressed.

According to the embodiment described above, when the voltage across the bootstrap capacitor CB decreases, the low-side NMOS transistor Q1 can be turned off at all times to increase the amount of charge in the bootstrap capacitor CB. Therefore, insufficient charging of the bootstrap capacitor CB can be suppressed, and power outage can be suppressed.

According to the embodiment described above, when the voltage across the bootstrap capacitor CB decreases, the duty cycle of the pulse signals output from the driver sections 131 and 132 is forcibly reduced to reduce the amount of charge in the bootstrap capacitor CB. can be increased. Therefore, insufficient charging of the bootstrap capacitor CB can be suppressed, and power outage can be suppressed.

According to the embodiment described above, each time the voltage across the bootstrap capacitor CB falls below the first to third threshold voltages, the charging control unit 171 performs the first charging control in (A) to the third charging control in (C). Executes charging control in sequence. Thereby, insufficient charging of the bootstrap capacitor CB can be suppressed with even higher accuracy, and power outage can be suppressed.

Note that in the first embodiment described above, steps (A) to (C) are executed in the order each time the voltage across the bootstrap capacitor CB falls below the first threshold voltage to the third threshold voltage, but this is not limited to this. It's not a thing. (A) to (C) may be placed in any order.

Further, in the first embodiment described above, three threshold voltages are provided for the bootstrap capacitor CB, but the present invention is not limited to this. Two threshold voltages may be provided, and two of (A) to (C) may be executed in order each time the voltage across the bootstrap capacitor CB falls below the threshold voltage. Alternatively, only one threshold voltage may be provided, and one of (A) to (C) may be executed when the voltage across the capacitor CB falls below the threshold voltage.

Further, in the first embodiment described above, the charging control unit 171 executes one of the first charging control in (A) to the second charging control in (C), but the invention is not limited to this. . The charging control unit 171 may simultaneously execute two or more of the first charging control in (A) to the second charging control in (C).

(Second embodiment)
Next, a specific second embodiment of the present invention will be described below with reference to FIG. In addition, in FIG. 7, the same reference numerals are attached to the same parts as those of the DC/DC converter 1 shown in FIG. 1 already explained in the above-described first embodiment, and detailed explanation thereof will be omitted.

As shown in the figure, the DC/DC converter 1B includes an output section 11, a switching power supply device 12B, and a bootstrap capacitor CB. The output section 11 and the bootstrap capacitor CB are the same as those in the first embodiment, so a detailed explanation will be omitted here.

The switching power supply device 12B includes the transistors Q1 and Q2 already described in the first embodiment, the driver sections 131 and 132, the bootstrap section 14, the output voltage detection section 15, the error detection section 16, and the PWM control section 17. In addition to the discharging section 18 and the boot voltage detecting section 19, it includes an overvoltage determining section 20, a soft start determining section 21, a pulse skip determining section 22, and an OR circuit 23 as determining sections.

In the first embodiment described above, the charging control unit 171 directly detects the voltage across the capacitor CB, determines that the voltage across the capacitor CB is decreasing, and performs the first charging control to (A) above. Although the third charging control in (C) was executed, the present invention is not limited to this. When there is a possibility that the voltage across the capacitor CB decreases, the charging control unit 171 may perform the first charging control in (A) to the third charging control in (C).

The DC/DC converter 1 has a function of stopping the switching operations of the transistors Q1 and Q2 when the output voltage VOUT becomes an overvoltage. When the switching operation is stopped, there is a risk that the bootstrap capacitor CB will be insufficiently charged, and the voltage across the bootstrap capacitor CB will drop, similar to the pulse skip described above. Therefore, the switching power supply device 12B of this embodiment includes an overvoltage determination section 20. When the detected voltage VR exceeds the overvoltage threshold, the overvoltage determination unit 20 determines that there is an overvoltage, and outputs this to the OR circuit 23 .

Further, when the DC/DC converter 1 is activated (at the time of start), there are many cases where no charge is accumulated in the bootstrap capacitor CB, and the input voltage VIN may be reduced. Therefore, there is a high possibility that the voltage across the capacitor CB will decrease. Therefore, the switching power supply device 12B of this embodiment includes a soft start determination section 21. The DC/DC converter 1 has a soft start function that sets the reference voltage VREF lower than a set value at the time of start and gradually increases it to the set value. If the reference voltage VREF is lower than the set value, the soft start determination unit 21 determines that it is the soft start time, and outputs this to the OR circuit 23 .

Furthermore, as described above, when the output voltage VOUT exceeds the target voltage and pulse skipping occurs, the bootstrap capacitor CB may become insufficiently charged, and the voltage across the bootstrap capacitor CB may drop. Therefore, the switching power supply device 12B of this embodiment includes a pulse skip determination section 22. The pulse skip determination unit 22 monitors the error signal VFB, and when it determines that the output voltage VOUT has reached the target voltage and pulse skipping has occurred, it outputs this to the OR circuit 23.

The OR circuit 23 is connected to the charging control section 171, and when it is determined that any one of overvoltage, soft start, and pulse skipping has occurred, it notifies the charging control section 171 of this fact. If one or more of overvoltage, soft start, and pulse skipping occurs, the charging control unit 171 determines that the bootstrap capacitor CB is insufficiently charged or is likely to become insufficiently charged, and performs the above-mentioned At least one of the first charging control in (A) to the second charging control in (C) is executed.

According to the embodiment described above, when there is a high possibility that the voltage across the bootstrap capacitor CB will decrease, any one of the first charging control (A) to the third charging control (C) is executed. . Therefore, insufficient charging of the bootstrap capacitor CB can be suppressed, and power outage can be suppressed.

Note that, according to the second embodiment described above, the switching power supply device 12B has three determination sections: the overvoltage determination section 20, the soft start determination section 21, and the pulse skip determination section 22; however, the present invention is not limited to this. It's not a thing. The switching power supply device 12B only needs to have at least one of the overvoltage determining section 20, the soft start determining section 21, and the pulse skip determining section 22.

Further, in the second embodiment described above, the switching power supply device 12B includes the boot voltage detection section 19, and performs the first charging control in (A) based on the comparison between the voltage across the bootstrap capacitor CB and the threshold voltage. Although the third charging control shown in (C) is executed, the present invention is not limited to this. The switching power supply device 12B does not need to include the boot voltage detection section 19, and executes the first charging control in (A) to the third charging control in (C) only in accordance with the determination results of the determination sections 20 to 22. You may also do so.

Note that the present invention is not limited to the embodiments described above, and can be modified, improved, etc. as appropriate. In addition, the material, shape, size, number, arrangement location, etc. of each component in the above-described embodiments are arbitrary as long as the present invention can be achieved, and are not limited.

According to the embodiment described above, the output section 11 is configured of a step-down type, but the output section 11 is not limited to this. The output section 11 may be of a step-up type that converts the input voltage into a step-up type.

11 Output section 12 Switching power supply device 14 Bootstrap section 17 PWM control section (control section)
19 Boot voltage detection section (voltage detection section)
20 Overvoltage judgment section (judgment section)
21 Soft start judgment section (judgment section)
22 Pulse skip determination section (determination section)
171 Charging control section CB Bootstrap capacitor Q1 Low-side NMOS transistor Q2 High-side NMOS transistor Q3 Transistor (switch)
R3 Discharge resistance VB Boot voltage VIN Input voltage VOUT Output voltage

Claims (6)

A switching power supply device that controls an output section that outputs an output voltage obtained by converting an input voltage,
a low-side NMOS transistor and a high-side NMOS transistor connected in series with each other;
a control unit that controls the output unit by alternately controlling the low-side NMOS transistor and the high-side NMOS transistor to turn on;
a bootstrap unit that generates a boot voltage that is shifted from the source potential of the high-side NMOS transistor to a high voltage side by a voltage across a bootstrap capacitor in order to drive the high-side NMOS transistor;
If it is determined that the voltage across the bootstrap capacitor has decreased or is likely to decrease, a switch connected in series to the discharge resistor is turned on to supply the output current of the output section to the discharge resistor. and a charging control section.
Switching power supply. A switching power supply device that controls an output section that outputs an output voltage obtained by converting an input voltage,
a low-side NMOS transistor and a high-side NMOS transistor connected in series with each other;
a control unit that controls the output unit by alternately controlling the low-side NMOS transistor and the high-side NMOS transistor to turn on;
a bootstrap unit that generates a boot voltage that is shifted from the source potential of the high-side NMOS transistor to a high voltage side by a voltage across a bootstrap capacitor in order to drive the high-side NMOS transistor;
and a charge control unit that controls the control unit to always turn off the low-side NMOS transistor when it is determined that the voltage across the bootstrap capacitor has decreased or is likely to decrease. ,
Switching power supply. A switching power supply device that controls an output section that outputs an output voltage obtained by converting an input voltage,
a low-side NMOS transistor and a high-side NMOS transistor connected in series with each other;
a control unit that controls the output unit by alternately controlling the low-side NMOS transistor and the high-side NMOS transistor to turn on;
a bootstrap unit that generates a boot voltage that is shifted from the source potential of the high-side NMOS transistor to a high voltage side by a voltage across a bootstrap capacitor in order to drive the high-side NMOS transistor;
If it is determined that the voltage across the bootstrap capacitor has decreased or is likely to decrease, the controller is controlled to control the duty cycle of on/off control of the low-side NMOS transistor and the high-side NMOS transistor. and a charging control section that lowers the
Switching power supply. In the switching power supply device according to any one of claims 1 to 3,
further comprising a voltage detection unit that outputs a comparison result between the voltage across the bootstrap capacitor and a threshold voltage,
The charging control unit determines that the voltage across the bootstrap capacitor is decreasing based on the comparison result of the voltage detection unit.
Switching power supply. In the switching power supply device according to any one of claims 1 to 4,
comprising a determination unit that determines at least one of the following: determining whether it is startup time, determining whether the output voltage is an overvoltage, and determining whether pulse skipping is occurring;
The charging control unit determines that there is a possibility that the voltage across the bootstrap capacitor may decrease based on the determination result of the determination unit.
Switching power supply. A switching power supply device that controls an output section that outputs an output voltage obtained by converting an input voltage,
a low-side NMOS transistor and a high-side NMOS transistor connected in series with each other;
a control unit that controls the output unit by alternately controlling the low-side NMOS transistor and the high-side NMOS transistor to turn on;
a bootstrap unit that generates a boot voltage that is shifted from the source potential of the high-side NMOS transistor to a high voltage side by a voltage across a bootstrap capacitor in order to drive the high-side NMOS transistor;
a voltage detection unit that outputs a comparison result between the voltage across the bootstrap capacitor and a plurality of threshold voltages;
first charging control that turns on a switch connected in series with a discharge resistor to supply the output current of the output unit to the discharge resistor each time the voltage detection unit outputs a comparison result that the voltage is lower than the threshold voltage; a second charging control that controls the control unit to always turn off the high-side NMOS transistor; and a second charge control that controls the control unit to control the on-off of the low-side NMOS transistor and the high-side NMOS transistor. a charging control unit that sequentially executes a combination of at least two or more of the third charging controls to reduce the charge;
Switching power supply.

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