JP2010154655A - Power system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To supply stable power voltage without dropping efficiency of power generation while allowing a battery of a different type to be used. <P>SOLUTION: At the time of low output by inverters 28 and 29, a transistor 31 is turned on, a transistor 32 is turned off and a transistor 17 is turned off. Here, a capacitor 34 charges the differential voltage between a reference voltage generating section 25 and a reference voltage regulator 35. At a high output by the inverters 28 and 29, the transistor 31 is turned off, and the transistor 32 is turned on. An inverter 30 becomes low in the output, the capacitor 34 cannot be discharged by a diode 35a, and the gate of a transistor 33 is set at a negative potential. The transistor 33 is turned on, and the transistor 17 is also turned on. A full negative voltage is applied to the drain of the transistor 33 from an output terminal OUT7. Thus, a voltage which is higher than that of an input power supply part 11 can be applied to the gate of the transistor 17. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a voltage stabilization technique for a power supply system, and more particularly to a technique that is effective for supplying a stable power supply voltage without reducing the efficiency of power supply generation while accommodating different batteries.

  In electronic devices such as digital cameras, a power supply system including a plurality of DC-DC converters is widely used as a stabilized DC power supply. The power supply system has a power supply of about 5 V supplied from an input power supply such as a Li-ION (lithium ion) battery or a 2AA battery to a lens driving motor, or the like, or about 3.3 V supplied to an analog signal processing circuit or a memory card. Power supply, power supply of about 1.8V / 1.2V supplied to the core power supply, power supply of about 2.5V / 1.8V supplied to the memory, etc., and a CCD (Charge Coupled Device) as an image sensor A power supply of about 15V or -7.5V is generated.

  In general, when a 2AA battery (for example, a voltage range of about 1.8V to 3.6V) is used as an input power supply, a boost DC-DC converter is used to generate a power supply of about 3.3V. When a Li-ION battery (for example, a voltage range of about 2.2 V to about 4.5 V) is used as an input power source, a step-up DC-DC converter is used or a step-up DC-DC converter is used. It is used from a step-down DC-DC converter that inputs an output power supply voltage of about 5V.

  When a 2AA battery is used as the input power supply, the output voltage of the step-up DC-DC converter is set higher than 3.3 V in order to stably output about 3.3 V, which is the target output voltage, and LDO (Low A stable voltage is obtained through a linear series regulator such as Drop Output.

  When a 2AA battery is used, a step-down DC-DC converter that generates a power supply of about 1.8V / 1.2V and a step-down DC-DC converter that generates a power supply of about 2.5V / 1.8V are The power supply is generated using the output voltage of the step-up DC-DC converter that generates a power supply of about 5 V, for example, higher than the output voltage of the DC-DC converter as an input power supply.

  Also, in the inverting DC-DC converter, a sufficient voltage is not applied between the gate and source of the P-channel MOS-FET in the output stage connected to the input terminal of the inverting DC-DC converter, and the ON resistance In order to prevent the deterioration of the maximum output current capability and the generation efficiency of the power source, for example, the power supply voltage output from the step-up DC-DC converter that generates a power source voltage of about 5.0 V is used. To generate the power supply voltage.

Furthermore, as this type of power supply system, for example, by adopting a circuit configuration in which an oscillation circuit included in a control IC of an inverting switching regulator is driven by a voltage applied between a positive power supply input terminal and ground, A device that reduces current consumption of an oscillation circuit is known (for example, see Patent Document 1).
JP 05-191968 A

  However, the present inventors have found that the above power supply system has the following problems.

  That is, when the step-down DC-DC converter generates the power supply voltage using the output voltage of the step-up DC-DC converter, the loss in the step-up DC-DC converter increases, There is a problem that the efficiency deteriorates.

  In the configuration in which the inverting DC-DC converter generates the power supply voltage using the output voltage of the boost DC-DC converter, the output voltage of the boost DC-DC converter is output at a constant voltage in the battery voltage range. Therefore, the maximum output current of the inverting DC-DC converter is not deteriorated, but in terms of efficiency, the output voltage of the inverting DC-DC converter is obtained via the step-up DC-DC converter in the same manner as described above. As a result, the loss increases. Even in this case, there is a problem that the efficiency of the entire power supply system is lowered.

  Furthermore, in the technique of Patent Document 1, it is possible to reduce the current consumption of the oscillation circuit, but the current consumption of the error amplification, the reference voltage circuit, the NAND circuit, etc. in the control IC is relatively large as before, This portion does not reduce the current consumption, and the component circuit is forced to select an element having a relatively high breakdown voltage, which may increase the cost.

  An object of the present invention is to provide a power generation technology capable of supplying a stable power supply voltage without reducing the efficiency of power generation while accommodating different types of batteries.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  The present invention includes a step-up / step-down DC-DC converter that boosts / steps down a DC power supply voltage and converts it to an arbitrary DC voltage, at least one linear regulator that stabilizes the DC voltage, and inverts the DC power supply voltage, An inverting DC-DC converter that converts an arbitrary DC negative voltage and a step-down DC-DC converter that steps down a DC power supply voltage and converts it to an arbitrary DC voltage. The linear regulator includes a step-up / step-down DC- The output voltage is generated by the power supply voltage converted by the DC converter.

  The present invention also includes a step-up / step-down DC-DC converter that boosts / steps down a DC power supply voltage and converts it to an arbitrary DC voltage, and at least one linear regulator that stabilizes the DC voltage, The output voltage is generated by the power supply voltage converted by the step-up / step-down DC-DC converter.

  Moreover, the outline | summary of the other invention of this application is shown briefly.

  In the present invention, the step-up / step-down type DC-DC converter has two sets of PWM signals for performing a step-up / step-down operation, and includes first and second driver units for performing respective switching based on the PWM signals. A voltage control unit that controls the output voltage, and a current control unit that outputs a PWM signal as a drive signal to the driver unit based on a current control instruction signal output from the voltage control unit. For the PWM signal, the voltage control unit performs error integration on the potential difference between the output voltage and the reference voltage, and outputs a current control instruction as a result of the error integration. The current control unit outputs the current control instruction and the average value of the inductor current. The first PWM signal generated on the basis of the error and the second PWM signal generated on the basis of the difference voltage between the input voltage and the output voltage.

  Further, according to the present invention, the voltage control unit includes a feedback circuit that detects an output voltage output from the DC-DC converter, an average current detection unit that detects an average value of the inductor current, and the reference voltage and the feedback circuit. An error integration of the detected potential difference of the output voltage and output as a drive current instruction signal, a drive current instruction unit, an average value output from the average current detection unit, and a drive current instruction signal output from the drive current instruction unit A proportional control type current control amplifier that outputs an error signal, an error signal output from the current control amplifier, and a triangular wave are compared, and the comparison result is output to the first driver unit as a first PWM signal. 1 comparison unit, a signal inversely proportional to the difference between the input voltage and the output voltage, and a triangular wave are compared, and the comparison result is output to the second driver unit as a second PWM signal. And a second driver section output based on the first PWM signal and a second driver section output based on the second PWM signal. The center time of the voltage period is controlled so as to always coincide.

  Further, according to the present invention, the inverting DC-DC converter includes a first switching transistor connected between the output terminal and the input terminal, and a negative feedback for stabilizing the output voltage output from the output terminal. A transistor driving circuit for driving the first switching transistor based on the control signal, and the transistor driving circuit generates a gate voltage for driving the first switching transistor from the output voltage output from the output terminal. Is to be generated.

  Further, according to the present invention, the transistor drive circuit has a first level shift for level-shifting the input negative feedback control signal, and one connection portion is connected to the input terminal, and the gate voltage of the first switching transistor The first transistor for driving the first transistor is connected to the output part of the first level shift, the output part is connected to the gate of the first transistor, and the first transistor for driving the first transistor. Inverter, the second level shift for level shifting the negative feedback control signal, one connection is connected to the other connection of the first transistor, and the gate voltage of the first switching transistor is set to the Lo voltage. The second transistor to be connected to the second transistor, the input unit connected to the second level shift output unit, the output unit connected to the gate of the third transistor, The second inverter that drives the first transistor, one connection portion is cascode-connected to the second transistor, and the other connection portion is output from the third transistor connected to the output terminal and the second inverter. And a third inverter that outputs a drive signal for driving the third transistor based on the first signal and one connecting portion connected to the output portion of the third inverter, and the other connecting portion connected to the third inverter A first capacitor connected to the gate of the transistor; and a voltage regulator for generating an arbitrary voltage connected to the other connection portion of the first capacitor at the output portion. The voltage difference between the voltage regulated by the regulator and the reference voltage is charged, and the third inverter gives the voltage charged in the first capacitor to the gate of the third transistor.

  Further, according to the present invention, the voltage regulator includes a diode whose anode is connected to the other connection part of the first capacitor, and a voltage generation part that generates a reference voltage by connecting a cathode of the diode to the output part. It is made up of.

  Further, according to the present invention, the voltage regulator includes a diode whose anode is connected to the other connection portion of the first capacitor, one connection portion is connected to the cathode of the diode, and the other connection portion is It consists of a resistor connected to a reference potential.

  Further, according to the present invention, the step-down DC-DC converter is connected between a second switching transistor on the high side switch side connected between the output terminal and the input terminal, and the output terminal and the reference potential. A third switching transistor on the low-side switch side, and a transistor drive circuit for driving the second switching transistor based on a negative feedback control signal for stabilizing the output voltage output from the output terminal, The transistor drive circuit generates a gate voltage for driving the second switching transistor from the output voltage output from the output terminal.

  Further, according to the present invention, the transistor drive circuit has a first level shift for level-shifting the input negative feedback control signal, and one connection portion is connected to the input terminal, and the gate voltage of the first switching transistor The first transistor for driving the first transistor is connected to the output part of the first level shift, the output part is connected to the gate of the first transistor, and the first transistor for driving the first transistor. Inverter, the second level shift for level shifting the negative feedback control signal, one connection is connected to the other connection of the first transistor, and the gate voltage of the first switching transistor is set to the Lo voltage. The second transistor to be connected to the second transistor, the input unit connected to the second level shift output unit, the output unit connected to the gate of the third transistor, A second inverter that drives the transistor, a third inverter that outputs a drive signal based on a signal output from the second inverter, and one connection portion connected to the output portion of the third inverter. A second capacitor connected to the other connection portion of the second transistor is connected, and an arbitrary voltage is generated by connecting the other connection portion of the second capacitor to the output portion. And a second capacitor for charging a difference voltage between a voltage adjusted by the voltage regulator and a reference voltage based on a drive signal output from the third inverter.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  (1) By supplying the voltage generated by the step-up / step-down DC-DC converter via a linear regulator, noise can be easily separated without reducing the power conversion efficiency.

  (2) Since the on-resistance of the switching transistor on the high side in the inverting DC-DC converter and the step-down DC-DC converter can be secured sufficiently regardless of the power supply voltage of the input terminal, the maximum The battery life can be extended by preventing the output current from decreasing and improving the power conversion efficiency.

  (3) According to the above (1) and (2), it is possible to configure a power supply system with high reliability, high performance and low cost.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

(Embodiment 1)
FIG. 1 is a block diagram showing a configuration example of a power supply system according to Embodiment 1 of the present invention. FIG. 2 is a circuit diagram showing a configuration example of an inverting DC-DC converter provided in the power supply system of FIG. 3 is a timing chart of each signal in the inverting DC-DC converter of FIG.

  In the first embodiment, the power supply system 1 is used in an electronic device such as a digital camera, for example. As shown in FIG. 1, the power supply system 1 includes step-up DC-DC converters 2 to 4, a step-up / step-down DC-DC converter 5, step-down DC-DC converters 6 and 7, an inverting DC-DC converter 8, and an LDO 9. , 10 and these are, for example, power supply ICs.

  The input units of these step-up DC-DC converters 2 to 4, the step-up / step-down DC-DC converter 5, the step-down DC-DC converters 6 and 7, and the inverting DC-DC converter 8 are connected via input terminals IN1 to IN7. The input power supply units 11 are connected to each other.

  The input power supply unit 11 is a battery of an electronic device, and is, for example, a Li-ION (lithium ion) battery or a dry battery. The step-up DC-DC converter 2 boosts the power supply voltage supplied from the input power supply unit 11 and supplies it as power (for example, about 5 V) such as a motor for driving a lens of a digital camera.

  The step-up DC-DC converter 3 boosts the power supply voltage supplied from the input power supply unit 11. The power source boosted by the step-up DC-DC converter 3 is supplied as a power source (for example, about 15 V) such as a CCD (Charge Coupled Device) that serves as an image sensor of a digital camera via the output terminal OUT2.

  The step-up DC-DC converter 4 steps up the power supply voltage supplied from the input power supply unit 11 and serves as a power source for driving a backlight LED of an LCD (Liquid Crystal Display) provided in the digital camera via an output terminal OUT3. Supply.

  The step-up / step-down DC-DC converter 5 steps up / steps down the power supply voltage supplied from the input power supply unit 11 and supplies it from the output terminal OUT4c as the input power supply for the LDOs 9 and 10, which are linear series regulators. The LDO 9 supplies power from the power supply voltage generated by the step-up / step-down DC-DC converter 5 as power (eg, 3.3 V) for an analog circuit system in the image processing unit of the digital camera via the output terminal OUT4.

  The LDO 10 supplies power from the power supply voltage generated by the step-up / step-down DC-DC converter 5 as power (eg, 3.3 V) for a memory card or the like via the output terminal OUT4a. These LDOs 9 and 10 independently supply analog power and digital power, thereby reducing noise interference from the digital system to the analog system.

  The step-down DC-DC converter 6 steps down the power supply voltage supplied from the input power supply unit 11 and serves as a power supply (for example, about 1.8 V) of a memory such as a DRAM (Dynamic Random Access Memory) provided in the digital camera. It is supplied via the output terminal OUT5.

  The step-down DC-DC converter 7 steps down the power supply voltage supplied from the input power supply unit 11 and outputs it as a core power supply (for example, about 1.2 V) of an image processing system semiconductor integrated circuit device provided in the digital camera. Supply through terminal OUT6.

  The inverting DC-DC converter 8 generates a power supply voltage supplied from the input power supply unit 11 as a negative power supply voltage, and uses the output terminal OUT7 as a bias voltage (for example, about −6 V) of the CCD that is the above-described imaging device. Supply through.

  FIG. 2 is a circuit diagram illustrating a configuration example of the inverting DC-DC converter 8 provided in the power supply system 1.

  As shown, the inverting DC-DC converter 8 includes an error amplifier 12, a phase compensator 13, a PWM comparator 14, an oscillation circuit 15, a transistor drive circuit 16, a transistor 17 including a P-channel MOSFET, an inductor 18, a diode 19, It consists of resistors 20 and 21, a capacitor 22, and reference voltage generators 23 to 25.

  The error amplifier 12 is connected to the positive (+) side input terminal so that the reference voltage generated by the reference voltage generator 24 is supplied. The output of the error amplifier 12 has a phase compensator 13, And the positive (+) input terminal of the PWM comparator 14 are connected to each other.

  A triangular waveform output from the oscillation circuit 15 is input to the negative (−) side input terminal of the PWM comparator 14. A transistor drive circuit 16 is connected to the output section of the PWM comparator 14.

  The transistor drive circuit 16 includes level shifts 26 and 27, inverters 28 to 30, transistors 31 to 33, a capacitor 34 serving as a first capacitor, and a reference voltage regulator 35 serving as a voltage generation unit. Transistors 31 and 33 are, for example, P-channel MOSFETs, and transistor 32 is, for example, an N-channel MOSFET.

  Input portions of level shifts 26 and 27 are connected to the output portion of the PWM comparator 14, respectively. The output of the level shift 26, which is the first level shift, is connected to the input of the inverter 28, which is the first inverter, and the output of the level shift 27, which is the second level shift, The input part of the inverter 29 which is 2 inverters is connected. The output part of the inverter 28 is connected to the gate of the transistor 31 which is the first transistor.

  One connection portion of the transistor 31 and the power supply terminal of the inverter 28 are connected so that the power supply voltage supplied from the input power supply 11 is input via the input terminal IN7. The output part of the inverter 29 is connected to the input part of the inverter 30 as the third inverter and the gate of the transistor 32 as the second transistor.

  One connection portion of the capacitor 34 is connected to the output portion of the inverter 30, and the gate of a transistor 33 that is a third transistor is connected to the other connection portion of the capacitor 34. The reference voltage regulator 35 includes a diode 35a and a reference voltage generator 35b.

  The anode of the diode 35a is connected to the gate of the transistor 33, and the cathode of the diode 35a is connected so that the reference voltage generated by the reference voltage generator 35b is supplied.

  The other connection portion of the transistor 31 is connected to one connection portion of the transistor 32 and the gate of the transistor 17 serving as the first switching transistor. One connection portion of the transistor 33 is connected to the other connection portion of the transistor 32, and the output terminal OUT 7 is connected to the other connection portion of the transistor 33.

  Further, the power supply terminals of the inverters 29 and 30 are connected so that the reference voltage generated by the reference voltage generator 25 is input. The input terminal IN7 is connected to one connection portion of the transistor 17, and the other connection portion of the transistor 17 is one connection portion of the inductor 18 which is an external component, and also an external component. The cathodes of the diodes 19 are connected to each other.

  The output terminal OUT7 is connected to the anode of the diode 19 and one connection portion of the capacitor 22 which is an external component. The other connection portion of the inductor 18 and the other connection portion of the capacitor 22 are connected to a reference potential. Are connected to each other.

  In addition, one connection portion of the resistor 20 is connected to the output terminal OUT7, and one connection portion of the resistor 21 is connected to the other connection portion of the resistor 20. The other connecting portion of the resistor 21 is connected so that the reference voltage generated by the reference voltage generating unit 23 is supplied.

  Further, the negative (−) side input terminal of the error amplifier 12 is connected to a connection portion between the resistor 20 and the resistor 21. The error amplifier 12 includes an output voltage monitor signal MONI obtained by dividing the voltage between the voltage output from the output terminal OUT7 and the reference voltage output from the reference voltage generator 23 by the resistors 20 and 21, and the reference voltage generator 24. Is compared with the generated reference voltage.

  The phase compensator 13 stabilizes the output signal output from the error amplifier 12. The PWM comparator 14 compares the signal output from the error amplifier 12 with the reference voltage of the triangular wave generated by the oscillation circuit 15 and outputs it as a signal converted to DUTY.

  The transistor drive circuit 16 drives and controls the transistor 17 based on the DUTY signal output from the PWM comparator 14. A negative voltage whose polarity is inverted by the transistor 17, the inductor 18, and the diode 19 is output from the output terminal OUT7.

  The voltage output from the output terminal OUT7 is constant by the resistors 20 and 21, the reference voltage generator 23, the error amplifier 12, the phase compensator 13, the PWM comparator 14, the oscillation circuit 15, the transistor drive circuit 16, and the transistor 17. Controlled.

  The voltage Vout output to the output terminal OUT7 is expressed by the following equation.

Vout = Vref1− (Vref2−Vref1) × R1 / R2 (Formula 1)
Here, R1 is a resistance value of the resistor 20, R2 is a resistance value of the resistor 21, Vref1 is a reference voltage value of the reference voltage reference voltage generating unit 24, and Vref2 is a reference voltage value of the reference voltage reference voltage generating unit 23. .

  For example, if R1 = 400KΩ, R2 = 100KΩ, Vref1 = 1.2V, and Vref2 = 3.1V, the voltage Vout output to the output terminal OUT7 is about negative −6.4V.

  Further, the reference voltage generators 23 and 24, the resistors 20 and 21, the error amplifier 12, the phase compensator 13, the PWM comparator 14, the oscillation circuit 15, the transistor drive circuit 16, and the transistor 17 are, for example, monolithic ICs. Generally, it is provided as a control IC for a switching regulator.

  Next, the operation of the transistor drive circuit 16 according to the first embodiment will be described with reference to timing charts of FIGS.

  Here, in FIG. 3, from the top to the bottom, the output signal of the PWM comparator 14, the gate voltage of the transistor 17, the gate voltage of the transistor 31, the gate voltage of the transistor 32, the output signal of the inverter 30, the gate voltage of the transistor 33, 2 shows the node a (the connection part between the transistor 32 and the transistor 33), the output signal of the transistor 17, the current flowing through the inductor 18, and each signal waveform at the output terminal OUT7.

  First, when the output of the inverter 28 is low level and the output of the inverter 29 is low level, the transistor 31 is turned on and the transistor 32 is turned off, and the gate of the transistor 17 is driven to the high side voltage of the voltage of the input terminal IN7. Is turned off.

  At this time, since the output of the inverter 30 is at a high level, the capacitor 34, which is a boot capacitor, is charged with a differential voltage between the reference voltage generated by the reference voltage generator 25 and the generated voltage of the reference voltage regulator 35.

  When the output of the inverter 28 and the output of the inverter 29 are at a high level, the transistor 31 is turned off and the transistor 32 is turned on. Since the output of the inverter 30 is at a low level, the charge stored in the capacitor 34 cannot be discharged by the rectifying diode 35a. Therefore, the gate of the transistor 33 becomes a negative potential, and the transistor 33 is also turned on. The transistor 17 is turned on to drive the gate of 17 to the low side.

  The other connection portion (drain) of the transistor 33 is connected to the output terminal OUT7 and a sufficient negative voltage is applied thereto. By this operation, the low level of the gate of the transistor 17 becomes the gate potential of the transistor 33 + the threshold voltage VTH of the transistor 33.

  For example, if the reference voltage generated by the reference voltage generation unit 25 is about 3.1 V, the high level that is the output of the inverter 30 is about 3.1 V, which is substantially the same as the potential of the reference voltage generated by the reference voltage generation unit 25. Become.

  Assuming that the reference voltage in the reference voltage regulator 35 is 0 V, the voltage charged in the capacitor 34 is a difference voltage between the reference voltage potential of the reference voltage generator 25 and the forward voltage VF of the diode 35a.

  Assuming that the forward voltage VF is about 0.7V, the voltage charged between the capacitors 34 is about 2.4V. Therefore, assuming that the output of the inverter 30 becomes almost 0V when the output is low, the charge charged between the capacitors 34 is not discharged by the diode 35a, so that the gate potential of the transistor 33 is a negative potential of about −2.4V. It becomes.

  Thus, the gate voltage of the transistor 17 is about −1.6 V, which is obtained by adding about 2.4 V of the gate potential of the transistor 33 to the threshold voltage VTH of the transistor 33 of about 0.8 V.

  If the voltage of the input power supply unit 11 is about 2.0 V, for example, the gate-source voltage of the transistor 17 is about 2.0 V − (− 1.6 V) = 3.6 V (the potential difference in FIG. 3). C) A voltage higher than the voltage of the input power supply unit 11 can be applied to the gate of the transistor 17.

  Further, the voltage generated by the reference voltage regulator 35 can adjust the charging voltage to the capacitor 34 by monitoring the voltage of the input power supply unit 11. For example, when the voltage of the input power supply unit 11 is about 5.0V, the voltage charged between the capacitors 34 is about 0V, and the threshold voltage VTH of the transistor 33 is about 0.8V. The voltage is about 4.2 V, and an excessive voltage application to the gate of the transistor 17 can be prevented.

  Furthermore, since the charge charged in the capacitor 34 is connected only to the gate of the transistor 33, there is no path for discharging in normal operation. For this reason, a relatively small capacitance value can be used for the capacitor 34, whereby the capacitor 34 can be made small, the gate of the transistor 33 can be driven at high speed, and the capacitor 34 can be charged. The current consumption can be made extremely small because of less discharge.

  Further, since a voltage higher than the voltage of the input power supply unit 11 can be applied to the gate of the transistor 17, the on-resistance of the transistor 17 does not deteriorate even when the voltage of the input power supply unit 11 is relatively low. Thus, the maximum current of the transistor 17 can be ensured.

  The loss in the inverting DC-DC converter 8 is that the on-resistance of the transistor 17 can be reduced to about 0.5Ω even when the voltage of the input power supply unit 11 is relatively low, about 2.4 V, so that the output current Io is about 50 mA. Assuming that the efficiency when the output voltage Vo is about 7.5V is 80%, the loss of the inverting DC-DC converter 8 is the loss pd = Io × Vo (1 / Effi−1) = 50 mA × 7.5V. (1 / 0.80-1) = 93.8 mW, loss can be greatly reduced, and power conversion efficiency (Effi) can be improved.

(Embodiment 2)
FIG. 4 is a circuit diagram showing a configuration example of an inverting DC-DC converter according to Embodiment 2 of the present invention, and FIG. 5 is a timing chart of signals at respective parts in the inverting DC-DC converter of FIG.

  In the second embodiment, the power supply system 1 includes a step-up DC-DC converter 2 to 4, a step-up / step-down DC-DC converter 5, a step-down DC-DC converter 6, as in FIG. 1 of the first embodiment. 7, an inverting DC-DC converter 8, and LDOs 9 and 10.

  Further, the inverting DC-DC converter 8 in the power supply system 1 includes an error amplifier 12, a phase compensator 13, a PWM comparator 14, an oscillation circuit 15, a transistor drive circuit 16, P, as in FIG. 2 of the first embodiment. It comprises a transistor 17 composed of a channel MOSFET, an inductor 18, a diode 19, resistors 20, 21, a capacitor 22, and reference voltage generators 23-25.

  Further, as shown in FIG. 4, the transistor drive circuit 16 has a P channel in the configuration of FIG. 2 comprising level shifts 26 and 27, inverters 28 to 30, transistors 31 to 33, a capacitor 34, and a reference voltage regulator 35. Transistors 36 and 37 made of MOSFETs and a resistor 38 are newly added. The configuration of the reference voltage regulator 35 is also different from that shown in FIG. 2, and a resistor 35c is provided instead of the reference voltage generator 35b.

  The gate of the transistor 36 is connected so that the reference voltage of the reference voltage generator 25 is supplied, and the other connection of the resistor 38 is connected to one connection of the transistor 36.

  One connection portion of the transistor 37 is connected to one connection portion of the resistor 38, and the input terminal IN 7 is connected to the other connection portion of the transistor 37. The output part of the inverter 28 is connected to the gate of the transistor 37.

  In the reference voltage regulator 35, one connection portion of the resistor 35c is connected to the cathode of the diode 35a, and a reference potential is connected to the other connection portion of the resistor 35c. Since other connection configurations are the same as those in FIG. 2 of the first embodiment, description thereof is omitted.

  Next, the operation of the transistor drive circuit 16 according to the second embodiment will be described with reference to the timing charts of FIGS.

  In FIG. 5, from the top to the bottom, the output signal of the input terminal IN7, the PWM comparator 14, the gate voltage of the transistor 17, the gate voltage of the transistor 31, the gate voltage of the transistor 32, the output signal of the inverter 30, and the transistor 33 2, the node a in FIG. 2 (the connection portion between the transistor 32 and the transistor 33), the output signal of the transistor 17, the current flowing through the inductor 18, and each signal waveform at the output terminal OUT7.

  When the transistor 37 associated with the transistor 17 is ON, the potential of the input power supply unit 11 is applied to one side of the resistor 38. The gate of the transistor 36 is connected to the reference voltage of the reference voltage generator 25 and determines the source potential of the transistor 36.

  Since the resistor 38 is connected to one connection portion (source) of the transistor 36, a differential voltage is applied to the resistor 38 and a current flows. Since this current flows to the resistor 35 c and the diode 35 a through the transistor 36, a voltage substantially proportional to the voltage of the input power supply unit 11 is generated at the gate of the transistor 33.

  Here, if the reference voltage of the reference voltage generator 25 is, for example, about 3.1 V, the reference voltage regulator is calculated from 3.1 V of the reference voltage + the voltage of the input power supply unit 11 equal to or higher than the threshold voltage VTH of the transistor 36. The voltage 35 can be adjusted.

  Therefore, when the voltage of the input power supply unit 11 is low, the voltage between the gate and source of the transistor 17 when the transistor 17 is ON can be made higher than the voltage of the input power supply unit 11 (FIG. 5, potential difference E). When the voltage of the power supply unit 11 is high, the reference voltage regulator 35 may set the gate-source voltage in the transistor 17 when the transistor 17 is ON lower than the voltage of the input power supply unit 11 (FIG. 5, potential difference F). it can.

(Embodiment 3)
FIG. 6 is a circuit diagram showing a configuration example of an inverting DC-DC converter according to Embodiment 3 of the present invention.

  Also in the third embodiment, the power supply system 1 includes the step-up DC-DC converters 2 to 4, the step-up / step-down DC-DC converter 5, and the step-down DC-DC converter 6, as in FIG. 1 of the first embodiment. , 7, an inverting DC-DC converter 8, and LDOs 9 and 10.

  Further, the inverting DC-DC converter 8 in the power supply system 1 includes an error amplifier 12, a phase compensator 13, a PWM comparator 14, an oscillation circuit 15, a transistor drive circuit 16, P, as in FIG. 2 of the first embodiment. It comprises a transistor 17 composed of a channel MOSFET, an inductor 18, a diode 19, resistors 20, 21, a capacitor 22, and reference voltage generators 23-25.

  As shown in FIG. 6, the transistor drive circuit 16 is obtained by removing the transistor 33 from the configuration of FIG. 2 of the first embodiment. The anode of the diode 35a is connected to the other connection portion of the transistor 32 and is not affected by the potential of the output terminal OUT7.

  The low level of the gate of the transistor 17 becomes the source potential of the transistor 32. The source potential of the transistor 32 is determined by the potential at which the charge stored in the capacitor 34 is discharged.

  When the output of the inverter 30 is at a high level, the capacitor 34 is charged with a differential voltage between the reference voltage of the reference voltage generator 25 and the voltage generated by the voltage regulator 35. When the outputs of the inverter 28 and the inverter 29 are each at a high level, the transistor 31 is turned off, the transistor 32 is turned on, and the output of the inverter 30 is brought to a low level, so that the charge stored in the capacitor 34 is caused by the diode 35a. Since it cannot be discharged, the source of the transistor 32 has a negative potential, and the gate of the transistor 17 is driven to the low level of the negative potential. Therefore, the transistor 17 is turned on, and a voltage higher than the voltage of the input power supply unit 11 can be applied as the gate voltage of the transistor 17.

  In the example shown in FIG. 6, the capacitor 34 is connected to the gate of the transistor 17 via the transistor 32, and therefore the negative potential of the gate of the transistor 17 represents the charge stored in the capacitor 34, It is determined by the amount of charge transferred to the gate capacitance of the transistor 17, the voltage generated in the voltage regulator 35, and the reference voltage of the reference voltage generator 25.

(Embodiment 4)
FIG. 7 is a circuit diagram showing a configuration example of a step-down DC-DC converter according to Embodiment 4 of the present invention.

  The transistor drive circuit 16 for driving the transistor 17 shown in FIG. 6 of the third embodiment is also applied to, for example, the step-down DC-DC converter 6 (, 7) and the step-up / step-down DC-DC converter 5 shown in FIG. Can be applied. FIG. 7 shows an output stage in the step-down DC-DC converter 6 (, 7).

  As shown in FIG. 7, the transistor drive circuit that drives the transistor 17 based on the signal of the transistor 17 serving as the high-side switching transistor of the P-channel MOSFET and the PWM comparator 14 (FIG. 1) provided in the previous stage. 16, a transistor 39 composed of an N-channel MOSFET and serving as a low-side switching transistor, a level shift 40 for level-converting the signal of the PWM comparator 14 (FIG. 1), and a buffer for driving the transistor 39 based on the signal output from the level shift 40 41.

  In addition, an inductor 18 and a capacitor 22 serving as a stabilization capacitor are provided as external components, and the transistor 17 and the transistor 39 are an output stage of a general step-down switching regulator that is repeatedly turned on and off.

  In this case, as described above, the transistor drive circuit 16 has the same configuration as that of FIG. 6 of the third embodiment, so that a voltage higher than the voltage of the input power supply unit 11 is applied as the gate voltage of the transistor 17. can do.

  The loss in this configuration is, for example, that the voltage Vo of the output terminal OUT5 of the step-down DC-DC converter 6 is about 1.8V, the voltage of the input power supply unit 11 is about 2.4V, and the current consumed by the output terminal OUT5 is Assuming that the efficiency (Effi) of the step-down DC-DC converter 6 is 90%, the loss Pd in the step-down DC-DC converter 6 (step-down DC-DC converter 6) = Io × Vo (1 / Effi− 1) = 100 mA × 1.8 V (1 / 0.9-1) = about 20 mW.

  When the voltage of the input power supply unit 11 is relatively high, the efficiency (Effi) of the step-down DC-DC converter 6 is 85% when the voltage of the input power supply unit 11 is about 4.5 V and the output current Io is about 100 mA. The loss of the step-down DC-DC converter 6 is Pd = Io × Vo (1 / Effi−1) = 100 mA × 1.8 V (1 / 0.85-1) = 31.8 mW.

  In this way, regardless of the input terminal voltage, the transistor 17 can be sufficiently turned on by widening the dynamic range of the gate drive voltage of the transistor 17 than the input voltage of the input terminal IN5, and the input terminal IN5 (, IN6). Can be directly connected to the input power supply unit 11.

  Further, even when a different type of battery such as 2AA or lithium ion is used as the input power supply unit 11, it is possible to prevent deterioration in power conversion efficiency and prevent a decrease in the maximum output current. Can do.

(Embodiment 5)
FIG. 8 is a circuit diagram showing an example of a power switch connected to the input power supply of the step-up DC-DC converter according to the fifth embodiment of the present invention, and FIG. 9 is a step-up DC-DC according to the fifth embodiment of the present invention. It is a circuit diagram which shows the other example of the power switch connected to the input power supply of a converter.

  The transistor drive circuit 16 shown in the first to third embodiments can be applied to, for example, a power switch connected to the input power supply of the step-up DC-DC converter 3 shown in FIG.

  FIG. 8 is a circuit showing an example in which the transistor drive circuit 16 of FIG. 6 is applied to the output stage of the power switch connected to the input power supply of the step-up DC-DC converter 3, and FIG. 5 is a circuit showing an example in which the transistor drive circuit 16 of FIG. 4 is applied to an output stage of a power switch connected to an input power supply of the DC converter 3.

  The transistor 42 serving as a power switch driven by the transistor drive circuit 16 is formed of a P-channel MOSFET, and the inductor 43 is interposed between the input terminal IN2 and the input terminal IN8 connected between the input power supply unit 11 via the transistor 42. Connected.

  The transistor 42 inputs power to the step-up DC-DC converter 3 when the transistor 42 is ON, and is turned ON / OFF by a power switch ON / OFF signal 81.

  When the transistor 42 is OFF, power supply input to the input terminal IN2 of the step-up DC-DC converter 3 is prohibited, and charging to a capacitor serving as a stabilization capacitor connected to the output terminal OUT2 is prevented.

  Also in this case, similarly, when the voltage of the input power supply unit 11 is low, the gate drive voltage of the transistor 42 can be higher than the voltage of the input power supply unit 11, and even when the input power supply unit 11 is relatively low, the transistor Since the ON resistance of the transistor 42 can be lowered, the loss in the transistor 42 can be reduced.

(Embodiment 6)
FIG. 10 is a circuit diagram showing a configuration example of a step-up / step-down DC-DC converter according to Embodiment 6 of the present invention, and FIG. FIGS. 12A and 12B are explanatory diagrams showing the waveform of the coil drive end and the coil current in the step-up / step-down DC-DC converter in the step-up / step-down mode.

  In the sixth embodiment, a step-up / step-down DC-DC converter 5 provided in the power supply system 1 of FIG. 1 will be described.

  The step-up / step-down DC-DC converter 5 is a three-mode switching type, and the three modes indicate three modes of step-down, step-up and step-up / step-down modes. In general, a buck-boost DC-DC converter with a wide input range has three modes in order to optimize efficiency.

  As shown in FIG. 10, the step-up / step-down DC-DC converter 5 includes an amplifier 44, an input power supply control unit 45, comparators 46 and 47, a mode selection unit 48, a voltage control error amplifier 49, capacitors 50 and 51, a resistor 52, a current. The control amplifier 53 includes a resistor 54, comparators 55 and 56, a triangular wave generator 57, a control logic unit 58, a driver unit 59, an average current detection unit 60, and a feedback circuit 61. The voltage control error amplifier 49, the capacitors 50 and 51, and the resistor 52 constitute a drive current instruction unit.

  An input voltage terminal Vin to which an input voltage Vi supplied from the input power supply unit 11 is connected to the positive (+) side input terminal of the amplifier 44, and the negative (−) side input terminal of the amplifier 44 is connected. Are connected so that the output voltage Vo output from the step-up / step-down DC-DC converter 5 is input.

  The output section of the amplifier 44 includes a positive (+) side input terminal of the comparator 46, a positive (+) side input terminal of the comparator 47, and any one input terminal among the three input terminals of the input power supply control section 45. Are connected to each other. A threshold voltage Vthh is connected to the negative (−) side input terminal of the comparator 46 and the other input terminal of the input power supply control unit 45, respectively.

  Further, the remaining one input terminal of the input power supply control unit 45 and the negative (−) side input terminal of the comparator 47 are connected so that the lower limit threshold value Vthl is input thereto. The output units of the comparators 46 and 47 are connected to the input unit of the mode selection unit 48, respectively.

  A positive (+) side input terminal of a comparator 56 serving as a second comparison unit is connected to the output unit of the input power supply control unit 45. The negative (−) side input terminal of the comparator 56 and the negative (−) side input terminal of the comparator 55 serving as the first comparison unit are connected so that a triangular wave generated by the triangular wave generator 57 is input. .

  One connection portion of the resistor 54 and the output portion of the current control amplifier 53 are connected to the positive (+) side input terminal of the comparator 55. The other connection portion of the resistor 54 is connected so as to be supplied with the reference voltage Vref1.

  The positive (+) side input terminal of the current control amplifier 53 is connected to the output portion of the voltage control error amplifier 49, one connection portion of the capacitor 50, and one connection portion of the resistor 52.

  One connection portion of the capacitor 51 is connected to the other connection portion of the resistor 52. A ground potential AGND is connected to the other connection portion of the capacitor 50 and the other connection portion of the capacitor 51.

  The negative (−) side input terminal of the voltage control error amplifier 49 is connected so that the detection voltage VFB output from the feedback circuit 61 is input.

  A current detection result Vsens output from the average current detector 60 is connected to the negative (−) side input terminal of the current control amplifier 53. The output unit of the mode selection unit 48 is connected to the input unit of the control logic unit 58, and the mode signal MODE output from the mode selection unit 48 is input.

  Further, the control logic unit 58 is connected to the current control PWM signal Dctl output from the comparator 55 and the input voltage adjustment PWM signal Din output from the comparator 56.

  The input unit of the driver unit 59 is connected to the two output units of the logic control unit 58, respectively. The driver unit 59 includes drivers 65 to 68 and transistors 69 to 72.

  Drivers 66 and 67 are inverters, and transistors 69 to 72 are N-channel MOSFETs, for example. The input parts of the drivers 65 and 66 are connected to one output part of the control logic part 58, and the input parts of the drivers 67 and 68 are connected to the other output part of the control logic part 58, respectively. ing.

  The gates of the transistors 69 to 72 are connected to the output portions of the drivers 65 to 68, respectively. An input voltage terminal Vin is connected to one connection portion of the transistor 69.

  One connecting portion of the transistor 70 and the terminal LX1 are connected to the other connecting portion of the transistor 69, respectively. The other connection portion of the transistor 72 and the reference potential terminal PGND are connected to the other connection portion of the transistor 70, respectively.

  The output terminal OUT4c is connected to one connection portion of the transistor 71. The output terminal OUT4c serves as an output unit of the step-up / step-down DC-DC converter 5.

  The other connection portion of the transistor 71 is connected to the terminal LX2 and one connection portion of the transistor 72, respectively. A coil 73 is externally connected between the terminals LX1 and LX2, and a smoothing capacitor 74 is externally connected between the output terminal OUT4c and the reference potential terminal PGND.

  The average current detection unit 60 includes a switch unit 75, a resistor 76, a capacitor 77, and a current sense amplifier 78. A terminal LX1 is connected to one connection part of the switch part 75 serving as a sample / hold circuit, and one connection part of the resistor 76 is connected to the other connection part of the switch part 75.

  The control terminal of the switch unit 75 is connected so that the control signal output from the control logic unit 58 is input. The switch unit 75 performs an ON / OFF operation based on the control signal.

  One connection portion of a capacitor 77 serving as a low-pass filter and one input portion of a current sense amplifier 78 are connected to the other connection portion of the resistor 76. The other connection part of the capacitor 77 and the other input part of the current sense amplifier 78 are connected to the input terminal IN4, respectively. A signal output from the current sense amplifier 78 becomes the current detection result Vsens.

  The feedback circuit 61 is composed of resistors 79 and 80. The output terminal OUT4c is connected to one connection portion of the resistor 79, and the reference potential terminal PGND is connected to one connection portion of the resistor 80. The other connection part of the resistor 80 is connected to the other connection part of the resistor 79, and a signal output from this connection part becomes the detection voltage VFB.

  This step-up / step-down DC-DC converter 5 extracts the difference between the input voltage Vin input from the input terminal IN4 and the output voltage Vo output from the output terminal OUT4c by the amplifier 44, and the input voltage Vin is more reliably than the output voltage Vo. The step-down mode is selected when it is high, the step-up mode is selected when it is definitely low, and the step-up / step-down mode is selected by the comparators 46 and 47 and the mode selection circuit 48 when the input voltage Vin and the output voltage Vo are close to each other. The

  The configuration of the output stage is such that both ends of the coil 73 have a power source and transistors 69 to 72 that operate complementary to the reference potential, and one end of the coil 73 is connected to the input terminal IN4 via the transistors 69 and 70. The other end of the coil 73 is a converter capable of a step-up / step-down operation connected to the output terminal OUT4c via the transistors 71 and 72.

  In the step-down operation mode, the transistor 72 is always OFF and the transistor 71 is always ON, and the transistors 69 and 70 adjust the current flowing through the coil 73 by the current control to vary the output voltage.

  In the boost mode, the transistor 69 is always ON and the transistor 70 is always OFF, and the transistors 71 and 72 adjust the current flowing through the coil 73 by the current control to vary the output voltage.

  In the step-up / step-down mode, the above-described step-down mode and step-up mode are combined, and both the transistors 69 and 70 and the transistors 71 and 72 operate. In the feedback circuit 61, the difference potential between the detection voltage VFB obtained by resistance-dividing the output voltage Vo and the reference voltage Vref0 is amplified by an error amplifier, and error integration is performed by the capacitors 50 and 51 and the resistor 52 serving as phase compensators.

  Then, the current control amplifier 53 outputs an error between the error integration result and the current detection result Vsens by the average current detection circuit 60 and outputs the error as the drive current instruction signal Voutctl.

  The drive current instruction signal Voutctl is compared with the triangular wave generated by the triangular wave generator 57 by the comparator 55 to determine the current control signal Dctl. In the step-up / step-down mode, the comparator 56 generates a PWM signal Din based on the result of (input voltage Vin−output voltage Vo) detected by the amplifier 44.

  If the current control signal Din is too large, the output voltage Vo will rise, and if it is too small, the current flowing through the coil 74 will increase, causing a reduction in efficiency. Ideally, Vo− (Vin × Din) = α should be maintained. Here, for example, as shown in FIG. 11, a state close to ideal is realized by gradually reducing Din with respect to (Vin−Vo).

  Further, in the step-up / step-down mode, by synchronizing the switching between the terminal LX1 and the terminal LX2 with triangular wave oscillation, the PWM centers of gravity of both are made coincident as shown in FIG. 12, and the pulsation of the coil current of the coil 74 is reduced. is doing. Thereby, the loss due to the ACR of the coil 74 is reduced and the conversion efficiency is improved (see FIG. 12).

  In the step-down mode, the transistors 69 and 70 are switched according to the PWM signal Dctl, respectively, the transistor 71 is turned on and the transistor 72 is turned off. In the step-up mode, the transistors 71 and 72 are switched according to the PWM signal Dctl. Then, the transistor 69 is turned on and the transistor 70 is turned off.

  Further, in the step-up / step-down mode, the transistors 71 and 72 are switched according to the PWM signal Dctl, and the transistors 69 and 70 are switched according to the PWM signal Din.

  The step-up / step-down DC-DC converter 5 has an output voltage set slightly higher than analog and digital voltages (eg, about 3.3 V) required by the LDOs 9 and 10, respectively. Considering the drop voltage characteristics (about 0.2V) generated at the input / output of the LDO 9, 10 and the output ripple voltage (about 0.005V) of the step-up / step-down DC-DC converter 5 from the output voltage of the LDO 9, 10 By setting the output voltage as high as about 0.3 V, the output voltage of the step-up / step-down DC-DC converter 5 can be supplied as input power for the subsequent LDOs 9 and 10 by setting the output voltage at about 3.6 V.

  The loss in this configuration is, for example, when the output voltage Vo of the step-up / step-down DC-DC converter 5 is about 3.6 V, and the current consumed by the analog system and the digital system 3.3 V flows about 50 mA. The loss in the LDOs 9 and 10 is loss Pd = (3.6 V−3.3 V) × 50 mA × 2 = 30 mW.

  If the efficiency of the step-up / step-down DC-DC converter 5 is 90% when the voltage of the input power supply unit 11 is about 2.4 V and the output current Io is about 100 mA, the loss in the step-up / step-down DC-DC converter 5 is a loss. Pd = Io × Vo (1 / Effi−1) = 50 mA × 2 × 3.6 V (1 / 0.9−1) = 40 mW, and the total loss is about 70 mW.

  When the voltage of the input power supply unit 11 is relatively high, the efficiency of the step-up / step-down DC-DC converter 5 is about Effi = 90% when the voltage of the input power supply unit 11 is about 4.5 V and the output current Io is about 1000 mA. Then, the loss in the step-up / step-down DC-DC converter 5 is as follows: loss Pd = (((step-up / step-down DC-DC converter 5) = Io × Vo (1 / Effi−1) = 50 mA × 2 × 3.6 V (1/0) .9-1) = 40 mW, and the total loss with the loss Pd (LDO) is 70 mW, and the loss can be made constant regardless of the voltage of the input power supply unit 11.

  In this way, even when the voltage of the input power supply unit 11 is high, the loss can be kept constant, so that the power conversion efficiency can be improved.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  INDUSTRIAL APPLICABILITY The present invention is suitable for a technique for improving the efficiency of power generation when a battery is low in a DC-DC converter.

It is a block diagram which shows the structural example of the power supply system by Embodiment 1 of this invention. FIG. 2 is a circuit diagram illustrating a configuration example of an inverting DC-DC converter provided in the power supply system of FIG. 1. It is a timing chart of each part signal in the inverting type DC-DC converter of FIG. It is a circuit diagram which shows the structural example of the inverting type DC-DC converter by Embodiment 2 of this invention. 5 is a timing chart of signals at various parts in the inverting DC-DC converter of FIG. 4. It is a circuit diagram which shows the structural example of the inverting type DC-DC converter by Embodiment 3 of this invention. It is a circuit diagram which shows the structural example of the pressure | voltage fall type DC-DC converter by Embodiment 4 of this invention. It is a circuit diagram which shows an example of the power switch connected to the input power supply part of the pressure | voltage rise type DC-DC converter by Embodiment 5 of this invention. It is a circuit diagram which shows the other example of the power switch connected to the input power supply part of the pressure | voltage rise type DC-DC converter by Embodiment 5 of this invention. It is a circuit diagram which shows the structural example of the buck-boost type DC-DC converter by Embodiment 6 of this invention. It is explanatory drawing which shows an example of the input side DUTY control of the step-up / step-down DC-DC converter in the step-up / step-down mode. It is explanatory drawing which shows the waveform of a coil drive end and coil current in the step-up / step-down type DC-DC converter in the step-up / step-down mode.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Power supply system 2-4 Boost type DC-DC converter 5 Buck-boost type DC-DC converter 6,7 Step-down DC-DC converter 8 Inversion type DC-DC converter 9,10 LDO
DESCRIPTION OF SYMBOLS 11 Input power supply part 12 Error amplifier 13 Phase compensator 14 PWM comparator 15 Oscillator circuit 16 Transistor drive circuit 17 Transistor 18 Inductor 19 Diode 20, 21 Resistor 22 Capacitor 23-25 Reference voltage generation part 26, 27 Level shift 28-30 Inverter 31 33 Transistor 34 Capacitor 35 Reference voltage regulator 35a Diode 35b Reference voltage generator 35c Resistor 36, 37 Transistor 38 Resistor 39 Transistor 40 Level shift 41 Buffer 42 Transistor 43 Inductor 44 Amplifier 45 Input power supply controller 46, 47 Comparator 48 Mode selection Unit 49 Voltage control error amplifier 50, 51 Capacitor 52 Resistor 53 Current control amplifier 54 Resistor 55, 56 Comparator 57 Triangular wave generator 58 Control logic 59 driver 60 average current detecting unit 61 feedback circuit 65-68 driver 69-72 transistor 73 coil 74 capacitor 75 switch 76 resistor 77 capacitor 79 resistor

Claims (10)

A step-up / step-down DC-DC converter that boosts / steps down a DC power supply voltage and converts it to an arbitrary DC voltage;
At least one linear regulator that stabilizes the DC voltage;
An inverting DC-DC converter that inverts a DC power supply voltage and converts it to an arbitrary DC negative voltage;
A step-down DC-DC converter that steps down a DC power supply voltage and converts it to an arbitrary DC voltage;
The linear regulator is
An output voltage is generated by a power supply voltage converted by the step-up / step-down DC-DC converter. A step-up / step-down DC-DC converter that boosts / steps down a DC power supply voltage and converts it to an arbitrary DC voltage;
Comprising at least one linear regulator for stabilizing the DC voltage;
The linear regulator is
An output voltage is generated by a power supply voltage converted by the step-up / step-down DC-DC converter. The power supply system according to claim 1 or 2,
The step-up / step-down DC-DC converter includes:
A voltage control unit having two sets of PWM signals for performing a step-up / step-down operation, first and second driver units for performing switching based on the PWM signals, and for controlling an output voltage; A current control unit that outputs a PWM signal as a drive signal to the driver unit based on a current control instruction signal output from the voltage control unit;
The two sets of PWM signals are subjected to error integration of the potential difference between the output voltage and the reference voltage by the voltage control unit, and a current control instruction as a result of the error integration is output. The current control unit A power supply that outputs a first PWM signal generated based on an error from an average value of an inductor current and a second PWM signal generated based on a difference voltage between an input voltage and an output voltage system. The power supply system according to claim 3, wherein
The voltage controller is
A feedback circuit for detecting an output voltage output from the step-up / step-down DC-DC converter;
An average current detector for detecting an average value of the inductor current;
A drive current instruction unit that integrates an error between the reference voltage and the potential difference between the output voltages detected by the feedback circuit and outputs a drive current instruction signal;
A proportional control type current control amplifier that outputs an error signal between the average value output from the average current detection unit and the drive current instruction signal output from the drive current instruction unit;
A difference between the input voltage and the output voltage, and a first comparison unit that compares the error signal output from the current control amplifier with a triangular wave and outputs the comparison result to the first driver unit as a first PWM signal. A second comparison unit that compares a signal inversely proportional to the triangular wave and outputs the comparison result to the second driver unit as a second PWM signal;
In the output of the first driver unit based on the first PWM signal and the output of the second driver unit based on the second PWM signal, the center time of the high voltage period and the center of the low voltage period of both outputs A power supply system that is controlled so that the times always coincide. The power supply system according to claim 1, wherein
The inverting DC-DC converter is
A first switching transistor connected between the output terminal and the input terminal;
A transistor drive circuit that drives the first switching transistor based on a negative feedback control signal that stabilizes the output voltage output from the output terminal;
The transistor driving circuit includes:
A power supply system, wherein a gate voltage for driving the first switching transistor is generated from an output voltage output from the output terminal. The power supply system according to claim 5, wherein
The transistor driving circuit includes:
A first level shift for level shifting the input negative feedback control signal;
A first transistor having one connection connected to the input terminal and driving a gate voltage of the first switching transistor to a Hi voltage;
A first inverter that has an input connected to the output of the first level shift, an output connected to the gate of the first transistor, and drives the first transistor;
A second level shift for level shifting the negative feedback control signal;
A second transistor having one connection connected to the other connection of the first transistor and driving a gate voltage of the first switching transistor to a Lo voltage;
A second inverter that has an input connected to the output of the second level shift, an output connected to the gate of the third transistor, and drives the second transistor;
One connection portion is cascode-connected to the second transistor, and the other connection portion is a third transistor connected to the output terminal;
A third inverter that outputs a drive signal for driving the third transistor based on a signal output from the second inverter;
One connection is connected to the output of the third inverter, and the other connection is connected to the first capacitor connected to the gate of the third transistor;
A voltage regulator for generating an arbitrary voltage connected to the other connection portion of the first capacitor in the output unit;
The first capacitor is
Charging a voltage difference between the voltage regulated by the voltage regulator and a reference voltage;
The third inverter is
A power supply system, wherein a voltage charged in the first capacitor is applied to a gate of the third transistor. The power supply system according to claim 6, wherein
The voltage regulator is
A diode having an anode connected to the other connection of the first capacitor;
A power supply system comprising: a cathode of the diode connected to the output unit; and a voltage generator for generating a reference voltage. The power supply system according to claim 6, wherein
The voltage regulator is
A diode having an anode connected to the other connection of the first capacitor;
A power supply system, wherein one connection portion is connected to the cathode of the diode, and the other connection portion is a resistor connected to a reference potential. The power supply system according to claim 1, wherein
The step-down DC-DC converter is
A second switching transistor on the high-side switch side connected between the output terminal and the input terminal;
A third switching transistor on the low-side switch side connected between the output terminal and a reference potential;
A transistor drive circuit that drives the second switching transistor based on a negative feedback control signal that stabilizes the output voltage output from the output terminal;
The transistor driving circuit includes:
A power supply system that generates a gate voltage for driving the second switching transistor from an output voltage output from the output terminal. The power supply system according to claim 9, wherein
The transistor driving circuit includes:
A first level shift for level shifting the input negative feedback control signal;
A first transistor having one connection connected to the input terminal and driving a gate voltage of the first switching transistor to a Hi voltage;
A first inverter that has an input connected to the output of the first level shift, an output connected to the gate of the first transistor, and drives the first transistor;
A second level shift for level shifting the negative feedback control signal;
A second transistor having one connection connected to the other connection of the first transistor and driving a gate voltage of the first switching transistor to a Lo voltage;
A second inverter that has an input connected to the output of the second level shift, an output connected to the gate of the third transistor, and drives the second transistor;
A third inverter that outputs a drive signal based on a signal output from the second inverter;
One connection is connected to the output of the third inverter, and the other connection is connected to the other connection of the second transistor;
A voltage regulator for generating an arbitrary voltage connected to the other connection portion of the second capacitor at the output portion;
The power supply system according to claim 1, wherein the second capacitor charges a difference voltage between a voltage adjusted by the voltage regulator and a reference voltage based on a drive signal output from the third inverter.

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