JP2023066285A5 - - Google Patents

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Publication number
JP2023066285A5
JP2023066285A5 JP2021176922A JP2021176922A JP2023066285A5 JP 2023066285 A5 JP2023066285 A5 JP 2023066285A5 JP 2021176922 A JP2021176922 A JP 2021176922A JP 2021176922 A JP2021176922 A JP 2021176922A JP 2023066285 A5 JP2023066285 A5 JP 2023066285A5
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JP
Japan
Prior art keywords
sacrificial layer
etching time
layer etching
yield
comparative example
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JP2021176922A
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English (en)
Japanese (ja)
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JP7556342B2 (ja
JP2023066285A (ja
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Priority claimed from JP2021176922A external-priority patent/JP7556342B2/ja
Priority to JP2021176922A priority Critical patent/JP7556342B2/ja
Priority to CN202280072026.XA priority patent/CN118160065A/zh
Priority to PCT/JP2022/038473 priority patent/WO2023074423A1/ja
Priority to EP22886751.1A priority patent/EP4425531A4/en
Priority to TW111139587A priority patent/TW202326807A/zh
Publication of JP2023066285A publication Critical patent/JP2023066285A/ja
Publication of JP2023066285A5 publication Critical patent/JP2023066285A5/ja
Publication of JP7556342B2 publication Critical patent/JP7556342B2/ja
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JP2021176922A 2021-10-28 2021-10-28 接合型半導体ウェーハの製造方法 Active JP7556342B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2021176922A JP7556342B2 (ja) 2021-10-28 2021-10-28 接合型半導体ウェーハの製造方法
CN202280072026.XA CN118160065A (zh) 2021-10-28 2022-10-14 接合型半导体晶圆的制造方法
PCT/JP2022/038473 WO2023074423A1 (ja) 2021-10-28 2022-10-14 接合型半導体ウェーハの製造方法
EP22886751.1A EP4425531A4 (en) 2021-10-28 2022-10-14 METHOD FOR MANUFACTURING BONDERED SEMICONDUCTIVE WRAPS
TW111139587A TW202326807A (zh) 2021-10-28 2022-10-19 接合型半導體晶圓的製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2021176922A JP7556342B2 (ja) 2021-10-28 2021-10-28 接合型半導体ウェーハの製造方法

Publications (3)

Publication Number Publication Date
JP2023066285A JP2023066285A (ja) 2023-05-15
JP2023066285A5 true JP2023066285A5 (https=) 2024-05-02
JP7556342B2 JP7556342B2 (ja) 2024-09-26

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ID=86157699

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021176922A Active JP7556342B2 (ja) 2021-10-28 2021-10-28 接合型半導体ウェーハの製造方法

Country Status (5)

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EP (1) EP4425531A4 (https=)
JP (1) JP7556342B2 (https=)
CN (1) CN118160065A (https=)
TW (1) TW202326807A (https=)
WO (1) WO2023074423A1 (https=)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7235153B2 (ja) * 2017-12-29 2023-03-08 株式会社三洋物産 遊技機
JP7235154B2 (ja) * 2018-02-15 2023-03-08 株式会社三洋物産 遊技機
JP7231076B2 (ja) * 2018-03-08 2023-03-01 株式会社三洋物産 遊技機
JP2020130466A (ja) * 2019-02-15 2020-08-31 株式会社三洋物産 遊技機
JP7234741B2 (ja) * 2019-03-28 2023-03-08 株式会社三洋物産 遊技機
JP7234740B2 (ja) * 2019-03-28 2023-03-08 株式会社三洋物産 遊技機
JP7234760B2 (ja) * 2019-04-11 2023-03-08 株式会社三洋物産 遊技機
JP7234761B2 (ja) * 2019-04-11 2023-03-08 株式会社三洋物産 遊技機
JP2023063369A (ja) * 2022-01-07 2023-05-09 株式会社三洋物産 遊技機
JP2023053387A (ja) * 2022-02-04 2023-04-12 株式会社三洋物産 遊技機
JP2023060270A (ja) * 2022-04-01 2023-04-27 株式会社三洋物産 遊技機
JP2023060269A (ja) * 2022-04-01 2023-04-27 株式会社三洋物産 遊技機
CN119421580B (zh) * 2024-12-27 2025-05-20 西湖烟山科技(杭州)有限公司 重构晶圆、晶圆重构方法和显示面板的制备方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5770542B2 (ja) * 2011-06-14 2015-08-26 キヤノン・コンポーネンツ株式会社 半導体装置の製造方法
KR20150038335A (ko) * 2012-07-30 2015-04-08 스미또모 가가꾸 가부시키가이샤 복합 기판의 제조 방법 및 반도체 결정층 형성 기판의 제조 방법
US9035279B2 (en) * 2013-07-08 2015-05-19 LuxVue Technology Corporation Micro device with stabilization post
JP2021027301A (ja) 2019-08-08 2021-02-22 信越半導体株式会社 半導体基板の仮接合方法

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