JP2023032838A - Manufacturing method of semiconductor device - Google Patents

Abstract

To provide a manufacturing method of a semiconductor device which can prevent burrs from being obstacle for a junction between chips while reducing a process to remove the burrs.SOLUTION: A manufacturing method of a semiconductor device comprises: a chip division step of dividing a device wafer which comprises a functional layer 103 having devices 105 formed in a region partitioned by matrix type division-scheduled lines on a surface 102 along the division-scheduled lines to divide it into individual devices 105; and a chip lamination step of laminating and fixing a side of the surface 102 where the functional layer 103 exists of the device 105 formed in the chip division step by facing it to a side of a rear surface 106 of other device 105. The device 105 has a side surface shape, in which the side of the surface 102 has a larger area than the side of the rear surface 106, formed in a trapezoid, to prevent burrs 130 of the functional layer 103 which is generated at a periphery of the side of the surface 102 of the device 105 from coming into contact with the device 105 to be laminated.SELECTED DRAWING: Figure 13

Description

The present invention relates to a method of manufacturing a semiconductor device by stacking chips.

2. Description of the Related Art As electronic devices become lighter, thinner, and smaller, semiconductor devices are being miniaturized by miniaturization of patterns and chip lamination. For example, techniques such as direct bonding have been developed in which chips are stacked and electrodes are directly bonded to each other. In direct bonding, the device surface of a chip with TSV (Through-Silicon Via) electrodes (surface on the functional layer side) is directly stacked on the back surface of the chip to be stacked. processed.

A device that will become a chip is divided along the planned division line by laser beam ablation or machining with a cutting blade, but burrs ranging from submicrons to several microns rise from the device surface at the edges of the division. As a result, the burr interferes with the joining of the chips. A method of removing the generated burrs with a cutting blade is known (see Patent Document 1, for example).

JP 2016-162809 A

However, by adding the process of removing burrs with a cutting blade, there is a possibility that a new problem may arise in the chip.

The present invention has been made in view of such problems, and its object is to reduce the process of removing burrs in a method of manufacturing a semiconductor device that manufactures chips by stacking them, and to prevent burrs from joining chips together. It is an object of the present invention to provide a method of manufacturing a semiconductor device that can suppress the interference of the semiconductor device.

In order to solve the above-described problems and achieve the object, a method of manufacturing a semiconductor device according to the present invention provides a device wafer having on its surface a functional layer in which devices are formed in regions partitioned by grid-like dividing lines. a chip dividing step of dividing the device chip into device chips by dividing the device chip along the dividing line; and a chip stacking step of stacking and fixing the device chip, the device chip having a trapezoidal side surface shape with the front surface side having a larger area than the back surface side, and the peripheral edge of the front surface side of the device chip. It is characterized in that burrs of the functional layer are prevented from coming into contact with the stacked device chips.

The other device chip laminated on the back side may be fixed on the front side to the substrate via an adhesive layer.

The device chip includes a through electrode penetrating through the device chip from the electrode formed in the functional layer to the back surface, and in the chip lamination step, the electrode of the device chip and the other device chip laminated with the through electrode are provided. Through electrodes may be joined.

The chip dividing step may include plasma etching using a plasma gas, cutting using a cutting blade, or laser processing using a laser beam.

INDUSTRIAL APPLICABILITY According to the present invention, it is possible to reduce the process of removing burrs and prevent burrs from interfering with bonding between chips.

FIG. 1 is a flow chart showing a processing procedure of a method for manufacturing a semiconductor device according to an embodiment. FIG. 2 is a perspective view showing an example of a device wafer to be processed in the method for manufacturing a semiconductor device according to the embodiment. 3 is a cross-sectional view of a main part of the device wafer shown in FIG. 2. FIG. FIG. 4 is a cross-sectional view explaining the chip dividing step shown in FIG. FIG. 5 is a cross-sectional view explaining the chip dividing step shown in FIG. FIG. 6 is a cross-sectional view explaining the chip dividing step shown in FIG. FIG. 7 is a cross-sectional view explaining the chip dividing step shown in FIG. FIG. 8 is a cross-sectional view explaining the chip dividing step shown in FIG. FIG. 9 is a cross-sectional view explaining the chip dividing step shown in FIG. FIG. 10 is a cross-sectional view illustrating a side forming step for forming a trapezoidal side surface of the device. FIG. 11 is a cross-sectional view for explaining the side shape formed in the side forming step shown in FIG. FIG. 12 is a cross-sectional view explaining the chip stacking step shown in FIG. FIG. 13 is a cross-sectional view illustrating the chip stacking step shown in FIG.

A form (embodiment) for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited by the contents described in the following embodiments. In addition, the components described below include those that can be easily assumed by those skilled in the art and those that are substantially the same. Furthermore, the configurations described below can be combined as appropriate. In addition, various omissions, substitutions, or changes in configuration can be made without departing from the gist of the present invention.

[Embodiment]
A method of manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a flow chart showing a processing procedure of a method for manufacturing a semiconductor device according to an embodiment. FIG. 2 is a perspective view showing an example of a device wafer 100 to be processed in the semiconductor device manufacturing method according to the embodiment. FIG. 3 is a cross-sectional view of the essential parts of the device wafer 100 shown in FIG. The method of manufacturing a semiconductor device according to the embodiment includes a chip dividing step 1001 and a chip stacking step 1002, as shown in FIG.

A device wafer 100 to be processed in the semiconductor device manufacturing method according to the embodiment is, as shown in FIG. . A device wafer 100 has a functional layer 103 formed on a surface 102 of a substrate 101, as shown in FIG. As shown in FIGS. 2 and 3, the device wafer 100 has devices 105 formed in a plurality of regions partitioned by a plurality of planned division lines 104 formed in a grid pattern on the functional layer 103 . The device 105 is, for example, an integrated circuit such as an IC (Integrated Circuit) or an LSI (Large Scale Integration).

The functional layer 103 includes an insulating film and a conductor film. The insulating film forming the functional layer 103 is an inorganic film such as SiO ₂ , SiOF, BSG (BoroSilicate Glass, SiOB), or an organic film such as a polymer film such as polyimide or parylene. It is composed of a body coating (hereinafter referred to as a Low-k film) and has a thickness of about 10 μm. The conductor film forming the functional layer 103 is made of a conductive metal. The low-k film is laminated with a conductive film to form device 105 . The conductor film constitutes the circuitry and electrodes of device 5 . For this purpose, the device 105 is composed of Low-k films stacked together and conductor films stacked between the Low-k films.

As shown in FIG. 3, the device wafer 100 includes through electrodes 107 extending through the substrate 101 from the front surface 102 to the rear surface 106 on the back side of the front surface 102 in the thickness direction. A device wafer 100 is divided into individual chip-like devices 105 (device chips according to the present invention) along dividing lines 104 . When the device wafer 100 is divided into individual devices 105 , the through electrodes 107 are so-called TSV (Through-Silicon Via) that penetrate the devices 105 from the circuits and electrodes formed in the functional layer 103 to the back surface 106 of the substrate 101 . , through-silicon) electrodes.

4 to 9 are cross-sectional views explaining the chip dividing step 1001 shown in FIG. 4 to 9, illustration of the through electrode 107 is omitted. The chip dividing step 1001 is a step of dividing the device wafer 100 into individual devices 105 along the dividing line 104 . The chip dividing step 1001 includes plasma etching using a plasma state gas 231 (see FIG. 6), cutting using a cutting blade 41 (see FIG. 7), or laser using a laser beam 221 (see FIG. 5). Including processing. In the present embodiment, the chip dividing step 1001 uses a combination of laser processing and plasma etching processing as shown in FIGS. 5 and 6. However, the present invention is not limited to this. Alternatively, cutting may be used as shown in FIG. Also, the chip division step 1001 may be performed using only laser processing.

In the chip dividing step 1001, first, as shown in FIG. Then, the device wafer 100 is supported by the adhesive tape 108 and the annular frame 109 . Here, the adhesive tape 108 is, for example, a dicing tape formed into a sheet. Note that the present invention is not limited to this, and instead of the adhesive tape 108 and the annular frame 109, a rigid support substrate having a diameter equal to or larger than that of the device wafer 100 is adhered to the rear surface 106, and the device is supported by the support substrate. Wafer 100 may be supported.

In the chip dividing step 1001, after mounting the annular frame 109, as shown in FIG. , to form a protective film 212 necessary for subsequent laser processing and plasma etching processing. In the chip dividing step 1001, the holding surface 13 of the spinner table 12 sucks and holds the device wafer 100 from the back surface 106 side through the adhesive tape 108, rotates the spinner table 12 around the axis, and separates the holding surface of the spinner table 12. A water-soluble resin 211 is supplied toward the center of the surface of the functional layer 103 of the device wafer 100 from the resin supply nozzle 11 arranged above the center of the device wafer 100 . In the chip dividing step 1001, the supplied water-soluble resin 211 is stretched on the surface of the functional layer 103 of the device wafer 100 by the centrifugal force generated by the rotation of the spinner table 12 to cover the surface of the functional layer 103. A protective film 212 of water-soluble resin 211 is formed. In the chip dividing step 1001, a stacking process of stacking the protective film 212 on the protective film 212 to form a thickness necessary for the plasma etching to be performed later, and a curing process of heating the protective film 212 to harden it. you can go

The water-soluble resin 211 used for forming the protective film 212 in the chip dividing step 1001 is, for example, polyvinyl alcohol (PVA), polyvinyl pyrrolidone (PVP), or the like in this embodiment. The protective film 212 functions as a shielding film (mask) that prevents the functional layer 103 and the substrate 101 necessary for the device 105 from being removed by laser processing and plasma etching processing that are performed later.

In the chip dividing step 1001, after the protective film 212 is formed, the functional layer 103 of the device wafer 100 is laser processed and divided along the dividing lines 104 by the laser processing apparatus 20 as shown in FIG. In the chip dividing step 1001 , the device wafer 100 is suction-held from the back surface 106 side of the holding surface 23 of the chuck table 22 via the adhesive tape 108 , and the laser irradiator 21 arranged above the holding surface 23 of the chuck table 22 is held. By moving the chuck table 22 relative to the laser irradiator 21 along the planned dividing line 104 while irradiating the functional layer 103 with a laser beam 221 having an absorptive wavelength, the planned dividing line 104 is formed. The protective film 212 and the functional layer 103 are irradiated with a laser beam 221 along the line. In the chip dividing step 1001 , the protective film 212 and the functional layer 103 are laser-processed (ablated) along the dividing line 104 by the laser beam 221 , thereby dividing the protective film 212 and the functional layer 103 along the dividing line 104 . Then, the substrate 101 is exposed along the planned dividing line 104 by forming the laser-processed grooves 222 . In the chip dividing step 1001 , burrs 130 (see FIG. 13 ) are generated on the periphery of the functional layer 103 divided along the dividing line 104 , rising from submicrons to several microns from the functional layer 103 .

In the chip dividing step 1001, after dividing the functional layer 103, as shown in FIG. A half cut is performed to form a groove 232 with a depth that does not divide. In the chip division step 1001, the device wafer 100 is suction-held from the rear surface 106 side on the holding surface 33 of the chuck table 32 via the adhesive tape 108, and a high-frequency voltage is applied to the chuck table 32 to draw gas 231 in the plasma state, and the chuck is chucked. The plasma state gas 231 is supplied from the gas supply section 31 disposed above the holding surface 33 of the table 32 while applying a high frequency voltage for generating and maintaining the gas 231 in the plasma state. In the chip division step 1001 , plasma state gas 231 is applied along the laser processing grooves 222 (dividing lines 104 ) in which the protective film 212 and the functional layer 103 are removed by the previous laser processing and the substrate 101 is exposed. The substrate 101 is plasma-etched to form grooves 232 with a depth that does not completely divide the substrate 101 along the dividing lines 104 . As a result of this half-cutting, the device wafer 100 is in a state where the devices 105 are connected at the portion on the back surface 106 side of the substrate 101 .

In the chip division step 1001, in this embodiment, the substrate 101 is half-cut by plasma etching after the functional layer 103 is divided. Half-cutting may be performed by irradiating the substrate 101 with a laser beam having an absorptive wavelength to form grooves 232 with similar depths. In addition, in the chip division step 1001, as shown in FIG. 7, the substrate 101 of the device wafer 100 is cut along the laser-processed grooves 222 (dividing lines 104) by the cutting apparatus 40 to obtain chips having the same depth. A half-cut to form a groove 232 may be performed. In the chip dividing step 1001 , the device wafer 100 is suction-held from the rear surface 106 side on the holding surface 43 of the chuck table 42 via the adhesive tape 108 , and is attached to the tip of the spindle arranged above the holding surface 43 of the chuck table 42 . By moving the chuck table 42 relative to the cutting blade 41 along the dividing line 104 while rotating the mounted cutting blade 41 , the substrate 101 is moved along the dividing line 104 by the cutting blade 41 . A groove 232 is formed by cutting.

In the chip dividing step 1001, it is preferable to half-cut the substrate 101 by plasma etching after dividing the functional layer 103 as in the present embodiment. In this case, the device 105 having high bending strength can be obtained. At the same time, it is possible to reduce processing waste generated when the substrate 101 is half-cut, thereby reducing contamination adhering to the device 105 .

In the chip division step 1001 , after half-cutting the substrate 101 , the protective film 212 of the water-soluble resin 211 formed on the surface of the functional layer 103 of the device wafer 100 is removed. Specifically, in the chip dividing step 1001, the device wafer 100 is taken out and held by a spinner table (not shown), the spinner table is rotated around its axis, and the device wafer 100 is arranged above the center of the holding surface of the spinner table. Cleaning water is supplied toward the protective film 212 of the device wafer 100 from the cleaning water supply nozzle. In the chip dividing step 1001, the supplied washing water spreads over the protective film 212 of the device wafer 100 due to the centrifugal force generated by the rotation of the spinner table, and dissolves and removes the protective film 212 of the water-soluble resin 211. .

In the chip division step 1001, after removing the protective film 212, as shown in FIG. An annular frame 109 is attached to the outer edge of the adhesive tape 108 . Instead of the adhesive tape 108, a hard supporting substrate having a diameter equal to or larger than that of the device wafer 100 may be adhered to the surface 102, and the device wafer 100 may be supported by the supporting substrate.

In the chip division step 1001, after the functional layer 103 side of the device wafer 100 is supported by the adhesive tape 108 and the annular frame 109, as shown in FIG. A portion of the substrate 101 of the device wafer 100 connecting the devices 105 is thinned by grinding. In the chip dividing step 1001, the device wafer 100 is suction-held from the functional layer 103 side on the holding surface 53 of the chuck table 52 through the adhesive tape 108, and the chuck table 52 is rotated around the axis while the chuck table 52 is held. A grinding wheel 51 attached to the tip of a spindle arranged above the surface 53 is pressed against the back surface 106 of the substrate 101 of the device wafer 100 while rotating about its axis. In the chip division step 1001 , the substrate 101 of the device wafer 100 is ground from the rear surface 106 side by the grinding wheel 51 to thin the portion connecting the devices 105 of the substrate 101 of the device wafer 100 .

In the chip division step 1001, in this embodiment, the device wafer 100 is divided into individual devices 105 by completely grinding the portion connecting the devices 105 of the substrate 101 of the device wafer 100, but in the present invention, Without being limited to this, the portion connecting the devices 105 of the substrate 101 of the device wafer 100 is left with a thickness that can be removed by the plasma etching process to be performed later, and the plasma etching process to be performed later is performed. Device wafer 100 may be divided into individual devices 105 .

The method for manufacturing a semiconductor device according to the embodiment further includes a side forming step. FIG. 10 is a cross-sectional view for explaining a side surface forming step for forming the side surface of the device 105 into a trapezoidal shape. FIG. 11 is a cross-sectional view for explaining the side shape formed in the side forming step shown in FIG. Note that FIG. 10 omits illustration of the through electrode 107 . As shown in FIG. 10, the side surface forming step is a step of forming the side surfaces of the individually divided devices 105 into trapezoidal shapes as shown in FIG. Here, the trapezoidal side surface shape of the device 105 means that the shape of the side surface of the device 105 that intersects the front surface of the functional layer 103 on the front surface 102 side and the back surface 106 is trapezoidal. In the present embodiment, the device 105 is formed in a plurality of regions partitioned by a plurality of division lines 104 formed in a grid pattern, so four side faces of the device 105 are formed for each device 105 .

In the side forming step, as shown in FIG. 10 , the device wafer 100 is held by suction from the side of the functional layer 103 on the holding surface 63 of the chuck table 62 via the adhesive tape 108 , and the plasma state gas 241 is supplied by the gas supply unit 61 . Supply from the back surface 106 side of the device wafer 100 . In the side forming step, the substrate 101 of the device wafer 100 is plasma-etched from the rear surface 106 side with the plasma gas 241 .

The plasma etching process performed in the side forming step is not the so-called Bosch process in which etching in the depth direction and the formation of etching side wall protective films are repeated, but isotropic dry etching that does not form etching side wall protective films. Further, in the side surface forming step, the device wafer 100 is placed so that the rear surface 106 side is closer to the gas supply unit 61 than the functional layer 103 side (front surface 102 side), and the plasma etching process is performed. Therefore, in the side face forming step, more plasma gas 241 is supplied to the side face of the groove 232 forming the side face of each device 105 on the side of the back face 106 than on the side of the functional layer 103 (the side of the front face 102). Thus, the side surface of the device 105 is shaved by plasma etching processing on the back surface 106 side more than on the functional layer 103 side (front surface 102 side). In the side surface forming step, as shown in FIG. 11, the grooves 232 forming the side surfaces of the individual devices 105 are formed with an inclination that narrows the groove width from the back surface 106 side toward the front surface 102 side (functional layer 103 side). A surface 110 is formed. For this reason, the inclined surface 110 is formed in a trapezoidal shape with longer sides on the front surface 102 side (functional layer 103 side) than on the back surface 106 side. For this reason, in the side forming step, each device 105 is formed such that the front surface 102 side (functional layer 103 side) has a larger area than the back surface 106 side.

In the side surface forming step, the side surface of the groove 232 is formed by controlling plasma etching processing conditions such as the supply amount of the gas 241 in the plasma state from the gas supply unit 61 and the high-frequency voltage applied to the gas supply unit 61 and the chuck table 62 . The inclination angle of the inclined surface 110 to be formed can be controlled. In this embodiment, for example, if the thickness 301 of the device 105 is about 55 μm and the spacing 302 of the grooves 232 is about 50 μm, then the side formation step may include the adjacent inclined surfaces 110 formed from the same grooves 232 . The interval 303 on the functional layer 103 side is controlled to about 80 μm, and the interval 304 on the back surface 106 side of the adjacent inclined surfaces 110 formed from the same groove 232 is controlled to about 104 μm or less.

In the semiconductor device manufacturing method of the present embodiment, the device wafer 100 is divided into individual devices 105 by grinding, and after the chip division step 1001 is completed, the side forming step is performed. The present invention is not limited to this, and the device wafer 100 is obtained by leaving the portion connecting the devices 105 of the substrate 101 of the device wafer 100 by the previously performed grinding, and removing the remaining portion by plasma etching. The chip dividing step 1001 may be completed by dividing into individual devices 105, and the plasma etching process may be continued to perform the sidewall forming step.

12 and 13 are cross-sectional views explaining the chip stacking step 1002 shown in FIG. In the chip stacking step 1002, as shown in FIGS. 12 and 13, the chip stacking apparatus 70 is used to cover the surface 102 of the device 105 formed in the chip dividing step 1001 and the side surface forming step with the functional layer 103 on the other device 105 side. This is a step of stacking and fixing the substrates facing the rear surface 106 side of the substrate.

In the chip stacking step 1002 , first, the front surface 102 side of the device 105 formed in the chip dividing step 1001 and the side surface forming step on which the functional layer 103 is located is arranged on a predetermined substrate 120 . The predetermined board 120 is, for example, a circuit board. In the chip lamination step 1002, the device 105 may be fixed to the substrate 120 on the surface 102 side with the functional layer 103 via a predetermined glue layer. It is possible to suppress obstruction of arrangement on the substrate 120 . The device 105 arranged on the substrate 120 is another device chip in which the device chip of the present invention is laminated on the back side.

In the chip stacking step 1002, after the device 105 is arranged on the substrate 120, the chip stacking apparatus 70 holds the device 105 formed in the chip dividing step 1001 and the side surface forming step from the back surface 106 side, and functions of the held device 105 The device 105 arranged on the substrate 120 is laminated with the surface 102 side having the layer 103 facing the back surface 106 side and fixed. In the chip stacking step 1002, a semiconductor device 140 in which the devices 105 are stacked in the thickness direction is manufactured.

Since the device 105 is formed so that the front surface 102 side (functional layer 103 side) has a larger area than the back surface 106 side in the side surface formation step, the chip stacking step 1002 is performed by the chip stacking apparatus 70 to stack the front surface 102 of the device 105 . The functional layer on the front surface 102 side of the device 105 stacked by the chip stacking apparatus 70 so that the burrs 130 formed on the peripheral edge of the functional layer 103 on the side protrude from the back surface 106 of the device 105 arranged on the substrate 120 to the outer periphery. It can be laminated with the central region of 103 facing the backside 106 of device 105 located on substrate 120 . In the chip stacking step 1002 , this can prevent the burr 130 from contacting the rear surface 106 of the device 105 arranged on the substrate 120 and interfering with stacking of the devices 105 .

In addition, in the chip stacking step 1002, the electrode formed by the conductive film of the functional layer 103 of the device 105 stacked by the chip stacking apparatus 70 is joined to the through electrode 107 of the device 105 arranged on the substrate 120, Electrical connections are made between these stacked devices 105 .

In the method of manufacturing a semiconductor device according to the embodiment having the configuration as described above, the device 105 has a trapezoidal side shape in which the front surface 102 side (functional layer 103 side) has a larger area than the back surface 106 side. The burrs 130 of the functional layer 103 generated on the periphery of the surface 102 side (functional layer 103 side) are prevented from coming into contact with the laminated device 105 . For this reason, the method for manufacturing a semiconductor device according to the embodiment reduces the process of removing the burr 130 when manufacturing the semiconductor device 140 by stacking the devices 105 , and prevents the burr 130 from stacking and joining the devices 105 together. There is an effect that it is possible to suppress the obstruction of the

Further, in the method for manufacturing a semiconductor device according to the embodiment, the device 105 arranged on the substrate 120 is fixed to the substrate 120 on the side of the front surface 102 via a glue layer. Therefore, the method for manufacturing a semiconductor device according to the embodiment can prevent the burr 130 from interfering with the placement on the substrate 120 due to the glue layer.

Further, in the method for manufacturing a semiconductor device according to the embodiment, since the device wafer 100 and the devices 105 are provided with the through electrodes 107, the burrs 130 can be prevented from interfering with the bonding of the devices 105 to each other. It is possible to suppress the risk of failure due to interference between the through electrode 107 of the device 105 arranged in the device 105 and the electrode constituted by the conductive film of the functional layer 103 of the device 105 stacked on the device 105 .

It should be noted that the present invention is not limited to the above embodiments. That is, various modifications can be made without departing from the gist of the present invention.

41 cutting blade 100 device wafer 102 front surface 103 functional layer 104 dividing line 105 device 106 back surface 107 through electrode 110 inclined surface 130 burr 140 semiconductor device 221 laser beam 231, 241 gas in plasma state

Claims (4)

a chip dividing step of dividing a device wafer having on its surface a functional layer having devices formed in regions partitioned by grid-like dividing lines into device chips along the dividing lines;
a chip stacking step of stacking and fixing the surface side of the device chip formed in the chip dividing step with the functional layer facing the back side of the other device chip,
The device chip has a trapezoidal side surface in which the front surface side has a larger area than the back surface side, and the burrs of the functional layer generated on the periphery of the front surface side of the device chip come into contact with the laminated device chip. A method of manufacturing a semiconductor device, characterized by suppressing the occurrence of 2. The method of manufacturing a semiconductor device according to claim 1, wherein the other device chip laminated on the back side of the device chip is fixed to the substrate via an adhesive layer on the front side thereof. The device chip includes a through electrode penetrating through the device chip from the electrode formed in the functional layer to the back surface, and in the chip lamination step, the electrode of the device chip and the other device chip laminated with the through electrode are provided. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the through electrodes are joined. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the chip dividing step includes plasma etching processing using plasma gas, cutting processing using a cutting blade, or laser processing using a laser beam.

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