JP2023022274A5

JP2023022274A5 -

Info

Publication number: JP2023022274A5
Application number: JP2022194628A
Authority: JP
Filing date: 2022-12-06
Publication date: 2023-08-07
Anticipated expiration: 2040-06-05

Description

上記の目的を達成するため、本発明は、プログラム処理を実行するＣＰＵ、前記ＣＰＵに制御されて動作するＤＭＡＣ（Direct Memory Access Controller ）回路、及び、前記ＤＭＡＣ回路の動作を規定する設定値が設定される動作制御レジスタを有するＣＰＵ回路と、ＶＤＰ（Video Display Processor ）と、を設け、前記ＶＤＰを制御するべくディスプレイリストを発行する前記ＣＰＵが機能して、画像演出と音声演出を含んだ所定の演出動作が実行される遊技機であって、前記ＶＤＰがアクセス可能なメモリ空間には、所定ビット位置以下の下位ビットが０となる基点アドレスに基づいて、動画用の圧縮データを展開する展開空間として使用可能な一又は複数の領域が確保可能に構成される一方、前記ＣＰＵがアクセス可能なメモリ空間には、前記ＣＰＵを含むＣＰＵ回路の外部に位置して、データバス幅を各々規定可能な複数区画に区分されたアドレス空間が含まれており、前記複数区画のアドレス空間は、不揮発性メモリで構成された不揮発性空間と、揮発性メモリで構成された揮発性空間とに大別され、前記不揮発性空間に含まれる所定のアドレス空間に記憶されているプログラム及びデータの少なくとも一部である被転送情報が、前記ＣＰＵのリセット後に、前記ＤＭＡＣ回路の動作に基づいて、前記揮発性空間に含まれるアドレス空間に転送されるよう構成されている。 To achieve the above object, the present invention provides a CPU for executing program processing, a DMAC (Direct Memory Access Controller) circuit that operates under the control of the CPU, and a set value that defines the operation of the DMAC circuit. A CPU circuit having an operation control register and a VDP (Video Display Processor) are provided, and the CPU, which issues a display list to control the VDP, functions to perform a predetermined display including image effects and audio effects. In a game machine for executing a performance operation, a memory space accessible by the VDP has a development space for developing compressed data for moving images based on a base address in which the lower bits below a predetermined bit position are 0. The memory space accessible by the CPU is located outside the CPU circuit including the CPU, and can define a data bus width. An address space divided into a plurality of partitions is included, and the address space of the plurality of partitions is roughly divided into a nonvolatile space configured with nonvolatile memory and a volatile space configured with volatile memory, Information to be transferred, which is at least a part of a program and data stored in a predetermined address space included in the nonvolatile space, is transferred to the volatile space based on the operation of the DMAC circuit after the CPU is reset. configured to be forwarded to the containing address space .

Claims

A CPU that executes program processing, a DMAC (Direct Memory Access Controller) circuit that operates under the control of the CPU, and a CPU circuit that has an operation control register in which set values that define the operation of the DMAC circuit are set; (Video Display Processor) and
A gaming machine in which the CPU that issues a display list to control the VDP functions and a predetermined effect operation including an image effect and a sound effect is executed,
In the memory space accessible by the VDP, it is possible to secure one or a plurality of areas that can be used as expansion space for expanding compressed data for moving images, based on a base address in which the lower bits below a predetermined bit position are 0. while configured to
The memory space accessible by the CPU includes an address space located outside a CPU circuit including the CPU and divided into a plurality of sections each capable of defining a data bus width,
The address space of the plurality of partitions is roughly divided into a non-volatile space made up of non-volatile memory and a volatile space made up of volatile memory,
Information to be transferred, which is at least a part of a program and data stored in a predetermined address space included in the nonvolatile space, is transferred to the volatile space based on the operation of the DMAC circuit after the CPU is reset. A game machine characterized by being configured to be transferred to an address space contained therein .