JP2021061368A - Manufacturing method for chip resistor - Google Patents

Abstract

To provide a manufacturing method for chip resistor, capable of achieving exact and easy resistance value adjustment using a four-terminal measurement as well as easy break of a large-sized substrate after resistance value adjustment.SOLUTION: After front electrodes 2 each being spaced from a primary division groove 11 and opposing thereto at a prescribed interval and a resistor 3 bridging between both the front electrodes 2 are formed in each chip formation region partitioned by the primary division groove 11 and a secondary division groove 12 at the surface of a large-sized substrate 10A, a voltage measurement probe 13 with a larger diameter than a spacing gap G is brought into contact with all the front electrodes 2 of a resistance element group in the resistance element group formed by alternately arranging the adjacent front electrode 2 and the resistor 3 through the spacing gap G, an energization probe 14 is brought into contact with the front electrodes 2 positioned at both ends of the resistance element group and while an electric current is being run between the pair of energization probes 14 under such a state, each of voltage values between the resistors 3 is measured using the pair of voltage measurement probes 13.SELECTED DRAWING: Figure 4

Description

The present invention relates to a method for manufacturing a chip resistor whose resistance value is adjusted by forming a trimming groove in a resistor provided on an insulating substrate.

The chip resistors are a rectangular body-shaped insulating substrate, a pair of front electrodes arranged to face each other on the front surface of the insulating substrate at a predetermined interval, and a pair of front electrodes arranged to face each other on the back surface of the insulating substrate at a predetermined interval. It is mainly composed of a back electrode, an end face electrode that bridges the front electrode and the back electrode, a resistor that bridges the paired front electrodes, a protective film that covers the resistor, and the like.

Generally, when manufacturing such a chip resistor, a large-format substrate provided with a primary dividing groove and a secondary dividing groove extending in a grid pattern is prepared, and a large number of surface electrodes are provided for the large-format substrate. After forming the resistor, the protective film, and the like all at once, the large-sized substrate is divided along the primary dividing groove and the secondary dividing groove to take a large number of chip resistors. In the manufacturing process of such a chip resistor, a pair of surface electrodes is formed by printing and firing a conductive paste in each chip forming region partitioned by the primary dividing groove and the secondary dividing groove on the surface of a large-format substrate. At the same time, a large number of resistors are formed by printing and firing a resistance paste between a plurality of pairs of surface electrodes. At that time, it is inevitable that the size and film thickness of each resistor will vary slightly due to the effects of misalignment and bleeding during printing, temperature unevenness in the firing furnace, etc., so each resistor in the state of a large-format substrate The resistance value is adjusted by forming a trimming groove on the body and setting the desired resistance value.

To adjust the resistance value, the measuring probes are brought into contact with the surface electrodes connected to both ends of the resistor, and in this state, the resistor is irradiated with laser light while measuring the resistance value between the measuring probes. A method of increasing the resistance value of a resistor by forming a trimming groove is widely adopted. Here, since the measurement probe in contact with the front electrode has a resistance value by itself, in order to accurately measure the resistance value of the resistor, the resistance value of this measurement probe should not be included. A measurement method called the so-called four-terminal method is effective, in which a probe for energization that supplies a constant current and a probe for voltage measurement that detects a voltage drop are used, and the resistance value is measured while each of these probes is in contact with the front electrode. is there. In particular, in a method for manufacturing a low resistance chip resistor having a required resistance value of 10 Ω or less, it is indispensable to adjust the resistance value by using a 4-terminal measurement method in order to accurately measure the resistance value of the resistor. ..

As a conventional technique for adjusting the resistance value using the four-terminal measurement method, as shown in FIG. 5, the resistance element is applied to a group of resistance elements in which the resistor 100 and the surface electrode 101 are alternately arranged and connected in series. The energizing probes 102 are brought into contact with the surface electrodes 101 located at both ends of the group, and the voltage measuring probes 103 are brought into contact with all the surface electrodes 101 of the resistance element group, and a constant current (I) is applied to the energizing probes 102. ) Has been proposed to measure the voltage (V) between electrodes of each resistor 100 (see Patent Document 1).

When the resistance value of the resistor 100 is adjusted using such a four-terminal measurement method, all the resistors 100 are made by passing a constant current (I) between the surface electrodes 101 at both ends of the resistance element group connected in series. Since the constant current flows through the resistor 100, it is not necessary to bring the energizing probe 102 into contact with each resistor 100, and the voltage measuring probe 103 has one on the surface electrode 101 common to the adjacent resistors 100. It will be enough. Therefore, the required probe 102 is compared with the four-terminal measurement method in which two probes 102 and 103 are brought into contact with all the surface electrodes 101 of the resistance element group to measure the resistance value of each resistor 100. , 103 can be reduced in total, and one probe 103 for voltage measurement is required for the surface electrode 101 common to the adjacent resistors 100, so that the voltage measurement probe 103 for a large area can be used for voltage measurement. The probe 103 can be easily brought into contact.

Japanese Unexamined Patent Publication No. 2005-150580

By the way, the resistor 100 and the surface electrode 101 shown in FIG. 5 are collectively formed on a large-format substrate provided with a primary dividing groove and a secondary dividing groove extending in a grid pattern, which is generally used. In the method for manufacturing a chip resistor, a large number of chip-shaped substrates are formed by adjusting the resistance value of these resistors 100 and then dividing (breaking) the large-format substrate along the primary dividing groove and the secondary dividing groove. I try to separate them into individual pieces. That is, as shown in FIG. 6, a large-format substrate 104 provided with a primary dividing groove 105 and a secondary dividing groove 106 extending in a grid pattern is prepared, and the primary dividing groove 105 and the secondary are secondary on the surface of the large-format substrate 104. A surface electrode 101 is formed by printing and firing a conductive paste parallel to the secondary dividing groove 106 and straddling the primary dividing groove 105 at both ends of each chip forming region partitioned by the dividing groove 106. A resistor paste is printed and fired between a pair of surface electrodes 101 facing each other in the chip forming region to form a resistor 100.

However, since the surface electrode 101 is formed by the conductive paste printed so as to straddle the primary dividing groove 105, the conductive paste tends to seep out in the direction of the secondary dividing groove 106 along the primary dividing groove 105. As a result, the resistors 100 adjacent to each other via the secondary dividing groove 106 may be electrically connected (short-circuited) by the conductive paste that has exuded into the primary dividing groove 105. In that case, the resistance value is adjusted. It becomes impossible to accurately measure the resistance value being measured. In particular, as the area of the chip forming region on the large-format substrate 104 becomes smaller as the chip resistor becomes smaller, the distance between the adjacent surface electrodes 101 via the secondary dividing groove 106 becomes shorter, so that the above-mentioned conductive paste can be used. The risk of short circuit due to exudation increases. Further, when the large-format substrate 104 is divided (primary break) along the primary dividing groove 105 after adjusting the resistance value, the table electrode 101 is formed so as to straddle the primary dividing groove 105, which makes it difficult to break. At the time of the primary division, there is a possibility that the primary division may be undesirably cracked along the secondary division groove 106, or the break shape of the primary division surface may be deteriorated, which may hinder the formation of the end face electrode.

The present invention has been made in view of the actual situation of such a prior art, and an object of the present invention is that the resistance value can be adjusted accurately and easily by using the four-terminal measurement method, and the resistance value is adjusted after the resistance value is adjusted. An object of the present invention is to provide a method for manufacturing a chip resistor capable of easily breaking a large-format substrate.

In order to achieve the above object, the method for manufacturing a chip resistor according to the present invention has a plurality of primary dividing grooves and secondary dividing grooves extending in a grid pattern, and the primary dividing groove and the secondary dividing groove. A step of forming a pair of table electrodes facing each other at a predetermined interval in each of the chip forming regions with respect to a large-sized substrate in which a chip forming region corresponding to one chip resistor is partitioned, and the chip forming. A step of forming a plurality of resistors so as to connect the surface electrodes facing each other in the region is provided, and the surface electrodes have a separation gap divided across the primary dividing groove. In the step of adjusting the resistance value with respect to a group of resistance elements in which the front electrode and the resistor adjacent to each other via the separation gap are alternately arranged along the extending direction of the secondary dividing groove, the resistance. A voltage measuring probe having a diameter larger than the separation gap is brought into contact with all the surface electrodes of the element group, and an energizing probe is brought into contact with the table electrodes located at both ends of the resistance element group. In this state, while passing a current between the pair of energizing probes, the resistance value of each resistor is adjusted while measuring the voltage value between the resistors with each of the voltage measuring probes, and then the large format substrate is used. It is characterized in that the chip is individually separated along the primary dividing groove and the secondary dividing groove.

In the method for manufacturing a chip resistor including such a step, since the front electrode has a separation gap that is divided across the primary dividing groove, the conductive paste for forming the front electrode is transmitted through the primary dividing groove. Therefore, it does not flow out in the direction of the secondary dividing groove, and short-circuiting between adjacent surface electrodes can be prevented through the secondary dividing groove.

Then, in the step of adjusting the resistance value for the resistance element group in which the adjacent surface electrodes and the resistors are alternately arranged along the extending direction of the secondary dividing groove through the separation gap, the resistance element group A voltage measuring probe having a diameter larger than that of the separation gap is brought into contact with all the front electrodes across two adjacent front electrodes via the separation gap G, and is attached to the front electrodes located at both ends of the resistance element group. By bringing the energizing probes into contact with each other and measuring the voltage value between the resistors with each voltage measuring probe while passing a current between the pair of energizing probes in this state, the front electrode is primaryly divided by the separation gap. A current can be passed between the pair of energizing probes even if they are divided across the groove, and the resistance value of the resistor can be adjusted accurately and easily by using the 4-terminal measurement method.

In addition, since the conductive paste does not enter the primary dividing groove, the large-format substrate can be easily broken along the primary dividing groove after adjusting the resistance value, and deterioration of the break shape and undesired secondary cracking are suppressed. can do.

According to the method for manufacturing a chip resistor of the present invention, the resistance value can be adjusted accurately and easily by using the four-terminal measurement method, and the large-format substrate after the resistance value adjustment can be easily broken. ..

It is a top view of the chip resistor which concerns on embodiment of this invention. It is sectional drawing which follows the line II-II of FIG. It is a flowchart which shows the manufacturing process of the chip resistor. It is explanatory drawing of the large-sized substrate used in the manufacturing process of the chip resistor. It is explanatory drawing which shows the resistance value adjustment method of the chip resistor which concerns on a prior art example. It is explanatory drawing which shows the manufacturing process of the chip resistor which concerns on a prior art example.

When the embodiment of the invention is described with reference to the drawings, FIG. 1 is a plan view of the chip resistor according to the embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along the line II-II of FIG.

As shown in FIGS. 1 and 2, the chip resistor 10 according to the present embodiment includes a rectangular-shaped insulating substrate 1 and a pair of surface electrodes 2 provided at both ends of the surface of the insulating substrate 1 in the longitudinal direction. A resistor 3 that bridges between these two front electrodes 2, a protective layer 4 that covers the resistor 3, a pair of back electrodes 5 provided at both ends of the back surface of the insulating substrate 1 in the longitudinal direction, and an insulating substrate. It is mainly composed of a pair of end face electrodes 6 provided on both end faces in the longitudinal direction of 1 and external electrodes 7 and the like covering these electrode portions 2, 5 and 6.

The insulating substrate 1 is obtained by dividing a large-format substrate, which will be described later, along vertical and horizontal dividing grooves (primary dividing groove and secondary dividing groove) and taking a large number of them, and the main component of the large-format substrate is alumina as the main component. It is a ceramic substrate.

The pair of surface electrodes 2 are made by screen-printing a silver-based paste containing silver as a main component, drying and firing, and these surface electrodes 2 are formed on the surface of the insulating substrate 1 so as to face each other at predetermined intervals. Has been done. These surface electrodes 2 are formed at positions slightly inwardly separated from both ends in the longitudinal direction of the insulating substrate 1, and a slight gap is secured between the surface electrodes 2 and the end faces in the longitudinal direction of the insulating substrate 1. ..

The resistor 3 is obtained by screen-printing a resistor paste such as ruthenium oxide, drying and firing, and the resistor 3 is formed in a rectangular shape so that both ends thereof overlap the surface electrode 2. A trimming groove 7 is formed in the resistor 3, and the trimming groove 7 adjusts the resistance value of the resistor 3 to a predetermined value. The trimming groove 7 is a notch formed in the resistor 3 by irradiation with a laser beam. In this embodiment, the trimming groove 7 having an L-cut shape is formed to adjust the resistance value of the resistor 3, but the trimming groove 7 is formed. The shape of 7 may be an I-cut shape other than the L-cut, and the number of trimming grooves 7 is not limited to one and may be a plurality of trimming grooves 7.

The protective layer 4 has a two-layer structure consisting of an undercoat layer and an overcoat layer. The undercoat layer is screen-printed with a glass paste, dried and fired, and the overcoat layer is screen-printed with an epoxy resin paste. It is heat-cured (baked). The undercoat layer protects the resistor 3 from the heat of the laser when the trimming groove 7 is formed, and the undercoat layer is formed in a size sufficient to completely cover the resistor 3. The overcoat layer protects the resistor 3 after forming the trimming groove 7 from the external environment (humidity, corrosive gas, etc.), and the overcoat layer is formed to a size that can completely cover the undercoat layer. ing.

The pair of back electrodes 5 are made by screen-printing a silver-based paste containing silver as a main component, drying and firing, and these back electrodes 5 are both ends in the longitudinal direction on the back surface of the insulating substrate 1 so as to correspond to the front electrodes 2. It is formed in the part. At that time, in order to further improve the breakability, the back electrode 5 may be formed at a position slightly inward from both ends in the longitudinal direction of the insulating substrate 1 as in the front electrode 2.

The pair of end face electrodes 6 are obtained by sputtering Ni / Cr on the end faces of the insulating substrate 1 or applying resin silver and curing by heating, and have a U-shaped cross section so as to wrap around the front surface and the back surface of the insulating substrate 1. By forming, the front electrode 2 and the back electrode 5 corresponding to each other are bridged by these end face electrodes 6. After that, the surface of these end face electrodes 6 is covered with an external electrode 7 having a two-layer structure composed of a Ni-plated layer and a Sn-plated layer.

Next, the manufacturing process of the chip resistor 10 will be described with reference to the flowchart shown in FIG. 3 and the explanatory diagram of the large format substrate shown in FIG.

First, a large-format substrate 10A on which a large number of insulating substrates 1 are taken is prepared (S-1 in FIG. 3). As shown in FIG. 4A, a plurality of primary dividing grooves 11 and secondary dividing grooves 12 are provided in a grid pattern on the surface of the large-format substrate 10A, and are separated by both dividing grooves 11 and 12. Each of the squares is a chip forming area for one piece. Although FIG. 4 shows the large-format substrate 10A corresponding to a plurality of chip forming regions as a representative, each step described below with respect to the large-format substrate 10A corresponding to a large number of chip forming regions is actually shown. Is done all at once.

That is, by screen-printing a conductive paste containing Ag on the surface of the large-format substrate 10A and then drying and firing it, as shown in FIG. 4B, 1 is formed on both ends of each chip forming region. A plurality of pairs of surface electrodes 2 that are separated from the next dividing groove 11 and face each other with a predetermined interval are formed (S-2 in FIG. 3). As a result, a separation gap G wider than the groove width of the primary dividing groove 11 is secured between the two adjacent table electrodes 2 via the primary dividing groove 11, so that the conductive paste forms the primary dividing groove 11. It is not transmitted and flows out in the direction of the secondary dividing groove 12. A plurality of pairs of back surfaces corresponding to the front electrode 2 are formed by screen-printing an Ag-based paste on the back surface of the large-format substrate 10A and then drying and firing the paste at the same time as or before and after the forming process of the front electrode 2. An electrode (not shown) is formed (S-3 in FIG. 3).

Next, a resistor paste such as ruthenium oxide is screen-printed on the surface of the large-format substrate 10A, dried and fired to form a resistor 3 having both ends overlapping the surface electrode 2 as shown in FIG. 4 (c). It is formed (S-4 in FIG. 3). As a result, a large number of resistance element groups in which adjacent surface electrodes 2 and resistors 3 are alternately arranged along the extending direction of the secondary dividing groove 12 are formed on the surface of the large-format substrate 10A via a separation gap G. In the illustrated example, one resistance element group is composed of ten surface electrodes 2 and four resistors 3 divided by a separation gap G. After that, the glass paste is screen-printed, dried and fired to form an undercoat layer (S-5 in FIG. 3) that covers the resistor 3.

Next, as shown in FIG. 4D, the voltage measuring probe 13 is brought into contact with all the surface electrodes 2 of the resistance element group, and the pair of surface electrodes 2 located at both ends of the resistance element group are energized probes. 14 are brought into contact with each other. Here, the diameter dimension of the voltage measurement probe 13 is set to be larger than the separation gap G, and such a voltage measurement probe 13 is brought into contact with the two adjacent surface electrodes 2 via the separation gap G. By allowing the current to flow between the energizing probes 14 that are in contact with the pair of surface electrodes 2 located at both ends of the resistance element group, even though each surface electrode 2 is divided by the separation gap G. Is possible. The diameter of the energizing probe 14 may be such that it can be brought into contact with the surface electrodes 2 located at both ends of the resistance element group.

Then, in this state, while passing a constant current between the pair of energizing probes 14, the voltage values between the respective resistors 3 are measured using the paired voltage measuring probes 13, and the measured voltage values are predetermined. The resistance value of each resistor 3 is adjusted by irradiating a laser beam from above the undercoat layer so as to have a value to form a trimming groove 7 in the resistor 3 (S-6 in FIG. 3). That is, the voltage measuring probe 13 has a function of conducting conduction between the surface electrodes 2 divided by the separation gap G, in addition to the original function of measuring the voltage value of the resistor 3.

In FIG. 4D, a total of seven contact points of the five voltage measuring probes 13 and the two energizing probes 14 are indicated by black circles, but in reality, a large number of voltage measuring probes are shown on a probe card (not shown). The probe 13 and a pair of energizing probes 14 located on both ends thereof are fixed in a row, and the voltage measuring probe 13 and the energizing probe 14 are arranged in the left-right direction in the drawing. At the same time. Then, by passing a constant current between the energizing probes 14 on both ends of the pair in this state, the constant current is passed through all the resistors 3 arranged between the energizing probes 14, and the paired voltage is applied. By sequentially measuring the voltage value between the measuring probes 13, the resistance value of each resistor 3 of the resistance element group arranged in a row along the extending direction of the secondary dividing groove 12 is adjusted, and then the probe is used. The card is moved downward in the drawing so as to perform the same resistance value adjustment as described above for each resistor 3 of another adjacent resistance element group via the secondary dividing groove 12.

After adjusting the resistance values of all the resistors 3 formed on the large-format substrate 10A in this way, an epoxy resin paste is screen-printed so as to cover the undercoat layer, and this is heat-cured and not shown. By forming the overcoat layer (S-7 in FIG. 3), a protective layer having a two-layer structure of an undercoat layer and an overcoat layer is formed.

After that, the large-format substrate 10A is primaryly divided into strip-shaped substrates along the primary division groove 11 (S-8 in FIG. 3). At that time, since the table electrode 2 is formed at a position separated from the primary dividing groove 11, and the conductive paste for forming the table electrode does not enter the primary dividing groove 11, the large-format substrate 10A is divided into the primary dividing groove 11. It is possible to easily break along No. 11, and it is possible to suppress deterioration of the break shape and undesired secondary cracking.

Next, Ni / Cr is sputtered on the divided surface of the strip-shaped substrate, or a resin paste containing Ag is applied to the divided surface of the strip-shaped substrate and heat-cured to cure the front and back surfaces of the strip-shaped substrate. By forming the strip-shaped substrate in a U-shaped cross section so as to wrap around the strip-shaped substrate, end face electrodes conducting between the front electrode 2 and the back electrode 5 are formed on both end faces of the strip-shaped substrate (S-9 in FIG. 3). At this time, since the table electrode 2 is not formed on the longitudinal side end portion (edge portion) of the strip-shaped substrate, burrs on the table electrode 2 do not occur during the primary division. Therefore, since the end portion of the strip-shaped substrate in the longitudinal direction is covered with the end face electrode formed after the primary division, the front electrode 2 does not break due to the peeling of the burr.

Next, the strip-shaped substrate is secondarily divided into a plurality of chip-shaped substrates along the secondary dividing groove 12 (S-10 in FIG. 3), and these chip-shaped substrates are electrolytically plated to form a Ni-plated layer. The Sn plating layer is sequentially formed (S-11 in FIG. 3). The Ni-plated layer and the Sn-plated layer form an external electrode that covers the surface of the end face electrode, and a large number of chip resistors 10 shown in FIGS. 1 and 2 are taken.

As described above, in the method for manufacturing the chip resistor 10 according to the present embodiment, the surface electrode 2 has a separation gap G divided across the primary dividing groove 11 of the large format substrate 10A. The conductive paste for forming the surface electrode does not flow out through the primary dividing groove 11 in the direction of the secondary dividing groove 12, and it is possible to prevent a short circuit between the adjacent table electrodes 2 via the secondary dividing groove 12. it can.

Then, in the step of adjusting the resistance value with respect to the resistance element group in which the adjacent surface electrodes 2 and the resistors 3 are alternately arranged along the extending direction of the secondary dividing groove 12 via the separation gap G. The voltage measuring probes 13 having a diameter larger than the separation gap G are brought into contact with all the surface electrodes 2 of the resistance element group, and the energizing probes 14 are brought into contact with the surface electrodes 2 located at both ends of the resistance element group. In this state, while passing a current between the pair of energizing probes 14, the voltage values between the resistors are measured by the pair of voltage measuring probes 13, respectively. The resistance value can be adjusted accurately and easily. Moreover, since the conductive paste does not enter the primary dividing groove 11, the large-format substrate 10A can be easily broken along the primary dividing groove 11 after adjusting the resistance value, resulting in deterioration of the break shape and an undesired secondary. Cracking can be suppressed.

In the above embodiment, the case where the resistance value is adjusted with respect to the resistance element group having the ten surface electrodes 2 and the four resistors 3 divided by the separation gap G has been described, but one resistor has been described. The number of surface electrodes and resistors possessed by the element group is not limited to the above embodiment, and for example, a resistor in which 12 surface electrodes 2 divided by a separation gap G and 5 resistors 3 are alternately arranged. It may be a group of elements.

1 Insulated substrate 2 Front electrode 3 Resistor 4 Protective layer 5 Back electrode 6 End face electrode 7 Trimming groove 10 Chip resistor 10A Large format board 11 Primary division groove 12 Secondary division groove 13 Voltage measurement probe 14 Energizing probe G Separation gap

Claims (1)

For a large-sized substrate having a plurality of primary dividing grooves and secondary dividing grooves extending in a grid pattern, and a chip forming region corresponding to one chip resistor is partitioned by the primary dividing groove and the secondary dividing groove. A plurality of resistors are formed so as to connect the steps of forming a pair of facing surface electrodes in each chip forming region at predetermined intervals and the facing surface electrodes in the chip forming region. With the process of
The front electrode has a separation gap that is divided across the primary division groove, and the front electrode and the resistor that are adjacent to each other through the separation gap are in the extending direction of the secondary division groove. In the process of adjusting the resistance value for the resistance element groups arranged alternately along the line,
A voltage measuring probe having a diameter larger than the separation gap is brought into contact with all the surface electrodes of the resistance element group, and an energizing probe is brought into contact with the front electrodes located at both ends of the resistance element group. ,
In this state, the resistance value of each resistor is adjusted while passing a current between the pair of energizing probes and measuring the voltage value between the resistors with each voltage measuring probe, and then the large-format substrate. A method for manufacturing a chip resistor, which comprises individualizing the chip into a single chip along the primary dividing groove and the secondary dividing groove.

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