JP2021029092A - Controller of power converter and control method of power converter - Google Patents

Abstract

To suppress level skipping of a phase voltage and a line voltage in a controller of a power converter.SOLUTION: A controller of a power converter outputting a gate signal based on a table in which a pulse pattern preliminarily prepared is stored, and driving a switching element of the power converter determines whether or not level skipping occurs in the pulse pattern, and stores the pulse pattern without the level skipping in the table. In the determination of the level skipping, when a phase width of switching of the same phase and a phase width of switching between phases in the pulse pattern are larger than a threshold value θskip, it is determined that no level skipping occurs.SELECTED DRAWING: Figure 4

Description

The present invention relates to a control device of a power conversion device, and more particularly to a voltage change rate suppression by level skipping.

Consider a system in which an input three-phase AC voltage is converted into a DC voltage by a rectifier (AC-DC converter), and the DC voltage is output as an AC voltage having a desired frequency and amplitude by an inverter.

In such a system, a standard is set for the output voltage. For example, there is a standard of IEC61800 for an electric motor drive system in which an electric motor (motor) is connected to a load. In IEC6184-4, the voltage stress tolerance is specified for the voltage change rate of the phase voltage (ground voltage) and the line voltage, and if this is not observed, there is a risk of dielectric breakdown in the system.

In this way, suppression of the rate of change in output voltage is required from the viewpoint of preventing system hazards, and in order to achieve this, it is essential to prevent sudden changes in the voltage levels of the phase voltage and line voltage.

Further, for the inverter output, a triangular wave comparison PWM that averagely expresses the target voltage in one carrier cycle is often used. However, a modulation method other than the triangular wave comparison PWM may be used for the purpose of optimizing the voltage output, and the fixed pulse pattern method is an example.

In this fixed pulse pattern method, the optimum pulse pattern for the evaluation index is derived in advance and tabulated, and switching is performed according to the table. Evaluation indexes include the number of switchings, voltage fundamental wave, and voltage harmonic.

Even in the fixed pulse pattern method, it is necessary to take measures against sudden voltage level changes in the phase voltage and line voltage. For example, Patent Document 1 is studying a method for deriving a pulse pattern in which the line voltage does not skip the level.

JP-A-2010-200537

Masahiko Tsukagoshi, Kouki Matsuse, "Derivation of Optimal Fixed Pulse Patterns Conforming to Harmonic Regulations for Large Capacity PWM Rectifiers", IEEJ Transactions D, 2011, Vol. 131, No. 3, p. 380-387

Patent Document 1 limits the two-stage change prevention target to the two-stage change from the maximum level of the line voltage to the third largest level. Moreover, the two-stage change of the phase voltage is not taken into consideration. The line voltage is limited by the rate of change rather than the absolute value as specified in IEC61800-4. Two-step changes in line voltage should be suppressed regardless of level.

In an inverter with 3 levels or more, there may be a two-stage change in phase voltage (voltage to ground). This cannot be ignored not only from the viewpoint of phase voltage but also from the viewpoint of line voltage. In the Y-connection load, if one phase changes by two stages and the other phase does not switch, the line voltage also changes by two stages. Therefore, even if the two-stage change of the phase voltage is allowed, it is necessary to monitor the two-stage change of the phase voltage in order to surely prevent the two-stage change of the line voltage.

Further, in Patent Document 1, a phase width is secured between switching in order to prevent a two-stage change, but a quantitative index for this phase width is not shown.

From the above, it is an issue to suppress the level skip of the phase voltage and the line voltage in the control device of the power conversion device.

The present invention has been devised in view of the above-mentioned conventional problems, and one aspect thereof is to output a gate signal based on a table in which a pulse pattern created in advance is stored, and to use a switching element of a power converter. It is a control device of the power conversion device to be driven, determines whether or not the pulse pattern is level skipped, stores the pulse pattern which is not level skipped in the table, and whether or not the level is skipped. In the determination, when the phase width of in-phase switching and the phase width of switching between phases in the pulse pattern are larger than the threshold value, it is characterized by having a pulse generation unit for determining that the level is not skipped.

Further, as one aspect thereof, the threshold value is characterized by the following equation (1).

θskip: Threshold f _use : Frequency at which the pulse pattern is used t ₁ : Maximum time width treated as level skip.

Further, as one aspect thereof, when the phase width of the in-phase switching in the pulse pattern is equal to or less than the threshold value, it is determined that the switching in the same direction is level skipped and the switching in the opposite direction is not level skipped. When the phase width of the switching between the phases in the pulse pattern is equal to or less than the threshold value, it is determined that the switching in the same direction is not level skipped and the switching in the opposite direction is level skipped. To do.

Further, as one aspect thereof, the pulse generation unit inputs an input pulse pattern derived based on a predetermined evaluation function, creates a virtual phase pulse pattern shifted by 120 ° from the input pulse pattern, and creates the input pulse pattern. The target switching is selected from the pattern, the first switching and the second switching closest to the phase and phase width of the target switching are searched from the input pulse pattern, and the phase and phase width of the target switching are searched for. Searches for the closest third switching and the second closest fourth switching from the pulse pattern of the virtual phase, and the phase width of the target switching and the first switching is larger than the threshold value, or the switching direction is opposite. In the case of the direction, the phase width of the target switching and the second switching is larger than the threshold value, or the switching direction is opposite, and the phase width of the target switching and the third switching is If it is larger than the threshold value or the switching directions are in the same direction, and the phase width of the target switching and the fourth switching is larger than the threshold value or the switching directions are in the same direction, there is no level skip. In other cases, it is determined that there is level skip, and if it is determined that there is no level skip, it is determined whether or not the level skip of all-phase switching that requires level skip determination in the input pulse pattern is determined. If the level skip of all-phase switching that requires the determination of level skip is not determined, it is necessary to return to the selection of the target switching and change the target switching to determine the level skip. When the level skip of switching of all phases is determined, it is determined that the input pulse pattern is not level skipped.

According to the present invention, it is possible to suppress level skipping of phase voltage and line voltage in the control device of the power conversion device.

The schematic diagram which shows the system configuration of the power conversion apparatus in embodiment. The flowchart which shows the pulse pattern derivation processing in embodiment. The schematic diagram which shows the example of adoption / non-adoption of a pulse pattern. The flowchart which shows the process of the level skip determination in an embodiment. The schematic diagram which shows the relationship between the switching judgment target and level skip. The schematic which shows the relationship between a switching direction and a level skip.

Hereinafter, embodiments of the control device for the power conversion device according to the present invention will be described in detail with reference to FIGS. 1 to 6.

[Embodiment]
Hereinafter, the n-step change (n> 2) of the voltage level is referred to as level skip.

FIG. 1 shows a system configuration diagram of the power conversion device according to the present embodiment. The control performed by the upper control unit 1 is the control performed upstream of the pulse generation unit 2. The upper control unit 1 performs control such as generating a modulation factor and a phase command through speed control and current control based on, for example, a speed command based on the operation panel operation amount of the system and a detected value of a three-phase current.

The pulse generation unit 2 inputs the modulation factor and the phase from the upper control unit 1, and refers to the table based on the information to generate the pulse. Information on the pulse pattern created in advance is stored in the table, and the current level can be determined from the information on the modulation factor and phase. A gate signal is output from the pulse generation unit 2, thereby driving the switching element of the inverter INV (power conversion device). A load 3 such as a motor is connected to the inverter INV, and a voltage corresponding to the gate signal is applied to the load 3.

FIG. 1 shows a typical system configuration example of power conversion by the fixed pulse pattern method, and the application target of the present invention is not limited to this. For example, in a converter (power conversion device) that regenerates a power supply, switching may be performed based on a table of pulse patterns derived in advance. The important thing is to drive the power converter using a table of pulse patterns created in advance.

FIG. 2 shows a flowchart of the pulse pattern derivation (table creation) process performed by the pulse generation unit 2.

First, in S1, the target modulation factor is input. Next, in S2, the pulse pattern initial value (voltage phase) is set, and the fundamental wave and harmonic reference are set. In S3, the pulse pattern is derived. In S4, it is determined whether or not the level is skipped, and if the level is skipped, the process returns to S2. If the level is not skipped, the pulse pattern is adopted, stored in the table, and the process is terminated. ..

The important point in FIG. 2 is that the pulse pattern is derived by incorporating whether or not the level is skipped into the evaluation index, and the evaluation timing of whether or not the level is skipped or when it is determined that there is a level skip. The subsequent processing of the above may be a processing procedure different from that shown in FIG.

By deriving a pulse pattern according to the flowchart of FIG. 2 and storing it in a table and generating a pulse using the table of the pulse pattern, it is possible to prevent level skipping in the fixed pulse pattern method.

The operation of the flowchart of FIG. 2 will be described.
1: The pulse pattern is derived using the initial value (voltage phase) of the pulse pattern, the fundamental voltage wave, the harmonic reference, and the like as evaluation indexes (S1 to S3).
2: It is determined whether or not the derived pulse pattern skips the level (S4).
(A) If there is a level skip, the process returns to S2, the initial value (voltage phase) of the pulse pattern is adjusted, and the pulse pattern is redistributed (returns to 1).
-(B) If the level is not skipped, the pulse pattern is adopted. With the above operation, a pulse pattern that does not skip the level can be derived.

FIG. 3 shows an example of adoption / non-adoption of the pulse pattern. As shown in FIG. 3, when the switching phase width is small, it is treated as a pseudo two-stage change (level skip), so that pulse pattern is not adopted and the pulse pattern is redistributed. When the phase width of switching is large, the pulse pattern is adopted because it does not result in a two-step change (level skip).

Reference numeral 1 denotes a general pulse pattern derivation performed by the fixed pulse pattern method. In Non-Patent Document 1, a combination of phases that minimizes the current harmonic while keeping the voltage fundamental wave at the target modulation factor based on the settings such as the number of switchings, the switching direction (pulse shape), and the harmonic order to be considered. The derivation method of searching for is shown.

1 means to derive a pulse pattern according to the derivation method of Non-Patent Document 1. Since the derivation of the pulse pattern is not directly related to the present invention, detailed description thereof will be omitted. However, the method for deriving the pulse pattern is not limited to the method of Non-Patent Document 1, and the pulse pattern may be derived based on a desired method and a desired evaluation function.

Reference numeral 2 denotes a determination as to whether or not the derived pulse pattern skips the level, which is a feature of the present invention. By determining whether or not the level is skipped and adopting only the pulse pattern that is not level skipped, it is possible to create a pulse pattern table that does not skip the level at the time of voltage output. A specific method for determining whether or not the level is skipped is shown in FIG. 4 and will be described later.

Although the level skip is determined after the pulse pattern is derived to simplify the flowchart, the processing procedure is not limited to this. The important point is that whether or not level skipping is added to the evaluation function when deriving the pulse pattern. For example, after determining level skipping, it is necessary to determine whether or not the voltage harmonic is below the reference value. Derivation procedure may be used.

Further, regarding 2 (A), the initial value (voltage phase) of the pulse pattern is adjusted and redistributed, but the method is not limited to this as long as it can be corrected to a pulse pattern that does not skip the level. For example, a method in which the interval of the switching phase in which the level is skipped is widened to the extent that the level is skipped without re-deriving by returning to 1, and the other phases are adjusted so as to satisfy the voltage fundamental wave reference. Can be considered. The above is the description of the flowchart of FIG.

FIG. 4 shows a flowchart for level skip determination. FIG. 4 shows in detail the process of the level skip determination in S4 of FIG. Information on the switching phase and level of the pulse pattern is input to the flowchart for level skip determination. The output is the result of determining whether or not the level is skipped.

First, in S11, the pulse pattern derived in S3 of FIG. 2 is input. Here, this pulse pattern is referred to as an input pulse pattern. Further, the table of switching phases in the input pulse pattern is θu, and the table of switching directions is Su.

In S12, a pulse pattern of a virtual V phase (virtual phase) shifted by 120 ° from the input pulse pattern is created. Here, the table of the switching phase in the pulse pattern of the virtual V phase is θv, and the table of the switching direction is Sv.

In S13, one index (switching) is selected from the input pulse pattern and set as A. Here, let θ [A] be the switching phase of the target of the input pulse pattern.

In S14, the absolute value of the difference between the target switching phase θ [A] and the switching phase other than the target switching of the input pulse pattern is taken. Here, the index (switching) having the smallest absolute value of the phase difference is referred to as the first switching iu1, and the index (switching) having the second smallest absolute value of the phase difference is referred to as the second switching iu2. Further, the phase of the first switching iu1 is θu [iu1], and the phase of the second switching iu2 is θu [iu2].

In S15, the absolute value of the phase difference of the switching phase θ [A] of the target switching and the switching of the pulse pattern of the virtual V phase is taken. Here, the index (switching) having the smallest absolute value of the phase difference is referred to as the third switching iv1, and the index (switching) having the second smallest absolute value of the phase difference is referred to as the fourth switching iv2. Further, the phase of the third switching iv1 is θv [iv1], and the phase of the fourth switching iv2 is θv [iv2].

In S16, the following four determinations are made.
It is determined whether or not abs (θu [iu1] −θ [A])> θskip or Su [iu1] * Su [A] = -1.
-Abs (θu [iu2] -θ [A])> θskip, or Su [iu2] * Su [A] = -1 or not.
-Abs (θv [iv1] -θ [A])> θskip, or Sv [iv1] * Su [A] = 1 or not is determined.
It is determined whether or not abs (θv [iv2] −θ [A])> θskip or Sv [iv2] * Su [A] = 1.

If all of the above four conditions are met, the process proceeds to S17. If any of the above four conditions does not apply, it is judged that there is a level skip. In addition, abs indicates an absolute value, and θskip indicates a threshold value of a phase difference. Su [iu1], Su [iu2], Sv [iv1], Sv [iv2], Su [A] indicate the switching direction of the first switching, the second switching, the third switching, the fourth switching, and the target switching. ..

In S17, it is determined whether or not the indexes (switching) of all the phases in the input pulse pattern have been determined. If all the indexes have not been determined, the process returns to S13 to change the target switching, and if the indexes of all phases are determined, it is determined that there is no level skip in the input pulse pattern and the process ends. Use the same pattern for each phase.

The operation of the flowchart of FIG. 4 will be described.
1. 1. A virtual V phase is generated to determine the level skip of the line voltage (S12).
2. 2. In the input pulse pattern and the virtual V-phase pulse pattern, the switching whose phase width is close to that of the target switching is searched for (S14, S15).
3. 3. If either of the following is satisfied for switching having a close phase width, it is determined that there is no level skip (S16).
-The phase width is larger than the threshold θskip treated as a level skip.
-A combination in which the switching direction is not treated as a level skip.
4. If there is no level skip, 2. Return to change the target switching (S17).

With the above operation, it can be determined whether or not the pulse pattern is level skipped. In FIG. 4, although there are some processes that do not appear in the above steps 1 to 4, S11 is the input and definition of the table value of the derived pulse pattern, and S13 is the index selection and definition of the target switching phase table.

1. 1. Is a preparatory process for considering the level skip of the line voltage. When deriving a pulse pattern, it is usually generated as a single-phase pulse pattern. In FIG. 3, the input pulse pattern is treated as the U phase for convenience, and the variable names are determined accordingly.

However, as it is, only the level skip of the phase voltage can be evaluated, so it is necessary to consider switching of another phase. In the present embodiment, as in S12, a virtual V phase is created by shifting the virtual V phase by 120 °, and it is confirmed whether or not there is a level skip for the virtual V phase.

The reason for shifting by 120 ° is that it is premised on three-phase equilibrium, and if there is no three-phase equilibrium or if it is not three-phase, it is necessary to perform a shifting method that meets the conditions. With three-phase equilibrium in mind, by examining the U phase and the virtual V phase, all line level skips are considered from the viewpoint of symmetry. That is, it is not necessary to create a virtual W phase.

2. 2. Is a process of creating switching candidates that are likely to skip levels. It is necessary to confirm the level skip up to the second closest phase. This is a measure against the case where the target switching is inside a small pulse of another phase as shown in FIG.

In FIG. 5, the target switching of the U phase and the switching having the smallest phase width have a phase width of the threshold value θskip or less, but the U phase and the virtual V phase are switched in the same direction, so that the level is not skipped. Judged and allowed.

The switching of the target of the U phase and the switching with the second smallest phase width are said to be level skipped because the phase width is equal to or less than the threshold value θskip and the U phase and the virtual V phase are switched in opposite directions. Judged and prohibited.

From FIG. 5, it can be seen that if the determination is made by looking only at the switching having the minimum phase width with respect to the target switching, it is adopted even though the line-to-line level skip occurs.

Therefore, in S14 and S15 of FIG. 4, the first switching and the second switching, which have the smallest absolute value of the phase difference from the target switching phase θ [A] in the input pulse pattern, are adopted, and the virtual V is adopted. In the pulse pattern of the phase, the third switching having the smallest absolute value of the phase difference from the phase θ [A] of the target switching and the fourth switching having the second smallest value are adopted. The idea of deriving the threshold value θskip and the switching direction is 3. Will be described in the explanation of.

3. 3. For, 2. This is the level skip determination process for the candidates created in. In the above, the following two criteria were used. They are referred to as the determination of the phase width and the determination of the switching direction, respectively.
-The phase width is larger than the standard treated as a level skip.
-A combination in which the switching direction is not treated as a level skip.

The determination of the phase width is a determination regarding the horizontal axis (time axis) of the voltage change rate. As described above, if the voltage change rate is an evaluation standard for safety and the switching time width is far enough from switching to not be treated as a pseudo two-step change, it can be treated as not skipping the level.

However, the derivation of the pulse pattern is generally performed on the phase axis, and the phase width and the time width cannot be directly compared. Therefore, we will determine the relationship between phase and time by assuming a frequency that uses a pulse pattern.

The frequency at which the pulse pattern is used is defined as fuse [Hz]. Regarding this frequency fuse, if the system operation method is CVCF (Constant Voltage Constant Frequency), the frequency fuse is fixed, and if it is VVVF (Variable Voltage Variable Frequency) by V / f control, the pulse pattern is the target of the pulse pattern. Is uniquely determined.

However, in the case of VVVF by vector control, the frequency fuse cannot be uniquely determined because the relationship between voltage and frequency becomes fluid. However, the higher the frequency, the shorter the time width of the same phase width. Therefore, if the highest frequency that can be used is set to the frequency fuse, level skipping can be prevented in the entire frequency range. For example, the range of the frequency to be used may be assumed according to the target modulation factor, and the upper limit of the frequency to be used may be set to the frequency fuse. If the range of frequencies to be used cannot be determined, the highest frequency in the specifications may be the frequency fuse.

The maximum time width treated as a level skip is t ₁ [s]. The time width t ₁ is set based on the DC voltage value of the inverter INV and the voltage change rate prevention standard so that level skipping can be prevented if _{the switching interval is kept larger than the time width t 1.} The time width t ₁ is set to a value several μs larger than the dead time, for example.

The maximum phase width (threshold value) θskip treated as a level skip is derived based on the set frequency fuse [Hz] and time width t _{1 [s].} Since the angular frequency at the frequency f [Hz] is 2πf [rad / s], the maximum phase width (threshold value) θskip treated as a level skip is expressed by Eq. (1).

The phase width (threshold value) θskip derived by the equation (1) is used in S16 of FIG. 4 to determine the phase width. 2. 2. For the switching phase of the level skip candidate obtained in step 2 and the target switching phase, take the absolute value of the difference and compare the magnitude relationship with the phase width θskip. If the absolute value of the difference is larger than the threshold value θskip, there is a sufficient phase width. Can be regarded as. If there is a sufficient phase width, it is determined that level skipping does not occur for the target switching and the candidate switching. Of the equations in S16 in FIG. 4, the part of equation (2) and the equation in which iu1 is appropriately changed from equation (2) to iu2, iv1 and iv2 correspond to the determination of the phase width.

Although omitted in FIG. 4, since the last switching of the pulse pattern table is connected to the first switching after one cycle, it is necessary to be careful not to forget to check the phase width.

Next, the determination of the switching direction will be described. To that end, I would like to first annotate the term switching direction. As used herein, the switching direction refers to the direction in which the output voltage level changes to positive or negative due to the switching. For example, switching in which the output voltage is +2 → +3, -1 → 0, −8 → −7 is the positive direction, and the direction in which the output voltage is +4 → +3, + 1 → 0, -2 → -3 is the negative direction. In this specification, the level change in the switching phase is represented by the switching direction, and the table is designated as S. As for the value stored in the table S, +1 is assumed in the positive direction and -1 is assumed in the negative direction.

Here, consider a pulse shape that causes level skipping. FIG. 6 shows an example of the pulse type. As shown in FIG. 6, when two continuous switchings are performed in the same direction in the same phase, the phase voltage may be level skipped. If the two phases are switched in opposite directions between the phases, the line voltage may skip the level. On the contrary, switching in the opposite direction of the same phase and switching of the two phases in the same direction between the phases do not change the phase voltage and the line voltage in two stages, and cannot be a level skip. Therefore, depending on the switching direction, it can be determined that there is no level skip for the candidate regardless of the phase width.

In S16 of FIG. 4, utilizing the fact that the product is 1 if the two switches are in the same direction and -1 if the two switches are in the opposite direction, if the switching is in the opposite direction in the same phase, and the switching is between the phases. If it is in the same direction, it is judged that it is not a level skip. Of the equations in S16 of FIG. 4, the part of equation (3) and the equation in which iu1 is appropriately changed to iu2, iv1, iv2 from the equation (3) and the sign of -1 is appropriately changed correspond to the determination of the switching direction. ..

It should be noted that this determination does not have to be a table in the switching direction, but the same contents may be compared according to the table operation method such as a magnitude relation comparison using a table of the voltage level after switching.

In S16, if it is found that there is no level skip in either the phase width determination or the switching direction determination, the determination may be made without the level skip. Therefore, the two determination equations (2) and (3) are || It is connected by (OR operator). The following formula is also connected by the OR operator, but it is necessary to confirm that all the judgment targets are not level skipped, so they are connected by && (AND operator). If there is no level skip in both the phase and line voltage, the output of the if statement in S16 is 1 (yes).

4. As shown in S17 of FIG. 4, the loop processing is performed so as to confirm the level skip in all the switching phases. All the phases are all the phases necessary for confirming the level skip, and the search of all the table values may not be performed in consideration of symmetry, and the number of searches may be reduced as appropriate.

The above is the description of the operation of the flowchart of FIG. 4, and the level skip can be determined by this.

As shown above, according to the present embodiment, a pulse pattern without level skipping is derived based on FIGS. 1, 2 and 4, and a fixed pulse pattern method pulse is generated by the pattern. It is possible to perform control that suppresses the level skip of the phase voltage and the level skip of the line voltage.

In the conventional fixed pulse pattern method, the switching phase is determined in consideration of the voltage fundamental wave and the voltage (or current) harmonic. However, the switching phase may be too close to each other under the above conditions alone, and the change may occur in two stages at a time, or the change in each stage may occur twice in a short period of time, resulting in a pseudo two-stage change. If a two-stage change is applied to the motor, it causes dielectric breakdown, so countermeasures are required.

For example, hardware measures such as maintaining a sufficient dielectric strength and providing an output dv / dt filter are known, but these measures also have disadvantages such as increased cost and larger equipment. In the present embodiment, it is possible to maintain the phase width when deriving the pulse pattern as a software measure and suppress the two-step change.

Further, as compared with Patent Document 1, there are advantages that the phase voltage is taken into consideration, the level to be prevented from level skip is not limited, and the phase width to be secured is quantitatively shown.

Although the above description has been made in detail only with respect to the specific examples described in the present invention, it is clear to those skilled in the art that various modifications and modifications can be made within the scope of the technical idea of the present invention. It goes without saying that such modifications and modifications fall within the scope of claims.

1 ... Upper control unit 2 ... Pulse generation unit 3 ... Load INV ... Inverter θskip ... Threshold

Claims (5)

It is a control device of a power converter that outputs a gate signal based on a table in which a pulse pattern created in advance is stored and drives a switching element of the power converter.
It is determined whether or not the pulse pattern is level skipped, the pulse pattern which is not level skipped is stored in the table, and in determining whether or not the level is skipped, in-phase switching in the pulse pattern is performed. A control device for a power conversion device, which comprises a pulse generating unit for determining that level skipping is not performed when the phase width of the above and the phase width of switching between phases are larger than the threshold value. The control device for a power conversion device according to claim 1, wherein the threshold value is the following equation (1).

θskip: Threshold f _use : Frequency at which the pulse pattern is used t ₁ : Maximum time width treated as level skip When the phase width of the in-phase switching in the pulse pattern is equal to or less than the threshold value, it is determined that the switching in the same direction is level skipped, and it is determined that the switching in the opposite direction is not level skipped.
When the phase width of switching between phases in the pulse pattern is equal to or less than the threshold value, it is determined that switching in the same direction is not level skipped, and it is determined that switching in the opposite direction is level skipped. The control device of the power conversion device according to item 1 or 2. The pulse generator
Input the input pulse pattern derived based on the predetermined evaluation function, and
A virtual phase pulse pattern shifted by 120 ° from the input pulse pattern is created.
Select the target switching from the input pulse pattern and select it.
The first switching having the closest phase and the phase width of the target switching and the second switching having the closest phase width are searched from the input pulse pattern.
The third switching and the fourth switching, which are the closest to the phase and the phase width of the target switching, are searched from the pulse pattern of the virtual phase.
When the phase width of the target switching and the first switching is larger than the threshold value, or the switching direction is opposite.
When the phase width between the target switching and the second switching is larger than the threshold value or the switching direction is opposite.
When the phase width of the target switching and the third switching is larger than the threshold value or the switching directions are the same.
Further, when the phase width of the target switching and the fourth switching is larger than the threshold value or the switching directions are the same, it is determined that there is no level skip, and in other cases, it is determined that there is a level skip.
If it is determined that there is no level skip, it is determined whether or not the level skip of all-phase switching that requires level skip determination is determined in the input pulse pattern, and all-phase switching that requires level skip determination is determined. If the level skip of the target is not determined, the switching of the target is changed by returning to the selection of the switching of the target, and if the level skip of the switching of all phases that requires the determination of the level skip is determined, the input is described. The control device for a power conversion device according to any one of claims 1 to 3, wherein it is determined that the pulse pattern does not skip the level. It is a control method of a power conversion device that outputs a gate signal based on a table in which a pulse pattern created in advance is stored and drives a switching element of the power conversion device.
The pulse generation unit determines whether or not the pulse pattern is level skipped, stores the pulse pattern that is not level skipped in the table, and determines whether or not the level is skipped. A control method of a power conversion device, which determines that level skipping is not performed when the phase width of in-phase switching and the phase width of switching between phases in a pattern are equal to or larger than a threshold value.

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