JP2020155698A - Silicon carbide semiconductor device - Google Patents

Abstract

To provide a silicon carbide semiconductor device in which a charge trap center is reduced at the interface between a silicon carbide substrate and a gate insulating film.SOLUTION: A silicon carbide semiconductor device includes a silicon carbide substrate, a gate insulating film of silicon oxide provided on the silicon carbide substrate, and a gate electrode provided on the gate insulating film. There is interposed, between the silicon carbide substrate and the gate insulating film, a transition region where the composition ratio of at least carbon, silicon and oxygen fluctuates. A first boundary on a silicon carbide substrate side in the transition region is located in a position where the ratio of carbon and silicon is 1:1, nitrogen is distributed between the silicon carbide substrate and the gate insulating film, and the first boundary in the transition region is not located on the silicon carbide substrate side beyond the range where the nitrogen is distributed.SELECTED DRAWING: Figure 3

Description

The techniques disclosed herein relate to silicon carbide semiconductor devices.

Development of a silicon carbide semiconductor device equipped with an insulating gate is underway. The insulating gate is formed by forming a gate insulating film on a silicon carbide substrate and forming a gate electrode on the gate insulating film.

In such a silicon carbide semiconductor device, a transition region is interposed between the silicon carbide substrate and the gate insulating film. The transition region is a region in which at least the composition ratio of carbon, silicon, and oxygen fluctuates, and the carbon constituting the silicon carbide substrate is diffused, and the oxygen constituting the gate insulating film and the oxygen mixed in the manufacturing process are diffused. Is. It is known that the carbon contained in such a transition region serves as a charge trap center, reduces the movable carrier density, and lowers the channel mobility. Therefore, in order to suppress the decrease in channel mobility, a technique for performing nitriding treatment after forming a gate insulating film on a silicon carbide substrate has been developed, and an example thereof is disclosed in Patent Document 1.

Japanese Patent No. 5608840

According to the studies by the present inventors, it has been found that the oxygen contained in the transition region also becomes the center of the charge trap and reduces the movable carrier density to reduce the channel mobility. An object of the present specification is to provide a silicon carbide semiconductor device in which the charge trap center is reduced at the interface between the silicon carbide substrate and the gate insulating film.

One embodiment of the silicon carbide semiconductor device disclosed in the present specification is a silicon carbide substrate, a silicon oxide gate insulating film provided on the silicon carbide substrate, and a gate provided on the gate insulating film. It can be equipped with an electrode. Examples of the silicon carbide semiconductor device disclosed in the present specification include MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) and IGBTs (Insulated Gate Bipolar Transistor). Further, the insulating gate having the gate insulating film and the gate electrode may be a planar type provided on the surface of the silicon carbide substrate, or may be a trench type provided in the trench of the surface layer portion of the silicon carbide substrate. .. In this silicon carbide semiconductor device, a transition region in which at least the composition ratio of carbon, silicon, and oxygen fluctuates is interposed between the silicon carbide substrate and the gate insulating film. The first boundary of the transition region on the silicon carbide substrate side is a position where the ratio of carbon to silicon is 1: 1. Nitrogen is distributed between the silicon carbide substrate and the gate insulating film. The first boundary of the transition region is not located on the silicon carbide substrate side beyond the range in which the nitrogen is distributed. The transition region of the silicon carbide semiconductor device is a region in which carbon constituting the silicon carbide substrate is diffused, oxygen constituting the gate insulating film, and oxygen mixed during the manufacturing process are diffused. In this silicon carbide semiconductor device, the first boundary of the transition region on the silicon carbide substrate side is configured so as not to be located on the silicon carbide substrate side beyond the range in which the nitrogen is distributed. Has been done. That is, the oxygen diffused from the gate insulating film and the oxygen mixed in during the manufacturing process do not exist in the silicon carbide substrate beyond the range in which the nitrogen is distributed. As a result, in the silicon carbide semiconductor device, the charge trap center is reduced at the interface between the silicon carbide substrate and the gate insulating film.

In the silicon carbide semiconductor device of the above embodiment, the second boundary of the transition region on the gate insulating film side may be at a position where the ratio of oxygen to silicon is 2: 1. In this case, the second boundary of the transition region is not located on the gate insulating film side beyond the range in which the nitrogen is distributed. That is, the carbon diffused from the silicon carbide substrate does not exist in the gate insulating film beyond the range in which the nitrogen is distributed. As a result, in the silicon carbide semiconductor device, the charge trap center is reduced at the interface between the silicon carbide substrate and the gate insulating film.

The cross-sectional view of the main part of the silicon carbide semiconductor device of this embodiment is schematically shown. A cross-sectional view of an enlarged main part near the interface between the silicon carbide substrate and the gate insulating film of the silicon carbide semiconductor device of the present embodiment is schematically shown. The distribution of the element composition ratio between the silicon carbide substrate and the gate insulating film of the silicon carbide semiconductor device of this embodiment is shown. The distribution of the element composition ratio between the silicon carbide substrate and the gate insulating film of the silicon carbide semiconductor device of the comparative example is shown. The relationship between the surface carrier density and the effective mobility at the interface between the silicon carbide substrate and the gate insulating film of each of the present embodiment and the comparative example is shown. The manufacturing flow for manufacturing the silicon carbide semiconductor device of this embodiment is shown. The cross-sectional view of the main part in one manufacturing process of the silicon carbide semiconductor device of this embodiment is schematically shown. The cross-sectional view of the main part in one manufacturing process of the silicon carbide semiconductor device of this embodiment is schematically shown. The cross-sectional view of the main part in one manufacturing process of the silicon carbide semiconductor device of this embodiment is schematically shown. The cross-sectional view of the main part in one manufacturing process of the silicon carbide semiconductor device of this embodiment is schematically shown.

As shown in FIG. 1, the silicon carbide semiconductor device 1 is a power semiconductor element called a MOSFET, and is a silicon carbide substrate 10, a drain electrode 22 that covers the back surface of the silicon carbide substrate 10, and a surface of the silicon carbide substrate 10. A source electrode 24 that covers a part of the silicon carbide substrate 10, a planar type insulating gate 30 provided on a part of the surface of the silicon carbide substrate 10, and an interlayer insulating film 40 provided on the silicon carbide substrate 10 are provided. There is. The silicon carbide substrate 10 has an n ⁺ type drain region 11, an n ⁻ type drift region 12, a p-type body region 13 and an n ⁺ type source region 14.

The drain region 11 is arranged on the back layer portion of the silicon carbide substrate 10 and is provided at a position exposed on the back surface of the silicon carbide substrate 10. The drain region 11 is also a base substrate for epitaxially growing the drift region 12 described later. The drain region 11 is in ohmic contact with the drain electrode 22 that coats the back surface of the silicon carbide substrate 10.

The drift region 12 is provided on the drain region 11 and has a JFET portion 12a in contact with a part of the bottom surface of the insulating gate 30. The drift region 12 is formed by crystal growth from the surface of the drain region 11 using an epitaxial growth technique.

The body region 13 is formed on the drift region 12, is arranged on the surface layer portion of the silicon carbide substrate 10, and is provided at a position exposed on the surface of the silicon carbide substrate 10. The body region 13 is arranged with the JFET portion 12a of the drift region 12 in between. The body region 13 is formed by introducing aluminum into the surface layer portion of the silicon carbide substrate 10 by utilizing the ion implantation technique. The body region 13 is in ohmic contact with the source electrode 24 that coats the surface of the silicon carbide substrate 10.

The source region 14 is formed on the body region 13, is arranged on the surface layer portion of the silicon carbide substrate 10, and is provided at a position exposed on the surface of the silicon carbide substrate 10. The source region 14 is separated from the drift region 12 by the body region 13. The source region 14 is formed by introducing nitrogen or phosphorus into the surface layer portion of the silicon carbide substrate 10 by utilizing an ion implantation technique. The source region 14 is in ohmic contact with the source electrode 24 that coats the surface of the silicon carbide substrate 10.

The insulating gate 30 is provided on a part of the surface of the silicon carbide substrate 10, and has a gate insulating film 32 of silicon oxide (SiO ₂ ) and a gate electrode 34 of polysilicon. The gate insulating film 32 is provided on the surface of the silicon carbide substrate 10 and is in contact with the surface of the silicon carbide substrate 10. The gate electrode 34 is provided on the surface of the gate insulating film 32 and is in contact with the gate insulating film 32. The gate electrode 34 faces the body region 13 between the source region 14 and the JFET portion 12a of the drift region 12 via the gate insulating film 32. As described above, in the silicon carbide semiconductor device 1, the body region 13 between the source region 14 and the JFET portion 12a of the drift region 12 serves as a channel.

The silicon carbide semiconductor device 1 generates an inversion layer in the body region 13 between the source region 14 and the JFET portion 12a of the drift region 12 based on the gate voltage applied to the gate electrode 34, and the drain electrode 22 and the source electrode 24 It can operate to control the on / off of continuity between.

FIG. 2 schematically shows a cross-sectional view of an enlarged main part in the vicinity of the interface between the silicon carbide substrate 10 and the gate insulating film 32. As shown in FIG. 2, a transition region 50 is interposed between the silicon carbide substrate 10 and the gate insulating film 32. The transition region 50 is a region in which the composition ratio of carbon (C), silicon (Si), and oxygen (O) fluctuates, and the carbon constituting the silicon carbide substrate 10 diffuses and constitutes the gate insulating film 32. This is the region where oxygen and oxygen mixed during the manufacturing process are diffused.

FIG. 3 shows the results of analysis of the composition ratios of the constituent elements near the interface between the silicon carbide substrate 10 and the gate insulating film 32 using electron energy loss spectroscopy (EESL). Here, the side indicated as SiC corresponds to the side where the silicon carbide substrate 10 exists, and the side indicated as SiO ₂ corresponds to the side where the gate insulating film 32 exists.

As shown in FIG. 3, a transition region 50 in which the composition ratio of carbon, silicon, and oxygen fluctuates exists between the silicon carbide substrate 10 and the gate insulating film 32. The boundary of the transition region 50 on the silicon carbide substrate 10 side is defined as a position where the ratio of carbon to silicon is 1: 1. The boundary of the transition region 50 on the gate insulating film 32 side is defined as a position where the ratio of oxygen to silicon is 2: 1.

As shown in FIG. 3, nitrogen is distributed and exists between the silicon carbide substrate 10 and the gate insulating film 32. This nitrogen is introduced by the nitriding treatment carried out after the gate insulating film 32 is formed, as will be described in the manufacturing method described later. Here, the distribution range of nitrogen is defined as a range in which the nitrogen concentration is 0.01 or more as an atomic ratio. Alternatively, the distribution range of nitrogen showing a normal distribution is defined as a 3σ interval. Further, the peak position of nitrogen coincides with the intermediate point of the transition region 50.

As shown in FIG. 3, in the silicon carbide semiconductor device 1 of the present embodiment, the transition region 50 exists so as to be within the distribution range of nitrogen. Specifically, the boundary on the silicon carbide substrate 10 side of the transition region 50 is not located on the silicon carbide substrate 10 side beyond the distribution range of nitrogen, and is on the gate insulating film 32 side of the transition region 50. The boundary exceeds the distribution range of nitrogen and is not located on the gate insulating film 32 side.

FIG. 4 shows the results of the composition ratios of the constituent elements of the comparative example. There is no difference in the distribution range of nitrogen between this embodiment and the comparative example. On the other hand, in the comparative example, the width of the transition region is wide, and the transition region exists beyond the distribution range of nitrogen.

FIG. 5 shows the relationship between the surface carrier density and the effective mobility at the interface between the silicon carbide substrate and the gate insulating film of each of the present embodiment and the comparative example. It is known that the larger the effective mobility, the larger the drain current and the smaller the on-resistance. As shown in FIG. 5, in this embodiment, the effective mobility is remarkably increased as compared with the comparative example. From this, the silicon carbide semiconductor device 1 of the present embodiment can have an extremely low on-resistance.

Such a difference in effective mobility is inferred as follows. In the comparative example, the transition region exists beyond the distribution range of nitrogen. Therefore, oxygen exists on the silicon carbide substrate side beyond the distribution range of nitrogen, and carbon exists on the gate insulating film side beyond the distribution range of nitrogen. It is considered that these oxygen and carbon serve as the center of the charge trap, the movable carrier density decreases, and the effective mobility decreases. On the other hand, in the present embodiment, the transition region exists within the distribution range of nitrogen. It is considered that this reduces the center of the charge trap, suppresses the decrease in the movable carrier density, and suppresses the decrease in the effective mobility.

Next, a method for manufacturing the silicon carbide semiconductor device 1 will be described with reference to FIGS. 6 to 10. First, as shown in FIG. 7, the silicon carbide substrate 10 is prepared (step S1 in FIG. 6). The silicon carbide substrate 10 is prepared by crystal growing the drift region 12 from the surface of the drain region 11 by utilizing an epitaxial growth technique. Next, the body region 13 and the source region 14 are formed on the surface layer portion of the silicon carbide substrate 10 by using the ion implantation technique (step S2 in FIG. 6).

Next, as shown in FIG. 8, a sacrificial oxide film 60 is formed on the surface of the silicon carbide substrate 10 (step S3 in FIG. 6). The sacrificial oxide film 60 is formed by oxidizing the surface of the silicon carbide substrate 10 by using a thermal oxidation technique. By adjusting the conditions (temperature, time, atmosphere) when the sacrificial oxide film 60 is formed, the amount of oxidation introduced into the surface of the silicon carbide substrate 10 is adjusted, and by extension, oxygen in the transition region 50 is formed. The distribution is adjusted.

Next, as shown in FIG. 9, after removing the sacrificial oxide film 60 by using an etching technique (step S4 in FIG. 6), a gate insulating film 32 is applied to the surface of the silicon carbide substrate 10 by using a deposition technique. (Step S5 in FIG. 6). Next, nitriding treatment is performed in an atmosphere of nitric oxide (step S6 in FIG. 6), and nitrogen is introduced between the silicon carbide substrate 10 and the gate insulating film 32.

Next, as shown in FIG. 10, an interlayer insulating film is formed on the silicon carbide substrate 10 by using a deposition technique (step S7 in FIG. 6). Finally, the drain electrode 22 is formed on the back surface of the silicon carbide substrate 10 and the source electrode 24 penetrating the interlayer insulating film 40 is formed (step S8 in FIG. 6) to complete the silicon carbide semiconductor device 1.

Although specific examples of the present invention have been described in detail above, these are merely examples and do not limit the scope of claims. The techniques described in the claims include various modifications and modifications of the specific examples illustrated above. In addition, the technical elements described in the present specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the techniques illustrated in the present specification or drawings can achieve a plurality of purposes at the same time, and achieving one of the purposes itself has technical usefulness.

1: Silicon carbide semiconductor device, 10: Silicon carbide substrate, 11: Drain region, 12: Drift region, 12a: JFET section, 13: Body region, 14: Source region, 22: Drain electrode, 24: Source electrode, 30: Insulated gate, 32: Gate insulating film, 34: Gate electrode, interlayer insulating film: 40, 50: Transition region

Claims (2)

Silicon carbide semiconductor device
Silicon carbide substrate and
The silicon oxide gate insulating film provided on the silicon carbide substrate and
It is provided with a gate electrode provided on the gate insulating film.
A transition region in which at least the composition ratio of carbon, silicon, and oxygen fluctuates is interposed between the silicon carbide substrate and the gate insulating film.
The first boundary of the transition region on the silicon carbide substrate side is a position where the ratio of carbon to silicon is 1: 1.
Nitrogen is distributed between the silicon carbide substrate and the gate insulating film.
A silicon carbide semiconductor device in which the first boundary of the transition region is not located on the silicon carbide substrate side beyond the range in which the nitrogen is distributed. The second boundary on the gate insulating film side of the transition region is a position where the ratio of oxygen to silicon is 2: 1.
The silicon carbide semiconductor device according to claim 1, wherein the second boundary of the transition region is not located on the gate insulating film side beyond the range in which the nitrogen is distributed.

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